projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 52c543f9 QJ |
1 | /* |
| 2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
| d0f349fb JB |
3 | * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or | |
| 6 | * modify it under the terms of the GNU General Public License | |
| 7 | * as published by the Free Software Foundation; either version 2 | |
| 8 | * of the License, or (at your option) any later version. | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License | |
| 15 | * along with this program; if not, write to the Free Software | |
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
| 17 | * MA 02110-1301, USA. | |
| 52c543f9 QJ |
18 | */ |
| 19 | ||
| 20 | #ifndef __ASM_ARCH_MXC_H__ | |
| 21 | #define __ASM_ARCH_MXC_H__ | |
| 22 | ||
| 23 | #ifndef __ASM_ARCH_MXC_HARDWARE_H__ | |
| 24 | #error "Do not include directly." | |
| 25 | #endif | |
| 26 | ||
| 198016e1 SH |
27 | #define MXC_CPU_MX1 1 |
| 28 | #define MXC_CPU_MX21 21 | |
| 8c25c36f | 29 | #define MXC_CPU_MX25 25 |
| 198016e1 SH |
30 | #define MXC_CPU_MX27 27 |
| 31 | #define MXC_CPU_MX31 31 | |
| 32 | #define MXC_CPU_MX35 35 | |
| fd6ac7bb | 33 | #define MXC_CPU_MXC91231 91231 |
| 198016e1 SH |
34 | |
| 35 | #ifndef __ASSEMBLY__ | |
| 36 | extern unsigned int __mxc_cpu_type; | |
| 37 | #endif | |
| 38 | ||
| 39 | #ifdef CONFIG_ARCH_MX1 | |
| 40 | # ifdef mxc_cpu_type | |
| 41 | # undef mxc_cpu_type | |
| 42 | # define mxc_cpu_type __mxc_cpu_type | |
| 43 | # else | |
| 44 | # define mxc_cpu_type MXC_CPU_MX1 | |
| 45 | # endif | |
| 46 | # define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1) | |
| 47 | #else | |
| 48 | # define cpu_is_mx1() (0) | |
| d2db9aaa RS |
49 | #endif |
| 50 | ||
| 198016e1 SH |
51 | #ifdef CONFIG_MACH_MX21 |
| 52 | # ifdef mxc_cpu_type | |
| 53 | # undef mxc_cpu_type | |
| 54 | # define mxc_cpu_type __mxc_cpu_type | |
| 55 | # else | |
| 56 | # define mxc_cpu_type MXC_CPU_MX21 | |
| 57 | # endif | |
| 58 | # define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21) | |
| 59 | #else | |
| 60 | # define cpu_is_mx21() (0) | |
| 5512e88f HS |
61 | #endif |
| 62 | ||
| 8c25c36f SH |
63 | #ifdef CONFIG_ARCH_MX25 |
| 64 | # ifdef mxc_cpu_type | |
| 65 | # undef mxc_cpu_type | |
| 66 | # define mxc_cpu_type __mxc_cpu_type | |
| 67 | # else | |
| 68 | # define mxc_cpu_type MXC_CPU_MX25 | |
| 69 | # endif | |
| 70 | # define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25) | |
| 71 | #else | |
| 72 | # define cpu_is_mx25() (0) | |
| 73 | #endif | |
| 74 | ||
| 198016e1 SH |
75 | #ifdef CONFIG_MACH_MX27 |
| 76 | # ifdef mxc_cpu_type | |
| 77 | # undef mxc_cpu_type | |
| 78 | # define mxc_cpu_type __mxc_cpu_type | |
| 79 | # else | |
| 80 | # define mxc_cpu_type MXC_CPU_MX27 | |
| 81 | # endif | |
| 82 | # define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27) | |
| 83 | #else | |
| 84 | # define cpu_is_mx27() (0) | |
| f31405cc JB |
85 | #endif |
| 86 | ||
| 198016e1 SH |
87 | #ifdef CONFIG_ARCH_MX31 |
| 88 | # ifdef mxc_cpu_type | |
| 89 | # undef mxc_cpu_type | |
| 90 | # define mxc_cpu_type __mxc_cpu_type | |
| 91 | # else | |
| 92 | # define mxc_cpu_type MXC_CPU_MX31 | |
| 93 | # endif | |
| 94 | # define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31) | |
| 95 | #else | |
| 96 | # define cpu_is_mx31() (0) | |
| 97 | #endif | |
| 98 | ||
| 99 | #ifdef CONFIG_ARCH_MX35 | |
| 100 | # ifdef mxc_cpu_type | |
| 101 | # undef mxc_cpu_type | |
| 102 | # define mxc_cpu_type __mxc_cpu_type | |
| 103 | # else | |
| 104 | # define mxc_cpu_type MXC_CPU_MX35 | |
| 105 | # endif | |
| 106 | # define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35) | |
| 107 | #else | |
| 108 | # define cpu_is_mx35() (0) | |
| 260a1fd2 HS |
109 | #endif |
| 110 | ||
| fd6ac7bb DT |
111 | #ifdef CONFIG_ARCH_MXC91231 |
| 112 | # ifdef mxc_cpu_type | |
| 113 | # undef mxc_cpu_type | |
| 114 | # define mxc_cpu_type __mxc_cpu_type | |
| 115 | # else | |
| 116 | # define mxc_cpu_type MXC_CPU_MXC91231 | |
| 117 | # endif | |
| 118 | # define cpu_is_mxc91231() (mxc_cpu_type == MXC_CPU_MXC91231) | |
| 119 | #else | |
| 120 | # define cpu_is_mxc91231() (0) | |
| 121 | #endif | |
| 122 | ||
| 2cf842b8 | 123 | #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) |
| a8dfb646 | 124 | /* These are deprecated, use mx[23][157]_setup_weimcs instead. */ |
| a9b7a2dd UKK |
125 | #define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10)) |
| 126 | #define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4)) | |
| 127 | #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8)) | |
| 2cf842b8 LF |
128 | #endif |
| 129 | ||
| fd6ac7bb | 130 | #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35() || cpu_is_mxc91231()) |
| 198016e1 SH |
131 | #define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) |
| 132 | ||
| f304fc42 | 133 | #endif /* __ASM_ARCH_MXC_H__ */ |