Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
b9158556 | 2 | * linux/arch/arm/plat-omap/clock.c |
1da177e4 | 3 | * |
137b3ee2 | 4 | * Copyright (C) 2004 - 2008 Nokia corporation |
1da177e4 LT |
5 | * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> |
6 | * | |
1a8bfa1e TL |
7 | * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com> |
8 | * | |
1da177e4 LT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
1da177e4 | 13 | #include <linux/kernel.h> |
1a8bfa1e TL |
14 | #include <linux/init.h> |
15 | #include <linux/module.h> | |
1da177e4 LT |
16 | #include <linux/list.h> |
17 | #include <linux/errno.h> | |
18 | #include <linux/err.h> | |
4e57b681 | 19 | #include <linux/string.h> |
f8ce2547 | 20 | #include <linux/clk.h> |
00431707 | 21 | #include <linux/mutex.h> |
b824efae | 22 | #include <linux/platform_device.h> |
b851cb28 | 23 | #include <linux/cpufreq.h> |
137b3ee2 | 24 | #include <linux/debugfs.h> |
fced80c7 | 25 | #include <linux/io.h> |
1da177e4 | 26 | |
a09e64fb | 27 | #include <mach/clock.h> |
1da177e4 | 28 | |
7df3450e | 29 | static LIST_HEAD(clocks); |
00431707 | 30 | static DEFINE_MUTEX(clocks_mutex); |
7df3450e | 31 | static DEFINE_SPINLOCK(clockfw_lock); |
1da177e4 | 32 | |
1a8bfa1e | 33 | static struct clk_functions *arch_clock; |
1da177e4 | 34 | |
1a8bfa1e | 35 | /*------------------------------------------------------------------------- |
f07adc59 | 36 | * Standard clock functions defined in include/linux/clk.h |
1a8bfa1e | 37 | *-------------------------------------------------------------------------*/ |
1da177e4 | 38 | |
1da177e4 LT |
39 | int clk_enable(struct clk *clk) |
40 | { | |
41 | unsigned long flags; | |
1a8bfa1e | 42 | int ret = 0; |
1da177e4 | 43 | |
b824efae TL |
44 | if (clk == NULL || IS_ERR(clk)) |
45 | return -EINVAL; | |
46 | ||
1da177e4 | 47 | spin_lock_irqsave(&clockfw_lock, flags); |
f07adc59 | 48 | if (arch_clock->clk_enable) |
1a8bfa1e | 49 | ret = arch_clock->clk_enable(clk); |
1da177e4 | 50 | spin_unlock_irqrestore(&clockfw_lock, flags); |
1a8bfa1e | 51 | |
1da177e4 LT |
52 | return ret; |
53 | } | |
54 | EXPORT_SYMBOL(clk_enable); | |
55 | ||
1da177e4 LT |
56 | void clk_disable(struct clk *clk) |
57 | { | |
58 | unsigned long flags; | |
59 | ||
b824efae TL |
60 | if (clk == NULL || IS_ERR(clk)) |
61 | return; | |
62 | ||
1da177e4 | 63 | spin_lock_irqsave(&clockfw_lock, flags); |
7cf95774 TL |
64 | if (clk->usecount == 0) { |
65 | printk(KERN_ERR "Trying disable clock %s with 0 usecount\n", | |
66 | clk->name); | |
67 | WARN_ON(1); | |
68 | goto out; | |
69 | } | |
70 | ||
f07adc59 | 71 | if (arch_clock->clk_disable) |
1a8bfa1e | 72 | arch_clock->clk_disable(clk); |
7cf95774 TL |
73 | |
74 | out: | |
1da177e4 LT |
75 | spin_unlock_irqrestore(&clockfw_lock, flags); |
76 | } | |
77 | EXPORT_SYMBOL(clk_disable); | |
78 | ||
1a8bfa1e | 79 | unsigned long clk_get_rate(struct clk *clk) |
1da177e4 | 80 | { |
1a8bfa1e TL |
81 | unsigned long flags; |
82 | unsigned long ret = 0; | |
1da177e4 | 83 | |
b824efae TL |
84 | if (clk == NULL || IS_ERR(clk)) |
85 | return 0; | |
86 | ||
1a8bfa1e TL |
87 | spin_lock_irqsave(&clockfw_lock, flags); |
88 | ret = clk->rate; | |
89 | spin_unlock_irqrestore(&clockfw_lock, flags); | |
1da177e4 | 90 | |
1a8bfa1e | 91 | return ret; |
1da177e4 | 92 | } |
1a8bfa1e | 93 | EXPORT_SYMBOL(clk_get_rate); |
1da177e4 | 94 | |
1a8bfa1e | 95 | /*------------------------------------------------------------------------- |
f07adc59 | 96 | * Optional clock functions defined in include/linux/clk.h |
1a8bfa1e | 97 | *-------------------------------------------------------------------------*/ |
bb13b5fd | 98 | |
1da177e4 LT |
99 | long clk_round_rate(struct clk *clk, unsigned long rate) |
100 | { | |
1a8bfa1e TL |
101 | unsigned long flags; |
102 | long ret = 0; | |
1da177e4 | 103 | |
b824efae TL |
104 | if (clk == NULL || IS_ERR(clk)) |
105 | return ret; | |
106 | ||
1a8bfa1e TL |
107 | spin_lock_irqsave(&clockfw_lock, flags); |
108 | if (arch_clock->clk_round_rate) | |
109 | ret = arch_clock->clk_round_rate(clk, rate); | |
110 | spin_unlock_irqrestore(&clockfw_lock, flags); | |
1da177e4 | 111 | |
1a8bfa1e | 112 | return ret; |
1da177e4 LT |
113 | } |
114 | EXPORT_SYMBOL(clk_round_rate); | |
115 | ||
1a8bfa1e | 116 | int clk_set_rate(struct clk *clk, unsigned long rate) |
1da177e4 | 117 | { |
1a8bfa1e | 118 | unsigned long flags; |
b824efae TL |
119 | int ret = -EINVAL; |
120 | ||
121 | if (clk == NULL || IS_ERR(clk)) | |
122 | return ret; | |
bb13b5fd | 123 | |
1a8bfa1e TL |
124 | spin_lock_irqsave(&clockfw_lock, flags); |
125 | if (arch_clock->clk_set_rate) | |
126 | ret = arch_clock->clk_set_rate(clk, rate); | |
b5088c0d RK |
127 | if (ret == 0) { |
128 | if (clk->recalc) | |
8b9dbc16 | 129 | clk->rate = clk->recalc(clk); |
3f0a820c | 130 | propagate_rate(clk); |
b5088c0d | 131 | } |
1a8bfa1e | 132 | spin_unlock_irqrestore(&clockfw_lock, flags); |
1da177e4 | 133 | |
1a8bfa1e | 134 | return ret; |
1da177e4 | 135 | } |
1a8bfa1e | 136 | EXPORT_SYMBOL(clk_set_rate); |
1da177e4 | 137 | |
1a8bfa1e | 138 | int clk_set_parent(struct clk *clk, struct clk *parent) |
1da177e4 | 139 | { |
1a8bfa1e | 140 | unsigned long flags; |
b824efae TL |
141 | int ret = -EINVAL; |
142 | ||
143 | if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent)) | |
144 | return ret; | |
1da177e4 | 145 | |
1a8bfa1e | 146 | spin_lock_irqsave(&clockfw_lock, flags); |
4da37821 RK |
147 | if (clk->usecount == 0) { |
148 | if (arch_clock->clk_set_parent) | |
149 | ret = arch_clock->clk_set_parent(clk, parent); | |
150 | if (ret == 0) { | |
151 | if (clk->recalc) | |
152 | clk->rate = clk->recalc(clk); | |
153 | propagate_rate(clk); | |
154 | } | |
155 | } else | |
156 | ret = -EBUSY; | |
1a8bfa1e | 157 | spin_unlock_irqrestore(&clockfw_lock, flags); |
1da177e4 | 158 | |
1a8bfa1e | 159 | return ret; |
1da177e4 | 160 | } |
1a8bfa1e | 161 | EXPORT_SYMBOL(clk_set_parent); |
1da177e4 | 162 | |
1a8bfa1e | 163 | struct clk *clk_get_parent(struct clk *clk) |
1da177e4 | 164 | { |
2e777bf1 | 165 | return clk->parent; |
1da177e4 | 166 | } |
1a8bfa1e | 167 | EXPORT_SYMBOL(clk_get_parent); |
1da177e4 | 168 | |
1a8bfa1e TL |
169 | /*------------------------------------------------------------------------- |
170 | * OMAP specific clock functions shared between omap1 and omap2 | |
171 | *-------------------------------------------------------------------------*/ | |
1da177e4 | 172 | |
1a8bfa1e | 173 | unsigned int __initdata mpurate; |
1da177e4 | 174 | |
1a8bfa1e TL |
175 | /* |
176 | * By default we use the rate set by the bootloader. | |
177 | * You can override this with mpurate= cmdline option. | |
178 | */ | |
179 | static int __init omap_clk_setup(char *str) | |
1da177e4 | 180 | { |
1a8bfa1e | 181 | get_option(&str, &mpurate); |
1da177e4 | 182 | |
1a8bfa1e TL |
183 | if (!mpurate) |
184 | return 1; | |
1da177e4 | 185 | |
1a8bfa1e TL |
186 | if (mpurate < 1000) |
187 | mpurate *= 1000000; | |
1da177e4 | 188 | |
1a8bfa1e | 189 | return 1; |
1da177e4 | 190 | } |
1a8bfa1e | 191 | __setup("mpurate=", omap_clk_setup); |
1da177e4 | 192 | |
1a8bfa1e | 193 | /* Used for clocks that always have same value as the parent clock */ |
8b9dbc16 | 194 | unsigned long followparent_recalc(struct clk *clk) |
1da177e4 | 195 | { |
8b9dbc16 | 196 | return clk->parent->rate; |
1da177e4 LT |
197 | } |
198 | ||
3f0a820c RK |
199 | void clk_reparent(struct clk *child, struct clk *parent) |
200 | { | |
201 | list_del_init(&child->sibling); | |
202 | if (parent) | |
203 | list_add(&child->sibling, &parent->children); | |
204 | child->parent = parent; | |
205 | ||
206 | /* now do the debugfs renaming to reattach the child | |
207 | to the proper parent */ | |
208 | } | |
209 | ||
1a8bfa1e TL |
210 | /* Propagate rate to children */ |
211 | void propagate_rate(struct clk * tclk) | |
1da177e4 | 212 | { |
1a8bfa1e | 213 | struct clk *clkp; |
1da177e4 | 214 | |
3f0a820c | 215 | list_for_each_entry(clkp, &tclk->children, sibling) { |
9a5fedac | 216 | if (clkp->recalc) |
8b9dbc16 | 217 | clkp->rate = clkp->recalc(clkp); |
3f0a820c | 218 | propagate_rate(clkp); |
1a8bfa1e | 219 | } |
1da177e4 LT |
220 | } |
221 | ||
3f0a820c RK |
222 | static LIST_HEAD(root_clks); |
223 | ||
6b8858a9 PW |
224 | /** |
225 | * recalculate_root_clocks - recalculate and propagate all root clocks | |
226 | * | |
227 | * Recalculates all root clocks (clocks with no parent), which if the | |
228 | * clock's .recalc is set correctly, should also propagate their rates. | |
229 | * Called at init. | |
230 | */ | |
231 | void recalculate_root_clocks(void) | |
232 | { | |
233 | struct clk *clkp; | |
234 | ||
3f0a820c RK |
235 | list_for_each_entry(clkp, &root_clks, sibling) { |
236 | if (clkp->recalc) | |
8b9dbc16 | 237 | clkp->rate = clkp->recalc(clkp); |
3f0a820c | 238 | propagate_rate(clkp); |
6b8858a9 PW |
239 | } |
240 | } | |
241 | ||
c8088112 PW |
242 | /** |
243 | * clk_init_one - initialize any fields in the struct clk before clk init | |
244 | * @clk: struct clk * to initialize | |
245 | * | |
246 | * Initialize any struct clk fields needed before normal clk initialization | |
247 | * can run. No return value. | |
248 | */ | |
3f0a820c RK |
249 | void clk_init_one(struct clk *clk) |
250 | { | |
251 | INIT_LIST_HEAD(&clk->children); | |
252 | } | |
253 | ||
1da177e4 LT |
254 | int clk_register(struct clk *clk) |
255 | { | |
b824efae TL |
256 | if (clk == NULL || IS_ERR(clk)) |
257 | return -EINVAL; | |
258 | ||
dbb674d5 RK |
259 | /* |
260 | * trap out already registered clocks | |
261 | */ | |
262 | if (clk->node.next || clk->node.prev) | |
263 | return 0; | |
264 | ||
00431707 | 265 | mutex_lock(&clocks_mutex); |
3f0a820c RK |
266 | if (clk->parent) |
267 | list_add(&clk->sibling, &clk->parent->children); | |
268 | else | |
269 | list_add(&clk->sibling, &root_clks); | |
270 | ||
1da177e4 LT |
271 | list_add(&clk->node, &clocks); |
272 | if (clk->init) | |
273 | clk->init(clk); | |
00431707 | 274 | mutex_unlock(&clocks_mutex); |
1a8bfa1e | 275 | |
1da177e4 LT |
276 | return 0; |
277 | } | |
278 | EXPORT_SYMBOL(clk_register); | |
279 | ||
280 | void clk_unregister(struct clk *clk) | |
281 | { | |
b824efae TL |
282 | if (clk == NULL || IS_ERR(clk)) |
283 | return; | |
284 | ||
00431707 | 285 | mutex_lock(&clocks_mutex); |
3f0a820c | 286 | list_del(&clk->sibling); |
1da177e4 | 287 | list_del(&clk->node); |
00431707 | 288 | mutex_unlock(&clocks_mutex); |
1da177e4 LT |
289 | } |
290 | EXPORT_SYMBOL(clk_unregister); | |
291 | ||
6b8858a9 PW |
292 | void clk_enable_init_clocks(void) |
293 | { | |
294 | struct clk *clkp; | |
295 | ||
296 | list_for_each_entry(clkp, &clocks, node) { | |
297 | if (clkp->flags & ENABLE_ON_INIT) | |
298 | clk_enable(clkp); | |
299 | } | |
300 | } | |
301 | EXPORT_SYMBOL(clk_enable_init_clocks); | |
302 | ||
897dcded RK |
303 | /* |
304 | * Low level helpers | |
305 | */ | |
306 | static int clkll_enable_null(struct clk *clk) | |
307 | { | |
308 | return 0; | |
309 | } | |
310 | ||
311 | static void clkll_disable_null(struct clk *clk) | |
312 | { | |
313 | } | |
314 | ||
315 | const struct clkops clkops_null = { | |
316 | .enable = clkll_enable_null, | |
317 | .disable = clkll_disable_null, | |
318 | }; | |
319 | ||
6b8858a9 PW |
320 | #ifdef CONFIG_CPU_FREQ |
321 | void clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | |
322 | { | |
323 | unsigned long flags; | |
324 | ||
325 | spin_lock_irqsave(&clockfw_lock, flags); | |
326 | if (arch_clock->clk_init_cpufreq_table) | |
327 | arch_clock->clk_init_cpufreq_table(table); | |
328 | spin_unlock_irqrestore(&clockfw_lock, flags); | |
329 | } | |
330 | EXPORT_SYMBOL(clk_init_cpufreq_table); | |
331 | #endif | |
332 | ||
1a8bfa1e | 333 | /*-------------------------------------------------------------------------*/ |
bb13b5fd | 334 | |
90afd5cb TL |
335 | #ifdef CONFIG_OMAP_RESET_CLOCKS |
336 | /* | |
337 | * Disable any unused clocks left on by the bootloader | |
338 | */ | |
339 | static int __init clk_disable_unused(void) | |
340 | { | |
341 | struct clk *ck; | |
342 | unsigned long flags; | |
343 | ||
344 | list_for_each_entry(ck, &clocks, node) { | |
897dcded RK |
345 | if (ck->ops == &clkops_null) |
346 | continue; | |
347 | ||
348 | if (ck->usecount > 0 || ck->enable_reg == 0) | |
90afd5cb TL |
349 | continue; |
350 | ||
351 | spin_lock_irqsave(&clockfw_lock, flags); | |
352 | if (arch_clock->clk_disable_unused) | |
353 | arch_clock->clk_disable_unused(ck); | |
354 | spin_unlock_irqrestore(&clockfw_lock, flags); | |
355 | } | |
356 | ||
357 | return 0; | |
358 | } | |
359 | late_initcall(clk_disable_unused); | |
360 | #endif | |
361 | ||
1a8bfa1e | 362 | int __init clk_init(struct clk_functions * custom_clocks) |
bb13b5fd | 363 | { |
1a8bfa1e TL |
364 | if (!custom_clocks) { |
365 | printk(KERN_ERR "No custom clock functions registered\n"); | |
366 | BUG(); | |
bb13b5fd TL |
367 | } |
368 | ||
1a8bfa1e TL |
369 | arch_clock = custom_clocks; |
370 | ||
bb13b5fd TL |
371 | return 0; |
372 | } | |
6b8858a9 | 373 | |
137b3ee2 HD |
374 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
375 | /* | |
376 | * debugfs support to trace clock tree hierarchy and attributes | |
377 | */ | |
378 | static struct dentry *clk_debugfs_root; | |
379 | ||
380 | static int clk_debugfs_register_one(struct clk *c) | |
381 | { | |
382 | int err; | |
383 | struct dentry *d, *child; | |
384 | struct clk *pa = c->parent; | |
385 | char s[255]; | |
386 | char *p = s; | |
387 | ||
388 | p += sprintf(p, "%s", c->name); | |
389 | if (c->id != 0) | |
390 | sprintf(p, ":%d", c->id); | |
391 | d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); | |
e621f266 Z |
392 | if (!d) |
393 | return -ENOMEM; | |
137b3ee2 HD |
394 | c->dent = d; |
395 | ||
396 | d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); | |
e621f266 Z |
397 | if (!d) { |
398 | err = -ENOMEM; | |
137b3ee2 HD |
399 | goto err_out; |
400 | } | |
401 | d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); | |
e621f266 Z |
402 | if (!d) { |
403 | err = -ENOMEM; | |
137b3ee2 HD |
404 | goto err_out; |
405 | } | |
406 | d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); | |
e621f266 Z |
407 | if (!d) { |
408 | err = -ENOMEM; | |
137b3ee2 HD |
409 | goto err_out; |
410 | } | |
411 | return 0; | |
412 | ||
413 | err_out: | |
414 | d = c->dent; | |
415 | list_for_each_entry(child, &d->d_subdirs, d_u.d_child) | |
416 | debugfs_remove(child); | |
417 | debugfs_remove(c->dent); | |
418 | return err; | |
419 | } | |
420 | ||
421 | static int clk_debugfs_register(struct clk *c) | |
422 | { | |
423 | int err; | |
424 | struct clk *pa = c->parent; | |
425 | ||
426 | if (pa && !pa->dent) { | |
427 | err = clk_debugfs_register(pa); | |
428 | if (err) | |
429 | return err; | |
430 | } | |
431 | ||
432 | if (!c->dent) { | |
433 | err = clk_debugfs_register_one(c); | |
434 | if (err) | |
435 | return err; | |
436 | } | |
437 | return 0; | |
438 | } | |
439 | ||
440 | static int __init clk_debugfs_init(void) | |
441 | { | |
442 | struct clk *c; | |
443 | struct dentry *d; | |
444 | int err; | |
445 | ||
446 | d = debugfs_create_dir("clock", NULL); | |
e621f266 Z |
447 | if (!d) |
448 | return -ENOMEM; | |
137b3ee2 HD |
449 | clk_debugfs_root = d; |
450 | ||
451 | list_for_each_entry(c, &clocks, node) { | |
452 | err = clk_debugfs_register(c); | |
453 | if (err) | |
454 | goto err_out; | |
455 | } | |
456 | return 0; | |
457 | err_out: | |
458 | debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */ | |
459 | return err; | |
460 | } | |
461 | late_initcall(clk_debugfs_init); | |
462 | ||
463 | #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ |