OMAP clock: drop .id field; ensure each clock has a unique name
[deliverable/linux.git] / arch / arm / plat-omap / clock.c
CommitLineData
1da177e4 1/*
b9158556 2 * linux/arch/arm/plat-omap/clock.c
1da177e4 3 *
137b3ee2 4 * Copyright (C) 2004 - 2008 Nokia corporation
1da177e4
LT
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 *
1a8bfa1e
TL
7 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
8 *
1da177e4
LT
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
1da177e4 13#include <linux/kernel.h>
1a8bfa1e
TL
14#include <linux/init.h>
15#include <linux/module.h>
1da177e4
LT
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
4e57b681 19#include <linux/string.h>
f8ce2547 20#include <linux/clk.h>
00431707 21#include <linux/mutex.h>
b824efae 22#include <linux/platform_device.h>
b851cb28 23#include <linux/cpufreq.h>
137b3ee2 24#include <linux/debugfs.h>
fced80c7 25#include <linux/io.h>
1da177e4 26
ce491cf8 27#include <plat/clock.h>
1da177e4 28
7df3450e 29static LIST_HEAD(clocks);
00431707 30static DEFINE_MUTEX(clocks_mutex);
7df3450e 31static DEFINE_SPINLOCK(clockfw_lock);
1da177e4 32
1a8bfa1e 33static struct clk_functions *arch_clock;
1da177e4 34
1a8bfa1e 35/*-------------------------------------------------------------------------
f07adc59 36 * Standard clock functions defined in include/linux/clk.h
1a8bfa1e 37 *-------------------------------------------------------------------------*/
1da177e4 38
1da177e4
LT
39int clk_enable(struct clk *clk)
40{
41 unsigned long flags;
1a8bfa1e 42 int ret = 0;
1da177e4 43
b824efae
TL
44 if (clk == NULL || IS_ERR(clk))
45 return -EINVAL;
46
1da177e4 47 spin_lock_irqsave(&clockfw_lock, flags);
f07adc59 48 if (arch_clock->clk_enable)
1a8bfa1e 49 ret = arch_clock->clk_enable(clk);
1da177e4 50 spin_unlock_irqrestore(&clockfw_lock, flags);
1a8bfa1e 51
1da177e4
LT
52 return ret;
53}
54EXPORT_SYMBOL(clk_enable);
55
1da177e4
LT
56void clk_disable(struct clk *clk)
57{
58 unsigned long flags;
59
b824efae
TL
60 if (clk == NULL || IS_ERR(clk))
61 return;
62
1da177e4 63 spin_lock_irqsave(&clockfw_lock, flags);
7cf95774
TL
64 if (clk->usecount == 0) {
65 printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
66 clk->name);
67 WARN_ON(1);
68 goto out;
69 }
70
f07adc59 71 if (arch_clock->clk_disable)
1a8bfa1e 72 arch_clock->clk_disable(clk);
7cf95774
TL
73
74out:
1da177e4
LT
75 spin_unlock_irqrestore(&clockfw_lock, flags);
76}
77EXPORT_SYMBOL(clk_disable);
78
1a8bfa1e 79unsigned long clk_get_rate(struct clk *clk)
1da177e4 80{
1a8bfa1e
TL
81 unsigned long flags;
82 unsigned long ret = 0;
1da177e4 83
b824efae
TL
84 if (clk == NULL || IS_ERR(clk))
85 return 0;
86
1a8bfa1e
TL
87 spin_lock_irqsave(&clockfw_lock, flags);
88 ret = clk->rate;
89 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 90
1a8bfa1e 91 return ret;
1da177e4 92}
1a8bfa1e 93EXPORT_SYMBOL(clk_get_rate);
1da177e4 94
1a8bfa1e 95/*-------------------------------------------------------------------------
f07adc59 96 * Optional clock functions defined in include/linux/clk.h
1a8bfa1e 97 *-------------------------------------------------------------------------*/
bb13b5fd 98
1da177e4
LT
99long clk_round_rate(struct clk *clk, unsigned long rate)
100{
1a8bfa1e
TL
101 unsigned long flags;
102 long ret = 0;
1da177e4 103
b824efae
TL
104 if (clk == NULL || IS_ERR(clk))
105 return ret;
106
1a8bfa1e
TL
107 spin_lock_irqsave(&clockfw_lock, flags);
108 if (arch_clock->clk_round_rate)
109 ret = arch_clock->clk_round_rate(clk, rate);
110 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 111
1a8bfa1e 112 return ret;
1da177e4
LT
113}
114EXPORT_SYMBOL(clk_round_rate);
115
1a8bfa1e 116int clk_set_rate(struct clk *clk, unsigned long rate)
1da177e4 117{
1a8bfa1e 118 unsigned long flags;
b824efae
TL
119 int ret = -EINVAL;
120
121 if (clk == NULL || IS_ERR(clk))
122 return ret;
bb13b5fd 123
1a8bfa1e
TL
124 spin_lock_irqsave(&clockfw_lock, flags);
125 if (arch_clock->clk_set_rate)
126 ret = arch_clock->clk_set_rate(clk, rate);
b5088c0d
RK
127 if (ret == 0) {
128 if (clk->recalc)
8b9dbc16 129 clk->rate = clk->recalc(clk);
3f0a820c 130 propagate_rate(clk);
b5088c0d 131 }
1a8bfa1e 132 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 133
1a8bfa1e 134 return ret;
1da177e4 135}
1a8bfa1e 136EXPORT_SYMBOL(clk_set_rate);
1da177e4 137
1a8bfa1e 138int clk_set_parent(struct clk *clk, struct clk *parent)
1da177e4 139{
1a8bfa1e 140 unsigned long flags;
b824efae
TL
141 int ret = -EINVAL;
142
74830385
SS
143 if (cpu_is_omap44xx())
144 /* OMAP4 clk framework not supported yet */
145 return 0;
b824efae
TL
146 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
147 return ret;
1da177e4 148
1a8bfa1e 149 spin_lock_irqsave(&clockfw_lock, flags);
4da37821
RK
150 if (clk->usecount == 0) {
151 if (arch_clock->clk_set_parent)
152 ret = arch_clock->clk_set_parent(clk, parent);
153 if (ret == 0) {
154 if (clk->recalc)
155 clk->rate = clk->recalc(clk);
156 propagate_rate(clk);
157 }
158 } else
159 ret = -EBUSY;
1a8bfa1e 160 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 161
1a8bfa1e 162 return ret;
1da177e4 163}
1a8bfa1e 164EXPORT_SYMBOL(clk_set_parent);
1da177e4 165
1a8bfa1e 166struct clk *clk_get_parent(struct clk *clk)
1da177e4 167{
2e777bf1 168 return clk->parent;
1da177e4 169}
1a8bfa1e 170EXPORT_SYMBOL(clk_get_parent);
1da177e4 171
1a8bfa1e
TL
172/*-------------------------------------------------------------------------
173 * OMAP specific clock functions shared between omap1 and omap2
174 *-------------------------------------------------------------------------*/
1da177e4 175
d3730192 176int __initdata mpurate;
1da177e4 177
1a8bfa1e
TL
178/*
179 * By default we use the rate set by the bootloader.
180 * You can override this with mpurate= cmdline option.
181 */
182static int __init omap_clk_setup(char *str)
1da177e4 183{
1a8bfa1e 184 get_option(&str, &mpurate);
1da177e4 185
1a8bfa1e
TL
186 if (!mpurate)
187 return 1;
1da177e4 188
1a8bfa1e
TL
189 if (mpurate < 1000)
190 mpurate *= 1000000;
1da177e4 191
1a8bfa1e 192 return 1;
1da177e4 193}
1a8bfa1e 194__setup("mpurate=", omap_clk_setup);
1da177e4 195
1a8bfa1e 196/* Used for clocks that always have same value as the parent clock */
8b9dbc16 197unsigned long followparent_recalc(struct clk *clk)
1da177e4 198{
8b9dbc16 199 return clk->parent->rate;
1da177e4
LT
200}
201
e9b98f60
PW
202/*
203 * Used for clocks that have the same value as the parent clock,
204 * divided by some factor
205 */
206unsigned long omap_fixed_divisor_recalc(struct clk *clk)
207{
208 WARN_ON(!clk->fixed_div);
209
210 return clk->parent->rate / clk->fixed_div;
211}
212
3f0a820c
RK
213void clk_reparent(struct clk *child, struct clk *parent)
214{
215 list_del_init(&child->sibling);
216 if (parent)
217 list_add(&child->sibling, &parent->children);
218 child->parent = parent;
219
220 /* now do the debugfs renaming to reattach the child
221 to the proper parent */
222}
223
1a8bfa1e
TL
224/* Propagate rate to children */
225void propagate_rate(struct clk * tclk)
1da177e4 226{
1a8bfa1e 227 struct clk *clkp;
1da177e4 228
3f0a820c 229 list_for_each_entry(clkp, &tclk->children, sibling) {
9a5fedac 230 if (clkp->recalc)
8b9dbc16 231 clkp->rate = clkp->recalc(clkp);
3f0a820c 232 propagate_rate(clkp);
1a8bfa1e 233 }
1da177e4
LT
234}
235
3f0a820c
RK
236static LIST_HEAD(root_clks);
237
6b8858a9
PW
238/**
239 * recalculate_root_clocks - recalculate and propagate all root clocks
240 *
241 * Recalculates all root clocks (clocks with no parent), which if the
242 * clock's .recalc is set correctly, should also propagate their rates.
243 * Called at init.
244 */
245void recalculate_root_clocks(void)
246{
247 struct clk *clkp;
248
3f0a820c
RK
249 list_for_each_entry(clkp, &root_clks, sibling) {
250 if (clkp->recalc)
8b9dbc16 251 clkp->rate = clkp->recalc(clkp);
3f0a820c 252 propagate_rate(clkp);
6b8858a9
PW
253 }
254}
255
c8088112 256/**
79716870 257 * clk_preinit - initialize any fields in the struct clk before clk init
c8088112
PW
258 * @clk: struct clk * to initialize
259 *
260 * Initialize any struct clk fields needed before normal clk initialization
261 * can run. No return value.
262 */
79716870 263void clk_preinit(struct clk *clk)
3f0a820c
RK
264{
265 INIT_LIST_HEAD(&clk->children);
266}
267
1da177e4
LT
268int clk_register(struct clk *clk)
269{
b824efae
TL
270 if (clk == NULL || IS_ERR(clk))
271 return -EINVAL;
272
dbb674d5
RK
273 /*
274 * trap out already registered clocks
275 */
276 if (clk->node.next || clk->node.prev)
277 return 0;
278
00431707 279 mutex_lock(&clocks_mutex);
3f0a820c
RK
280 if (clk->parent)
281 list_add(&clk->sibling, &clk->parent->children);
282 else
283 list_add(&clk->sibling, &root_clks);
284
1da177e4
LT
285 list_add(&clk->node, &clocks);
286 if (clk->init)
287 clk->init(clk);
00431707 288 mutex_unlock(&clocks_mutex);
1a8bfa1e 289
1da177e4
LT
290 return 0;
291}
292EXPORT_SYMBOL(clk_register);
293
294void clk_unregister(struct clk *clk)
295{
b824efae
TL
296 if (clk == NULL || IS_ERR(clk))
297 return;
298
00431707 299 mutex_lock(&clocks_mutex);
3f0a820c 300 list_del(&clk->sibling);
1da177e4 301 list_del(&clk->node);
00431707 302 mutex_unlock(&clocks_mutex);
1da177e4
LT
303}
304EXPORT_SYMBOL(clk_unregister);
305
6b8858a9
PW
306void clk_enable_init_clocks(void)
307{
308 struct clk *clkp;
309
310 list_for_each_entry(clkp, &clocks, node) {
311 if (clkp->flags & ENABLE_ON_INIT)
312 clk_enable(clkp);
313 }
314}
6b8858a9 315
897dcded
RK
316/*
317 * Low level helpers
318 */
319static int clkll_enable_null(struct clk *clk)
320{
321 return 0;
322}
323
324static void clkll_disable_null(struct clk *clk)
325{
326}
327
328const struct clkops clkops_null = {
329 .enable = clkll_enable_null,
330 .disable = clkll_disable_null,
331};
332
6b8858a9
PW
333#ifdef CONFIG_CPU_FREQ
334void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
335{
336 unsigned long flags;
337
338 spin_lock_irqsave(&clockfw_lock, flags);
339 if (arch_clock->clk_init_cpufreq_table)
340 arch_clock->clk_init_cpufreq_table(table);
341 spin_unlock_irqrestore(&clockfw_lock, flags);
342}
4e37c10d
PW
343
344void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
345{
346 unsigned long flags;
347
348 spin_lock_irqsave(&clockfw_lock, flags);
349 if (arch_clock->clk_exit_cpufreq_table)
350 arch_clock->clk_exit_cpufreq_table(table);
351 spin_unlock_irqrestore(&clockfw_lock, flags);
352}
6b8858a9
PW
353#endif
354
1a8bfa1e 355/*-------------------------------------------------------------------------*/
bb13b5fd 356
90afd5cb
TL
357#ifdef CONFIG_OMAP_RESET_CLOCKS
358/*
359 * Disable any unused clocks left on by the bootloader
360 */
361static int __init clk_disable_unused(void)
362{
363 struct clk *ck;
364 unsigned long flags;
365
366 list_for_each_entry(ck, &clocks, node) {
897dcded
RK
367 if (ck->ops == &clkops_null)
368 continue;
369
370 if (ck->usecount > 0 || ck->enable_reg == 0)
90afd5cb
TL
371 continue;
372
373 spin_lock_irqsave(&clockfw_lock, flags);
374 if (arch_clock->clk_disable_unused)
375 arch_clock->clk_disable_unused(ck);
376 spin_unlock_irqrestore(&clockfw_lock, flags);
377 }
378
379 return 0;
380}
381late_initcall(clk_disable_unused);
382#endif
383
1a8bfa1e 384int __init clk_init(struct clk_functions * custom_clocks)
bb13b5fd 385{
1a8bfa1e
TL
386 if (!custom_clocks) {
387 printk(KERN_ERR "No custom clock functions registered\n");
388 BUG();
bb13b5fd
TL
389 }
390
1a8bfa1e
TL
391 arch_clock = custom_clocks;
392
bb13b5fd
TL
393 return 0;
394}
6b8858a9 395
137b3ee2
HD
396#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
397/*
398 * debugfs support to trace clock tree hierarchy and attributes
399 */
400static struct dentry *clk_debugfs_root;
401
402static int clk_debugfs_register_one(struct clk *c)
403{
404 int err;
0825cc8a 405 struct dentry *d, *child, *child_tmp;
137b3ee2
HD
406 struct clk *pa = c->parent;
407 char s[255];
408 char *p = s;
409
410 p += sprintf(p, "%s", c->name);
137b3ee2 411 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
e621f266
Z
412 if (!d)
413 return -ENOMEM;
137b3ee2
HD
414 c->dent = d;
415
416 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
e621f266
Z
417 if (!d) {
418 err = -ENOMEM;
137b3ee2
HD
419 goto err_out;
420 }
421 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
e621f266
Z
422 if (!d) {
423 err = -ENOMEM;
137b3ee2
HD
424 goto err_out;
425 }
426 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
e621f266
Z
427 if (!d) {
428 err = -ENOMEM;
137b3ee2
HD
429 goto err_out;
430 }
431 return 0;
432
433err_out:
434 d = c->dent;
0825cc8a 435 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
137b3ee2
HD
436 debugfs_remove(child);
437 debugfs_remove(c->dent);
438 return err;
439}
440
441static int clk_debugfs_register(struct clk *c)
442{
443 int err;
444 struct clk *pa = c->parent;
445
446 if (pa && !pa->dent) {
447 err = clk_debugfs_register(pa);
448 if (err)
449 return err;
450 }
451
452 if (!c->dent) {
453 err = clk_debugfs_register_one(c);
454 if (err)
455 return err;
456 }
457 return 0;
458}
459
460static int __init clk_debugfs_init(void)
461{
462 struct clk *c;
463 struct dentry *d;
464 int err;
465
466 d = debugfs_create_dir("clock", NULL);
e621f266
Z
467 if (!d)
468 return -ENOMEM;
137b3ee2
HD
469 clk_debugfs_root = d;
470
471 list_for_each_entry(c, &clocks, node) {
472 err = clk_debugfs_register(c);
473 if (err)
474 goto err_out;
475 }
476 return 0;
477err_out:
ca4caa4e 478 debugfs_remove_recursive(clk_debugfs_root);
137b3ee2
HD
479 return err;
480}
481late_initcall(clk_debugfs_init);
482
483#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */
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