[deliverable/linux.git] / arch / arm / plat-omap / common.c

/*
 * linux/arch/arm/plat-omap/common.c
 *
 * Code common to all OMAP machines.
 * The file is created by Tony Lindgren <tony@atomide.com>
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/omapfb.h>

#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/setup.h>

#include <plat/common.h>
#include <plat/board.h>
#include <plat/control.h>
#include <plat/mux.h>
#include <plat/fpga.h>
#include <plat/serial.h>
#include <plat/vram.h>

#include <plat/clock.h>

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
# include "../mach-omap2/sdrc.h"
#endif

#define NO_LENGTH_CHECK 0xffffffff

struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size;

static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
{
	struct omap_board_config_kernel *kinfo = NULL;
	int i;

	/* Try to find the config from the board-specific structures
	 * in the kernel. */
	for (i = 0; i < omap_board_config_size; i++) {
		if (omap_board_config[i].tag == tag) {
			if (skip == 0) {
				kinfo = &omap_board_config[i];
				break;
			} else {
				skip--;
			}
		}
	}
	if (kinfo == NULL)
		return NULL;
	return kinfo->data;
}

const void *__omap_get_config(u16 tag, size_t len, int nr)
{
        return get_config(tag, len, nr, NULL);
}
EXPORT_SYMBOL(__omap_get_config);

const void *omap_get_var_config(u16 tag, size_t *len)
{
        return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
EXPORT_SYMBOL(omap_get_var_config);

void __init omap_reserve(void)
{
	omapfb_reserve_sdram();
	omap_vram_reserve_sdram();
}

/*
 * 32KHz clocksource ... always available, on pretty most chips except
 * OMAP 730 and 1510.  Other timers could be used as clocksources, with
 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
 * but systems won't necessarily want to spend resources that way.
 */

#define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410

#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))

#include <linux/clocksource.h>

/*
 * offset_32k holds the init time counter value. It is then subtracted
 * from every counter read to achieve a counter that counts time from the
 * kernel boot (needed for sched_clock()).
 */
static u32 offset_32k __read_mostly;

#ifdef CONFIG_ARCH_OMAP16XX
static cycle_t omap16xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
}
#else
#define omap16xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2420
static cycle_t omap2420_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap2420_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2430
static cycle_t omap2430_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap2430_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP3
static cycle_t omap34xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap34xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP4
static cycle_t omap44xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap44xx_32k_read	NULL
#endif

/*
 * Kernel assumes that sched_clock can be called early but may not have
 * things ready yet.
 */
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
{
	return 0;
}

static struct clocksource clocksource_32k = {
	.name		= "32k_counter",
	.rating		= 250,
	.read		= omap_32k_read_dummy,
	.mask		= CLOCKSOURCE_MASK(32),
	.shift		= 10,
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};

/*
 * Returns current time from boot in nsecs. It's OK for this to wrap
 * around for now, as it's just a relative time stamp.
 */
unsigned long long sched_clock(void)
{
	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
				  clocksource_32k.mult, clocksource_32k.shift);
}

/**
 * read_persistent_clock -  Return time from a persistent clock.
 *
 * Reads the time from a source which isn't disabled during PM, the
 * 32k sync timer.  Convert the cycles elapsed since last read into
 * nsecs and adds to a monotonically increasing timespec.
 */
static struct timespec persistent_ts;
static cycles_t cycles, last_cycles;
void read_persistent_clock(struct timespec *ts)
{
	unsigned long long nsecs;
	cycles_t delta;
	struct timespec *tsp = &persistent_ts;

	last_cycles = cycles;
	cycles = clocksource_32k.read(&clocksource_32k);
	delta = cycles - last_cycles;

	nsecs = clocksource_cyc2ns(delta,
				   clocksource_32k.mult, clocksource_32k.shift);

	timespec_add_ns(tsp, nsecs);
	*ts = *tsp;
}

static int __init omap_init_clocksource_32k(void)
{
	static char err[] __initdata = KERN_ERR
			"%s: can't register clocksource!\n";

	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
		struct clk *sync_32k_ick;

		if (cpu_is_omap16xx())
			clocksource_32k.read = omap16xx_32k_read;
		else if (cpu_is_omap2420())
			clocksource_32k.read = omap2420_32k_read;
		else if (cpu_is_omap2430())
			clocksource_32k.read = omap2430_32k_read;
		else if (cpu_is_omap34xx())
			clocksource_32k.read = omap34xx_32k_read;
		else if (cpu_is_omap44xx())
			clocksource_32k.read = omap44xx_32k_read;
		else
			return -ENODEV;

		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
		if (sync_32k_ick)
			clk_enable(sync_32k_ick);

		clocksource_32k.mult = clocksource_hz2mult(32768,
					    clocksource_32k.shift);

		offset_32k = clocksource_32k.read(&clocksource_32k);

		if (clocksource_register(&clocksource_32k))
			printk(err, clocksource_32k.name);
	}
	return 0;
}
arch_initcall(omap_init_clocksource_32k);

#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */

/* Global address base setup code */

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
{
	omap2_set_globals_tap(omap2_globals);
	omap2_set_globals_sdrc(omap2_globals);
	omap2_set_globals_control(omap2_globals);
	omap2_set_globals_prcm(omap2_globals);
	omap2_set_globals_uart(omap2_globals);
}

#endif

#if defined(CONFIG_ARCH_OMAP2420)

static struct omap_globals omap242x_globals = {
	.class	= OMAP242X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
	.sdrc	= OMAP2420_SDRC_BASE,
	.sms	= OMAP2420_SMS_BASE,
	.ctrl	= OMAP2420_CTRL_BASE,
	.prm	= OMAP2420_PRM_BASE,
	.cm	= OMAP2420_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_242x(void)
{
	__omap2_set_globals(&omap242x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP2430)

static struct omap_globals omap243x_globals = {
	.class	= OMAP243X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
	.sdrc	= OMAP243X_SDRC_BASE,
	.sms	= OMAP243X_SMS_BASE,
	.ctrl	= OMAP243X_CTRL_BASE,
	.prm	= OMAP2430_PRM_BASE,
	.cm	= OMAP2430_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_243x(void)
{
	__omap2_set_globals(&omap243x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP3)

static struct omap_globals omap3_globals = {
	.class	= OMAP343X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
	.sdrc	= OMAP343X_SDRC_BASE,
	.sms	= OMAP343X_SMS_BASE,
	.ctrl	= OMAP343X_CTRL_BASE,
	.prm	= OMAP3430_PRM_BASE,
	.cm	= OMAP3430_CM_BASE,
	.uart1_phys	= OMAP3_UART1_BASE,
	.uart2_phys	= OMAP3_UART2_BASE,
	.uart3_phys	= OMAP3_UART3_BASE,
};

void __init omap2_set_globals_343x(void)
{
	__omap2_set_globals(&omap3_globals);
}

void __init omap2_set_globals_36xx(void)
{
	omap3_globals.uart4_phys = OMAP3_UART4_BASE;

	__omap2_set_globals(&omap3_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP4)
static struct omap_globals omap4_globals = {
	.class	= OMAP443X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
	.ctrl	= OMAP443X_CTRL_BASE,
	.prm	= OMAP4430_PRM_BASE,
	.cm	= OMAP4430_CM_BASE,
	.cm2	= OMAP4430_CM2_BASE,
	.uart1_phys	= OMAP4_UART1_BASE,
	.uart2_phys	= OMAP4_UART2_BASE,
	.uart3_phys	= OMAP4_UART3_BASE,
	.uart4_phys	= OMAP4_UART4_BASE,
};

void __init omap2_set_globals_443x(void)
{
	omap2_set_globals_tap(&omap4_globals);
	omap2_set_globals_control(&omap4_globals);
	omap2_set_globals_prcm(&omap4_globals);
	omap2_set_globals_uart(&omap4_globals);
}
#endif
Commit	Line	Data
5e1c5ff4 TL	1	/*
	2	* linux/arch/arm/plat-omap/common.c
	3	*
	4	* Code common to all OMAP machines.
44169075 SS	5	* The file is created by Tony Lindgren <tony@atomide.com>
	6	*
	7	* Copyright (C) 2009 Texas Instruments
	8	* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
5e1c5ff4 TL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
5e1c5ff4 TL	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
5e1c5ff4 TL	18	#include <linux/console.h>
	19	#include <linux/serial.h>
	20	#include <linux/tty.h>
	21	#include <linux/serial_8250.h>
	22	#include <linux/serial_reg.h>
f8ce2547	23	#include <linux/clk.h>
fced80c7	24	#include <linux/io.h>
71ee7dad	25	#include <linux/omapfb.h>
5e1c5ff4	26
a09e64fb	27	#include <mach/hardware.h>
5e1c5ff4 TL	28	#include <asm/system.h>
	29	#include <asm/pgtable.h>
	30	#include <asm/mach/map.h>
92105bb7	31	#include <asm/setup.h>
5e1c5ff4	32
ce491cf8 TL	33	#include <plat/common.h>
	34	#include <plat/board.h>
	35	#include <plat/control.h>
	36	#include <plat/mux.h>
	37	#include <plat/fpga.h>
4f2c49fe	38	#include <plat/serial.h>
71ee7dad	39	#include <plat/vram.h>
5e1c5ff4	40
ce491cf8	41	#include <plat/clock.h>
5e1c5ff4	42
44595982 PW	43	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
	44	# include "../mach-omap2/sdrc.h"
	45	#endif
	46
5e1c5ff4 TL	47	#define NO_LENGTH_CHECK 0xffffffff
5e1c5ff4 TL	48
5e1c5ff4	49	struct omap_board_config_kernel *omap_board_config;
92105bb7	50	int omap_board_config_size;
5e1c5ff4 TL	51
	52	static const void get_config(u16 tag, size_t len, int skip, size_t len_out)
	53	{
	54	struct omap_board_config_kernel *kinfo = NULL;
	55	int i;
	56
5e1c5ff4 TL	57	/* Try to find the config from the board-specific structures
	58	* in the kernel. */
	59	for (i = 0; i < omap_board_config_size; i++) {
	60	if (omap_board_config[i].tag == tag) {
c40fae95 TL	61	if (skip == 0) {
	62	kinfo = &omap_board_config[i];
	63	break;
	64	} else {
	65	skip--;
	66	}
5e1c5ff4 TL	67	}
	68	}
	69	if (kinfo == NULL)
	70	return NULL;
	71	return kinfo->data;
	72	}
	73
	74	const void *__omap_get_config(u16 tag, size_t len, int nr)
	75	{
	76	return get_config(tag, len, nr, NULL);
	77	}
	78	EXPORT_SYMBOL(__omap_get_config);
	79
	80	const void omap_get_var_config(u16 tag, size_t len)
	81	{
	82	return get_config(tag, NO_LENGTH_CHECK, 0, len);
	83	}
	84	EXPORT_SYMBOL(omap_get_var_config);
	85
71ee7dad RK	86	void __init omap_reserve(void)
	87	{
	88	omapfb_reserve_sdram();
	89	omap_vram_reserve_sdram();
	90	}
	91
075192ae KH	92	/*
	93	* 32KHz clocksource ... always available, on pretty most chips except
	94	* OMAP 730 and 1510. Other timers could be used as clocksources, with
	95	* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
	96	* but systems won't necessarily want to spend resources that way.
	97	*/
	98
a4ab0d83	99	#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
075192ae	100
a4ab0d83	101	#if !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX))
075192ae KH	102
	103	#include <linux/clocksource.h>
	104
2decb12e AK	105	/*
	106	* offset_32k holds the init time counter value. It is then subtracted
	107	* from every counter read to achieve a counter that counts time from the
	108	* kernel boot (needed for sched_clock()).
	109	*/
	110	static u32 offset_32k __read_mostly;
	111
a4ab0d83 TL	112	#ifdef CONFIG_ARCH_OMAP16XX
	113	static cycle_t omap16xx_32k_read(struct clocksource *cs)
	114	{
2decb12e	115	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
a4ab0d83 TL	116	}
	117	#else
	118	#define omap16xx_32k_read NULL
	119	#endif
	120
	121	#ifdef CONFIG_ARCH_OMAP2420
	122	static cycle_t omap2420_32k_read(struct clocksource *cs)
	123	{
2decb12e	124	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	125	}
	126	#else
	127	#define omap2420_32k_read NULL
	128	#endif
	129
	130	#ifdef CONFIG_ARCH_OMAP2430
	131	static cycle_t omap2430_32k_read(struct clocksource *cs)
	132	{
2decb12e	133	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	134	}
	135	#else
	136	#define omap2430_32k_read NULL
	137	#endif
	138
a8eb7ca0	139	#ifdef CONFIG_ARCH_OMAP3
a4ab0d83	140	static cycle_t omap34xx_32k_read(struct clocksource *cs)
075192ae	141	{
2decb12e	142	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	143	}
	144	#else
	145	#define omap34xx_32k_read NULL
	146	#endif
	147
44169075 SS	148	#ifdef CONFIG_ARCH_OMAP4
	149	static cycle_t omap44xx_32k_read(struct clocksource *cs)
	150	{
2decb12e	151	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
44169075 SS	152	}
	153	#else
	154	#define omap44xx_32k_read NULL
	155	#endif
	156
a4ab0d83 TL	157	/*
	158	* Kernel assumes that sched_clock can be called early but may not have
	159	* things ready yet.
	160	*/
	161	static cycle_t omap_32k_read_dummy(struct clocksource *cs)
	162	{
	163	return 0;
075192ae KH	164	}
	165
	166	static struct clocksource clocksource_32k = {
	167	.name = "32k_counter",
	168	.rating = 250,
a4ab0d83	169	.read = omap_32k_read_dummy,
075192ae KH	170	.mask = CLOCKSOURCE_MASK(32),
	171	.shift = 10,
	172	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	173	};
	174
f258b0c6 KH	175	/*
	176	* Returns current time from boot in nsecs. It's OK for this to wrap
	177	* around for now, as it's just a relative time stamp.
	178	*/
	179	unsigned long long sched_clock(void)
	180	{
0a544198 MS	181	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
0a544198 MS	182	clocksource_32k.mult, clocksource_32k.shift);
f258b0c6 KH	183	}
f258b0c6 KH	184
d92cfcbe KH	185	/**
	186	* read_persistent_clock - Return time from a persistent clock.
	187	*
	188	* Reads the time from a source which isn't disabled during PM, the
	189	* 32k sync timer. Convert the cycles elapsed since last read into
	190	* nsecs and adds to a monotonically increasing timespec.
	191	*/
	192	static struct timespec persistent_ts;
	193	static cycles_t cycles, last_cycles;
	194	void read_persistent_clock(struct timespec *ts)
	195	{
	196	unsigned long long nsecs;
	197	cycles_t delta;
	198	struct timespec *tsp = &persistent_ts;
	199
	200	last_cycles = cycles;
	201	cycles = clocksource_32k.read(&clocksource_32k);
	202	delta = cycles - last_cycles;
	203
	204	nsecs = clocksource_cyc2ns(delta,
	205	clocksource_32k.mult, clocksource_32k.shift);
	206
	207	timespec_add_ns(tsp, nsecs);
	208	ts = tsp;
	209	}
	210
075192ae KH	211	static int __init omap_init_clocksource_32k(void)
	212	{
	213	static char err[] __initdata = KERN_ERR
	214	"%s: can't register clocksource!\n";
	215
44595982 PW	216	if (cpu_is_omap16xx() \|\| cpu_class_is_omap2()) {
	217	struct clk *sync_32k_ick;
	218
a4ab0d83 TL	219	if (cpu_is_omap16xx())
	220	clocksource_32k.read = omap16xx_32k_read;
	221	else if (cpu_is_omap2420())
	222	clocksource_32k.read = omap2420_32k_read;
	223	else if (cpu_is_omap2430())
	224	clocksource_32k.read = omap2430_32k_read;
	225	else if (cpu_is_omap34xx())
	226	clocksource_32k.read = omap34xx_32k_read;
44169075 SS	227	else if (cpu_is_omap44xx())
44169075 SS	228	clocksource_32k.read = omap44xx_32k_read;
a4ab0d83 TL	229	else
	230	return -ENODEV;
	231
44595982 PW	232	sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
	233	if (sync_32k_ick)
	234	clk_enable(sync_32k_ick);
	235
075192ae KH	236	clocksource_32k.mult = clocksource_hz2mult(32768,
	237	clocksource_32k.shift);
	238
2decb12e AK	239	offset_32k = clocksource_32k.read(&clocksource_32k);
2decb12e AK	240
075192ae KH	241	if (clocksource_register(&clocksource_32k))
	242	printk(err, clocksource_32k.name);
	243	}
	244	return 0;
	245	}
	246	arch_initcall(omap_init_clocksource_32k);
	247
a4ab0d83	248	#endif /* !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX)) */
44595982 PW	249
	250	/* Global address base setup code */
	251
a58caad1 TL	252	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
a58caad1 TL	253
8f9ccfee	254	static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
a58caad1	255	{
0e564848	256	omap2_set_globals_tap(omap2_globals);
f2ab9977	257	omap2_set_globals_sdrc(omap2_globals);
a58caad1 TL	258	omap2_set_globals_control(omap2_globals);
a58caad1 TL	259	omap2_set_globals_prcm(omap2_globals);
4f2c49fe	260	omap2_set_globals_uart(omap2_globals);
a58caad1 TL	261	}
	262
	263	#endif
	264
44595982	265	#if defined(CONFIG_ARCH_OMAP2420)
a58caad1 TL	266
a58caad1 TL	267	static struct omap_globals omap242x_globals = {
0e564848	268	.class = OMAP242X_CLASS,
233fd64e	269	.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
b7ebb10b SS	270	.sdrc = OMAP2420_SDRC_BASE,
	271	.sms = OMAP2420_SMS_BASE,
	272	.ctrl = OMAP2420_CTRL_BASE,
	273	.prm = OMAP2420_PRM_BASE,
	274	.cm = OMAP2420_CM_BASE,
4f2c49fe TL	275	.uart1_phys = OMAP2_UART1_BASE,
	276	.uart2_phys = OMAP2_UART2_BASE,
	277	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	278	};
a58caad1 TL	279
44595982 PW	280	void __init omap2_set_globals_242x(void)
44595982 PW	281	{
8f9ccfee	282	__omap2_set_globals(&omap242x_globals);
44595982 PW	283	}
	284	#endif
	285
	286	#if defined(CONFIG_ARCH_OMAP2430)
a58caad1 TL	287
a58caad1 TL	288	static struct omap_globals omap243x_globals = {
0e564848	289	.class = OMAP243X_CLASS,
233fd64e	290	.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
b7ebb10b SS	291	.sdrc = OMAP243X_SDRC_BASE,
	292	.sms = OMAP243X_SMS_BASE,
	293	.ctrl = OMAP243X_CTRL_BASE,
	294	.prm = OMAP2430_PRM_BASE,
	295	.cm = OMAP2430_CM_BASE,
4f2c49fe TL	296	.uart1_phys = OMAP2_UART1_BASE,
	297	.uart2_phys = OMAP2_UART2_BASE,
	298	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	299	};
a58caad1 TL	300
44595982 PW	301	void __init omap2_set_globals_243x(void)
44595982 PW	302	{
8f9ccfee	303	__omap2_set_globals(&omap243x_globals);
44595982 PW	304	}
	305	#endif
	306
4f2c49fe	307	#if defined(CONFIG_ARCH_OMAP3)
a58caad1	308
4f2c49fe	309	static struct omap_globals omap3_globals = {
0e564848	310	.class = OMAP343X_CLASS,
233fd64e	311	.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
b7ebb10b SS	312	.sdrc = OMAP343X_SDRC_BASE,
	313	.sms = OMAP343X_SMS_BASE,
	314	.ctrl = OMAP343X_CTRL_BASE,
	315	.prm = OMAP3430_PRM_BASE,
	316	.cm = OMAP3430_CM_BASE,
4f2c49fe TL	317	.uart1_phys = OMAP3_UART1_BASE,
	318	.uart2_phys = OMAP3_UART2_BASE,
	319	.uart3_phys = OMAP3_UART3_BASE,
a58caad1 TL	320	};
a58caad1 TL	321
44595982 PW	322	void __init omap2_set_globals_343x(void)
44595982 PW	323	{
4f2c49fe TL	324	__omap2_set_globals(&omap3_globals);
	325	}
	326
	327	void __init omap2_set_globals_36xx(void)
	328	{
	329	omap3_globals.uart4_phys = OMAP3_UART4_BASE;
	330
	331	__omap2_set_globals(&omap3_globals);
44595982 PW	332	}
	333	#endif
	334
44169075 SS	335	#if defined(CONFIG_ARCH_OMAP4)
	336	static struct omap_globals omap4_globals = {
	337	.class = OMAP443X_CLASS,
b570e0ec	338	.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
b7ebb10b SS	339	.ctrl = OMAP443X_CTRL_BASE,
	340	.prm = OMAP4430_PRM_BASE,
	341	.cm = OMAP4430_CM_BASE,
	342	.cm2 = OMAP4430_CM2_BASE,
4f2c49fe TL	343	.uart1_phys = OMAP4_UART1_BASE,
	344	.uart2_phys = OMAP4_UART2_BASE,
	345	.uart3_phys = OMAP4_UART3_BASE,
	346	.uart4_phys = OMAP4_UART4_BASE,
44169075 SS	347	};
	348
	349	void __init omap2_set_globals_443x(void)
	350	{
	351	omap2_set_globals_tap(&omap4_globals);
	352	omap2_set_globals_control(&omap4_globals);
9ef89150	353	omap2_set_globals_prcm(&omap4_globals);
4f2c49fe	354	omap2_set_globals_uart(&omap4_globals);
44169075 SS	355	}
	356	#endif
	357