[deliverable/linux.git] / arch / arm / plat-omap / common.c

/*
 * linux/arch/arm/plat-omap/common.c
 *
 * Code common to all OMAP machines.
 * The file is created by Tony Lindgren <tony@atomide.com>
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/omapfb.h>

#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/setup.h>

#include <plat/common.h>
#include <plat/board.h>
#include <plat/control.h>
#include <plat/mux.h>
#include <plat/fpga.h>
#include <plat/serial.h>
#include <plat/vram.h>
#include <plat/dsp.h>

#include <plat/clock.h>

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
# include "../mach-omap2/sdrc.h"
#endif

#define NO_LENGTH_CHECK 0xffffffff

struct omap_board_config_kernel *omap_board_config;
int omap_board_config_size;

static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
{
	struct omap_board_config_kernel *kinfo = NULL;
	int i;

	/* Try to find the config from the board-specific structures
	 * in the kernel. */
	for (i = 0; i < omap_board_config_size; i++) {
		if (omap_board_config[i].tag == tag) {
			if (skip == 0) {
				kinfo = &omap_board_config[i];
				break;
			} else {
				skip--;
			}
		}
	}
	if (kinfo == NULL)
		return NULL;
	return kinfo->data;
}

const void *__omap_get_config(u16 tag, size_t len, int nr)
{
        return get_config(tag, len, nr, NULL);
}
EXPORT_SYMBOL(__omap_get_config);

const void *omap_get_var_config(u16 tag, size_t *len)
{
        return get_config(tag, NO_LENGTH_CHECK, 0, len);
}
EXPORT_SYMBOL(omap_get_var_config);

void __init omap_reserve(void)
{
	omapfb_reserve_sdram_memblock();
	omap_vram_reserve_sdram_memblock();
	omap_dsp_reserve_sdram_memblock();
}

/*
 * 32KHz clocksource ... always available, on pretty most chips except
 * OMAP 730 and 1510.  Other timers could be used as clocksources, with
 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
 * but systems won't necessarily want to spend resources that way.
 */

#define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410

#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))

#include <linux/clocksource.h>

/*
 * offset_32k holds the init time counter value. It is then subtracted
 * from every counter read to achieve a counter that counts time from the
 * kernel boot (needed for sched_clock()).
 */
static u32 offset_32k __read_mostly;

#ifdef CONFIG_ARCH_OMAP16XX
static cycle_t omap16xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
}
#else
#define omap16xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2420
static cycle_t omap2420_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap2420_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP2430
static cycle_t omap2430_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap2430_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP3
static cycle_t omap34xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap34xx_32k_read	NULL
#endif

#ifdef CONFIG_ARCH_OMAP4
static cycle_t omap44xx_32k_read(struct clocksource *cs)
{
	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
}
#else
#define omap44xx_32k_read	NULL
#endif

/*
 * Kernel assumes that sched_clock can be called early but may not have
 * things ready yet.
 */
static cycle_t omap_32k_read_dummy(struct clocksource *cs)
{
	return 0;
}

static struct clocksource clocksource_32k = {
	.name		= "32k_counter",
	.rating		= 250,
	.read		= omap_32k_read_dummy,
	.mask		= CLOCKSOURCE_MASK(32),
	.shift		= 10,
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};

/*
 * Returns current time from boot in nsecs. It's OK for this to wrap
 * around for now, as it's just a relative time stamp.
 */
unsigned long long sched_clock(void)
{
	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
				  clocksource_32k.mult, clocksource_32k.shift);
}

/**
 * read_persistent_clock -  Return time from a persistent clock.
 *
 * Reads the time from a source which isn't disabled during PM, the
 * 32k sync timer.  Convert the cycles elapsed since last read into
 * nsecs and adds to a monotonically increasing timespec.
 */
static struct timespec persistent_ts;
static cycles_t cycles, last_cycles;
void read_persistent_clock(struct timespec *ts)
{
	unsigned long long nsecs;
	cycles_t delta;
	struct timespec *tsp = &persistent_ts;

	last_cycles = cycles;
	cycles = clocksource_32k.read(&clocksource_32k);
	delta = cycles - last_cycles;

	nsecs = clocksource_cyc2ns(delta,
				   clocksource_32k.mult, clocksource_32k.shift);

	timespec_add_ns(tsp, nsecs);
	*ts = *tsp;
}

static int __init omap_init_clocksource_32k(void)
{
	static char err[] __initdata = KERN_ERR
			"%s: can't register clocksource!\n";

	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
		struct clk *sync_32k_ick;

		if (cpu_is_omap16xx())
			clocksource_32k.read = omap16xx_32k_read;
		else if (cpu_is_omap2420())
			clocksource_32k.read = omap2420_32k_read;
		else if (cpu_is_omap2430())
			clocksource_32k.read = omap2430_32k_read;
		else if (cpu_is_omap34xx())
			clocksource_32k.read = omap34xx_32k_read;
		else if (cpu_is_omap44xx())
			clocksource_32k.read = omap44xx_32k_read;
		else
			return -ENODEV;

		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
		if (sync_32k_ick)
			clk_enable(sync_32k_ick);

		clocksource_32k.mult = clocksource_hz2mult(32768,
					    clocksource_32k.shift);

		offset_32k = clocksource_32k.read(&clocksource_32k);

		if (clocksource_register(&clocksource_32k))
			printk(err, clocksource_32k.name);
	}
	return 0;
}
arch_initcall(omap_init_clocksource_32k);

#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */

/* Global address base setup code */

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
{
	omap2_set_globals_tap(omap2_globals);
	omap2_set_globals_sdrc(omap2_globals);
	omap2_set_globals_control(omap2_globals);
	omap2_set_globals_prcm(omap2_globals);
	omap2_set_globals_uart(omap2_globals);
}

#endif

#if defined(CONFIG_ARCH_OMAP2420)

static struct omap_globals omap242x_globals = {
	.class	= OMAP242X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x48014000),
	.sdrc	= OMAP2420_SDRC_BASE,
	.sms	= OMAP2420_SMS_BASE,
	.ctrl	= OMAP2420_CTRL_BASE,
	.prm	= OMAP2420_PRM_BASE,
	.cm	= OMAP2420_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_242x(void)
{
	__omap2_set_globals(&omap242x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP2430)

static struct omap_globals omap243x_globals = {
	.class	= OMAP243X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4900a000),
	.sdrc	= OMAP243X_SDRC_BASE,
	.sms	= OMAP243X_SMS_BASE,
	.ctrl	= OMAP243X_CTRL_BASE,
	.prm	= OMAP2430_PRM_BASE,
	.cm	= OMAP2430_CM_BASE,
	.uart1_phys	= OMAP2_UART1_BASE,
	.uart2_phys	= OMAP2_UART2_BASE,
	.uart3_phys	= OMAP2_UART3_BASE,
};

void __init omap2_set_globals_243x(void)
{
	__omap2_set_globals(&omap243x_globals);
}
#endif

#if defined(CONFIG_ARCH_OMAP3)

static struct omap_globals omap3_globals = {
	.class	= OMAP343X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(0x4830A000),
	.sdrc	= OMAP343X_SDRC_BASE,
	.sms	= OMAP343X_SMS_BASE,
	.ctrl	= OMAP343X_CTRL_BASE,
	.prm	= OMAP3430_PRM_BASE,
	.cm	= OMAP3430_CM_BASE,
	.uart1_phys	= OMAP3_UART1_BASE,
	.uart2_phys	= OMAP3_UART2_BASE,
	.uart3_phys	= OMAP3_UART3_BASE,
	.uart4_phys	= OMAP3_UART4_BASE,	/* Only on 3630 */
};

void __init omap2_set_globals_3xxx(void)
{
	__omap2_set_globals(&omap3_globals);
}

void __init omap3_map_io(void)
{
	omap2_set_globals_3xxx();
	omap34xx_map_common_io();
}
#endif

#if defined(CONFIG_ARCH_OMAP4)
static struct omap_globals omap4_globals = {
	.class	= OMAP443X_CLASS,
	.tap	= OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
	.ctrl	= OMAP443X_CTRL_BASE,
	.prm	= OMAP4430_PRM_BASE,
	.cm	= OMAP4430_CM_BASE,
	.cm2	= OMAP4430_CM2_BASE,
	.uart1_phys	= OMAP4_UART1_BASE,
	.uart2_phys	= OMAP4_UART2_BASE,
	.uart3_phys	= OMAP4_UART3_BASE,
	.uart4_phys	= OMAP4_UART4_BASE,
};

void __init omap2_set_globals_443x(void)
{
	omap2_set_globals_tap(&omap4_globals);
	omap2_set_globals_control(&omap4_globals);
	omap2_set_globals_prcm(&omap4_globals);
	omap2_set_globals_uart(&omap4_globals);
}
#endif
Commit	Line	Data
5e1c5ff4 TL	1	/*
	2	* linux/arch/arm/plat-omap/common.c
	3	*
	4	* Code common to all OMAP machines.
44169075 SS	5	* The file is created by Tony Lindgren <tony@atomide.com>
	6	*
	7	* Copyright (C) 2009 Texas Instruments
	8	* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
5e1c5ff4 TL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
5e1c5ff4 TL	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
5e1c5ff4 TL	18	#include <linux/console.h>
	19	#include <linux/serial.h>
	20	#include <linux/tty.h>
	21	#include <linux/serial_8250.h>
	22	#include <linux/serial_reg.h>
f8ce2547	23	#include <linux/clk.h>
fced80c7	24	#include <linux/io.h>
71ee7dad	25	#include <linux/omapfb.h>
5e1c5ff4	26
a09e64fb	27	#include <mach/hardware.h>
5e1c5ff4 TL	28	#include <asm/system.h>
	29	#include <asm/pgtable.h>
	30	#include <asm/mach/map.h>
92105bb7	31	#include <asm/setup.h>
5e1c5ff4	32
ce491cf8 TL	33	#include <plat/common.h>
	34	#include <plat/board.h>
	35	#include <plat/control.h>
	36	#include <plat/mux.h>
	37	#include <plat/fpga.h>
4f2c49fe	38	#include <plat/serial.h>
71ee7dad	39	#include <plat/vram.h>
90173882	40	#include <plat/dsp.h>
5e1c5ff4	41
ce491cf8	42	#include <plat/clock.h>
5e1c5ff4	43
44595982 PW	44	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
	45	# include "../mach-omap2/sdrc.h"
	46	#endif
	47
5e1c5ff4 TL	48	#define NO_LENGTH_CHECK 0xffffffff
5e1c5ff4 TL	49
5e1c5ff4	50	struct omap_board_config_kernel *omap_board_config;
92105bb7	51	int omap_board_config_size;
5e1c5ff4 TL	52
	53	static const void get_config(u16 tag, size_t len, int skip, size_t len_out)
	54	{
	55	struct omap_board_config_kernel *kinfo = NULL;
	56	int i;
	57
5e1c5ff4 TL	58	/* Try to find the config from the board-specific structures
	59	* in the kernel. */
	60	for (i = 0; i < omap_board_config_size; i++) {
	61	if (omap_board_config[i].tag == tag) {
c40fae95 TL	62	if (skip == 0) {
	63	kinfo = &omap_board_config[i];
	64	break;
	65	} else {
	66	skip--;
	67	}
5e1c5ff4 TL	68	}
	69	}
	70	if (kinfo == NULL)
	71	return NULL;
	72	return kinfo->data;
	73	}
	74
	75	const void *__omap_get_config(u16 tag, size_t len, int nr)
	76	{
	77	return get_config(tag, len, nr, NULL);
	78	}
	79	EXPORT_SYMBOL(__omap_get_config);
	80
	81	const void omap_get_var_config(u16 tag, size_t len)
	82	{
	83	return get_config(tag, NO_LENGTH_CHECK, 0, len);
	84	}
	85	EXPORT_SYMBOL(omap_get_var_config);
	86
71ee7dad RK	87	void __init omap_reserve(void)
71ee7dad RK	88	{
98864ff5 RK	89	omapfb_reserve_sdram_memblock();
98864ff5 RK	90	omap_vram_reserve_sdram_memblock();
90173882	91	omap_dsp_reserve_sdram_memblock();
71ee7dad RK	92	}
71ee7dad RK	93
075192ae KH	94	/*
	95	* 32KHz clocksource ... always available, on pretty most chips except
	96	* OMAP 730 and 1510. Other timers could be used as clocksources, with
	97	* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
	98	* but systems won't necessarily want to spend resources that way.
	99	*/
	100
a4ab0d83	101	#define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
075192ae	102
a4ab0d83	103	#if !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX))
075192ae KH	104
	105	#include <linux/clocksource.h>
	106
2decb12e AK	107	/*
	108	* offset_32k holds the init time counter value. It is then subtracted
	109	* from every counter read to achieve a counter that counts time from the
	110	* kernel boot (needed for sched_clock()).
	111	*/
	112	static u32 offset_32k __read_mostly;
	113
a4ab0d83 TL	114	#ifdef CONFIG_ARCH_OMAP16XX
	115	static cycle_t omap16xx_32k_read(struct clocksource *cs)
	116	{
2decb12e	117	return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED) - offset_32k;
a4ab0d83 TL	118	}
	119	#else
	120	#define omap16xx_32k_read NULL
	121	#endif
	122
	123	#ifdef CONFIG_ARCH_OMAP2420
	124	static cycle_t omap2420_32k_read(struct clocksource *cs)
	125	{
2decb12e	126	return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	127	}
	128	#else
	129	#define omap2420_32k_read NULL
	130	#endif
	131
	132	#ifdef CONFIG_ARCH_OMAP2430
	133	static cycle_t omap2430_32k_read(struct clocksource *cs)
	134	{
2decb12e	135	return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	136	}
	137	#else
	138	#define omap2430_32k_read NULL
	139	#endif
	140
a8eb7ca0	141	#ifdef CONFIG_ARCH_OMAP3
a4ab0d83	142	static cycle_t omap34xx_32k_read(struct clocksource *cs)
075192ae	143	{
2decb12e	144	return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10) - offset_32k;
a4ab0d83 TL	145	}
	146	#else
	147	#define omap34xx_32k_read NULL
	148	#endif
	149
44169075 SS	150	#ifdef CONFIG_ARCH_OMAP4
	151	static cycle_t omap44xx_32k_read(struct clocksource *cs)
	152	{
2decb12e	153	return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10) - offset_32k;
44169075 SS	154	}
	155	#else
	156	#define omap44xx_32k_read NULL
	157	#endif
	158
a4ab0d83 TL	159	/*
	160	* Kernel assumes that sched_clock can be called early but may not have
	161	* things ready yet.
	162	*/
	163	static cycle_t omap_32k_read_dummy(struct clocksource *cs)
	164	{
	165	return 0;
075192ae KH	166	}
	167
	168	static struct clocksource clocksource_32k = {
	169	.name = "32k_counter",
	170	.rating = 250,
a4ab0d83	171	.read = omap_32k_read_dummy,
075192ae KH	172	.mask = CLOCKSOURCE_MASK(32),
	173	.shift = 10,
	174	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	175	};
	176
f258b0c6 KH	177	/*
	178	* Returns current time from boot in nsecs. It's OK for this to wrap
	179	* around for now, as it's just a relative time stamp.
	180	*/
	181	unsigned long long sched_clock(void)
	182	{
0a544198 MS	183	return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
0a544198 MS	184	clocksource_32k.mult, clocksource_32k.shift);
f258b0c6 KH	185	}
f258b0c6 KH	186
d92cfcbe KH	187	/**
	188	* read_persistent_clock - Return time from a persistent clock.
	189	*
	190	* Reads the time from a source which isn't disabled during PM, the
	191	* 32k sync timer. Convert the cycles elapsed since last read into
	192	* nsecs and adds to a monotonically increasing timespec.
	193	*/
	194	static struct timespec persistent_ts;
	195	static cycles_t cycles, last_cycles;
	196	void read_persistent_clock(struct timespec *ts)
	197	{
	198	unsigned long long nsecs;
	199	cycles_t delta;
	200	struct timespec *tsp = &persistent_ts;
	201
	202	last_cycles = cycles;
	203	cycles = clocksource_32k.read(&clocksource_32k);
	204	delta = cycles - last_cycles;
	205
	206	nsecs = clocksource_cyc2ns(delta,
	207	clocksource_32k.mult, clocksource_32k.shift);
	208
	209	timespec_add_ns(tsp, nsecs);
	210	ts = tsp;
	211	}
	212
075192ae KH	213	static int __init omap_init_clocksource_32k(void)
	214	{
	215	static char err[] __initdata = KERN_ERR
	216	"%s: can't register clocksource!\n";
	217
44595982 PW	218	if (cpu_is_omap16xx() \|\| cpu_class_is_omap2()) {
	219	struct clk *sync_32k_ick;
	220
a4ab0d83 TL	221	if (cpu_is_omap16xx())
	222	clocksource_32k.read = omap16xx_32k_read;
	223	else if (cpu_is_omap2420())
	224	clocksource_32k.read = omap2420_32k_read;
	225	else if (cpu_is_omap2430())
	226	clocksource_32k.read = omap2430_32k_read;
	227	else if (cpu_is_omap34xx())
	228	clocksource_32k.read = omap34xx_32k_read;
44169075 SS	229	else if (cpu_is_omap44xx())
44169075 SS	230	clocksource_32k.read = omap44xx_32k_read;
a4ab0d83 TL	231	else
	232	return -ENODEV;
	233
44595982 PW	234	sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
	235	if (sync_32k_ick)
	236	clk_enable(sync_32k_ick);
	237
075192ae KH	238	clocksource_32k.mult = clocksource_hz2mult(32768,
	239	clocksource_32k.shift);
	240
2decb12e AK	241	offset_32k = clocksource_32k.read(&clocksource_32k);
2decb12e AK	242
075192ae KH	243	if (clocksource_register(&clocksource_32k))
	244	printk(err, clocksource_32k.name);
	245	}
	246	return 0;
	247	}
	248	arch_initcall(omap_init_clocksource_32k);
	249
a4ab0d83	250	#endif /* !(defined(CONFIG_ARCH_OMAP730) \|\| defined(CONFIG_ARCH_OMAP15XX)) */
44595982 PW	251
	252	/* Global address base setup code */
	253
a58caad1 TL	254	#if defined(CONFIG_ARCH_OMAP2) \|\| defined(CONFIG_ARCH_OMAP3)
a58caad1 TL	255
8f9ccfee	256	static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
a58caad1	257	{
0e564848	258	omap2_set_globals_tap(omap2_globals);
f2ab9977	259	omap2_set_globals_sdrc(omap2_globals);
a58caad1 TL	260	omap2_set_globals_control(omap2_globals);
a58caad1 TL	261	omap2_set_globals_prcm(omap2_globals);
4f2c49fe	262	omap2_set_globals_uart(omap2_globals);
a58caad1 TL	263	}
	264
	265	#endif
	266
44595982	267	#if defined(CONFIG_ARCH_OMAP2420)
a58caad1 TL	268
a58caad1 TL	269	static struct omap_globals omap242x_globals = {
0e564848	270	.class = OMAP242X_CLASS,
233fd64e	271	.tap = OMAP2_L4_IO_ADDRESS(0x48014000),
b7ebb10b SS	272	.sdrc = OMAP2420_SDRC_BASE,
	273	.sms = OMAP2420_SMS_BASE,
	274	.ctrl = OMAP2420_CTRL_BASE,
	275	.prm = OMAP2420_PRM_BASE,
	276	.cm = OMAP2420_CM_BASE,
4f2c49fe TL	277	.uart1_phys = OMAP2_UART1_BASE,
	278	.uart2_phys = OMAP2_UART2_BASE,
	279	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	280	};
a58caad1 TL	281
44595982 PW	282	void __init omap2_set_globals_242x(void)
44595982 PW	283	{
8f9ccfee	284	__omap2_set_globals(&omap242x_globals);
44595982 PW	285	}
	286	#endif
	287
	288	#if defined(CONFIG_ARCH_OMAP2430)
a58caad1 TL	289
a58caad1 TL	290	static struct omap_globals omap243x_globals = {
0e564848	291	.class = OMAP243X_CLASS,
233fd64e	292	.tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
b7ebb10b SS	293	.sdrc = OMAP243X_SDRC_BASE,
	294	.sms = OMAP243X_SMS_BASE,
	295	.ctrl = OMAP243X_CTRL_BASE,
	296	.prm = OMAP2430_PRM_BASE,
	297	.cm = OMAP2430_CM_BASE,
4f2c49fe TL	298	.uart1_phys = OMAP2_UART1_BASE,
	299	.uart2_phys = OMAP2_UART2_BASE,
	300	.uart3_phys = OMAP2_UART3_BASE,
a58caad1 TL	301	};
a58caad1 TL	302
44595982 PW	303	void __init omap2_set_globals_243x(void)
44595982 PW	304	{
8f9ccfee	305	__omap2_set_globals(&omap243x_globals);
44595982 PW	306	}
	307	#endif
	308
4f2c49fe	309	#if defined(CONFIG_ARCH_OMAP3)
a58caad1	310
4f2c49fe	311	static struct omap_globals omap3_globals = {
0e564848	312	.class = OMAP343X_CLASS,
233fd64e	313	.tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
b7ebb10b SS	314	.sdrc = OMAP343X_SDRC_BASE,
	315	.sms = OMAP343X_SMS_BASE,
	316	.ctrl = OMAP343X_CTRL_BASE,
	317	.prm = OMAP3430_PRM_BASE,
	318	.cm = OMAP3430_CM_BASE,
4f2c49fe TL	319	.uart1_phys = OMAP3_UART1_BASE,
	320	.uart2_phys = OMAP3_UART2_BASE,
	321	.uart3_phys = OMAP3_UART3_BASE,
c573bcf9	322	.uart4_phys = OMAP3_UART4_BASE, /* Only on 3630 */
a58caad1 TL	323	};
a58caad1 TL	324
c573bcf9	325	void __init omap2_set_globals_3xxx(void)
44595982	326	{
4f2c49fe TL	327	__omap2_set_globals(&omap3_globals);
4f2c49fe TL	328	}
869fef41 MR	329
	330	void __init omap3_map_io(void)
	331	{
	332	omap2_set_globals_3xxx();
	333	omap34xx_map_common_io();
	334	}
44595982 PW	335	#endif
44595982 PW	336
44169075 SS	337	#if defined(CONFIG_ARCH_OMAP4)
	338	static struct omap_globals omap4_globals = {
	339	.class = OMAP443X_CLASS,
b570e0ec	340	.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
b7ebb10b SS	341	.ctrl = OMAP443X_CTRL_BASE,
	342	.prm = OMAP4430_PRM_BASE,
	343	.cm = OMAP4430_CM_BASE,
	344	.cm2 = OMAP4430_CM2_BASE,
4f2c49fe TL	345	.uart1_phys = OMAP4_UART1_BASE,
	346	.uart2_phys = OMAP4_UART2_BASE,
	347	.uart3_phys = OMAP4_UART3_BASE,
	348	.uart4_phys = OMAP4_UART4_BASE,
44169075 SS	349	};
	350
	351	void __init omap2_set_globals_443x(void)
	352	{
	353	omap2_set_globals_tap(&omap4_globals);
	354	omap2_set_globals_control(&omap4_globals);
9ef89150	355	omap2_set_globals_prcm(&omap4_globals);
4f2c49fe	356	omap2_set_globals_uart(&omap4_globals);
44169075 SS	357	}
	358	#endif
	359