Commit | Line | Data |
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1a8bfa1e TL |
1 | /* |
2 | * linux/arch/arm/plat-omap/devices.c | |
3 | * | |
4 | * Common platform device setup/initialization for OMAP1 and OMAP2 | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
1a8bfa1e TL |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/platform_device.h> | |
fced80c7 | 16 | #include <linux/io.h> |
5a0e3ad6 | 17 | #include <linux/slab.h> |
90173882 | 18 | #include <linux/memblock.h> |
1a8bfa1e | 19 | |
a09e64fb | 20 | #include <mach/hardware.h> |
1a8bfa1e TL |
21 | #include <asm/mach-types.h> |
22 | #include <asm/mach/map.h> | |
23 | ||
ce491cf8 TL |
24 | #include <plat/tc.h> |
25 | #include <plat/control.h> | |
26 | #include <plat/board.h> | |
27 | #include <plat/mmc.h> | |
a09e64fb | 28 | #include <mach/gpio.h> |
ce491cf8 TL |
29 | #include <plat/menelaus.h> |
30 | #include <plat/mcbsp.h> | |
d6a2d9b8 | 31 | #include <plat/omap44xx.h> |
1a8bfa1e | 32 | |
9b6553cd | 33 | /*-------------------------------------------------------------------------*/ |
9b6553cd | 34 | |
bc5d0c89 EV |
35 | #if defined(CONFIG_OMAP_MCBSP) || defined(CONFIG_OMAP_MCBSP_MODULE) |
36 | ||
37 | static struct platform_device **omap_mcbsp_devices; | |
38 | ||
39 | void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, | |
40 | int size) | |
41 | { | |
42 | int i; | |
43 | ||
bc5d0c89 EV |
44 | omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), |
45 | GFP_KERNEL); | |
46 | if (!omap_mcbsp_devices) { | |
47 | printk(KERN_ERR "Could not register McBSP devices\n"); | |
48 | return; | |
49 | } | |
50 | ||
51 | for (i = 0; i < size; i++) { | |
52 | struct platform_device *new_mcbsp; | |
53 | int ret; | |
54 | ||
55 | new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1); | |
56 | if (!new_mcbsp) | |
57 | continue; | |
58 | new_mcbsp->dev.platform_data = &config[i]; | |
59 | ret = platform_device_add(new_mcbsp); | |
60 | if (ret) { | |
61 | platform_device_put(new_mcbsp); | |
62 | continue; | |
63 | } | |
64 | omap_mcbsp_devices[i] = new_mcbsp; | |
65 | } | |
66 | } | |
67 | ||
68 | #else | |
69 | void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, | |
70 | int size) | |
71 | { } | |
72 | #endif | |
73 | ||
1a8bfa1e TL |
74 | /*-------------------------------------------------------------------------*/ |
75 | ||
d6a2d9b8 JEC |
76 | #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ |
77 | defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) | |
78 | ||
79 | static struct resource mcpdm_resources[] = { | |
80 | { | |
81 | .name = "mcpdm_mem", | |
82 | .start = OMAP44XX_MCPDM_BASE, | |
83 | .end = OMAP44XX_MCPDM_BASE + SZ_4K, | |
84 | .flags = IORESOURCE_MEM, | |
85 | }, | |
86 | { | |
87 | .name = "mcpdm_irq", | |
5772ca7d SS |
88 | .start = OMAP44XX_IRQ_MCPDM, |
89 | .end = OMAP44XX_IRQ_MCPDM, | |
d6a2d9b8 JEC |
90 | .flags = IORESOURCE_IRQ, |
91 | }, | |
92 | }; | |
93 | ||
94 | static struct platform_device omap_mcpdm_device = { | |
95 | .name = "omap-mcpdm", | |
96 | .id = -1, | |
97 | .num_resources = ARRAY_SIZE(mcpdm_resources), | |
98 | .resource = mcpdm_resources, | |
99 | }; | |
100 | ||
101 | static void omap_init_mcpdm(void) | |
102 | { | |
103 | (void) platform_device_register(&omap_mcpdm_device); | |
104 | } | |
105 | #else | |
106 | static inline void omap_init_mcpdm(void) {} | |
107 | #endif | |
108 | ||
109 | /*-------------------------------------------------------------------------*/ | |
110 | ||
d8874665 | 111 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ |
7736c09c | 112 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) |
1a8bfa1e | 113 | |
d8874665 | 114 | #define OMAP_MMC_NR_RES 2 |
7736c09c | 115 | |
d8874665 TL |
116 | /* |
117 | * Register MMC devices. Called from mach-omap1 and mach-omap2 device init. | |
118 | */ | |
0dffb5c5 TL |
119 | int __init omap_mmc_add(const char *name, int id, unsigned long base, |
120 | unsigned long size, unsigned int irq, | |
121 | struct omap_mmc_platform_data *data) | |
7736c09c | 122 | { |
d8874665 TL |
123 | struct platform_device *pdev; |
124 | struct resource res[OMAP_MMC_NR_RES]; | |
125 | int ret; | |
126 | ||
0dffb5c5 | 127 | pdev = platform_device_alloc(name, id); |
d8874665 TL |
128 | if (!pdev) |
129 | return -ENOMEM; | |
130 | ||
131 | memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); | |
132 | res[0].start = base; | |
133 | res[0].end = base + size - 1; | |
134 | res[0].flags = IORESOURCE_MEM; | |
135 | res[1].start = res[1].end = irq; | |
136 | res[1].flags = IORESOURCE_IRQ; | |
137 | ||
138 | ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); | |
139 | if (ret == 0) | |
140 | ret = platform_device_add_data(pdev, data, sizeof(*data)); | |
141 | if (ret) | |
142 | goto fail; | |
143 | ||
144 | ret = platform_device_add(pdev); | |
145 | if (ret) | |
146 | goto fail; | |
01971f65 DB |
147 | |
148 | /* return device handle to board setup code */ | |
149 | data->dev = &pdev->dev; | |
d8874665 | 150 | return 0; |
7736c09c | 151 | |
d8874665 TL |
152 | fail: |
153 | platform_device_put(pdev); | |
154 | return ret; | |
7736c09c RK |
155 | } |
156 | ||
1a8bfa1e TL |
157 | #endif |
158 | ||
9b6553cd TL |
159 | /*-------------------------------------------------------------------------*/ |
160 | ||
3bfe8971 LM |
161 | #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE) |
162 | ||
088ef950 | 163 | #ifdef CONFIG_ARCH_OMAP2 |
3bfe8971 LM |
164 | #define OMAP_RNG_BASE 0x480A0000 |
165 | #else | |
166 | #define OMAP_RNG_BASE 0xfffe5000 | |
167 | #endif | |
168 | ||
169 | static struct resource rng_resources[] = { | |
170 | { | |
171 | .start = OMAP_RNG_BASE, | |
172 | .end = OMAP_RNG_BASE + 0x4f, | |
173 | .flags = IORESOURCE_MEM, | |
174 | }, | |
175 | }; | |
176 | ||
177 | static struct platform_device omap_rng_device = { | |
178 | .name = "omap_rng", | |
179 | .id = -1, | |
180 | .num_resources = ARRAY_SIZE(rng_resources), | |
181 | .resource = rng_resources, | |
182 | }; | |
183 | ||
184 | static void omap_init_rng(void) | |
185 | { | |
186 | (void) platform_device_register(&omap_rng_device); | |
187 | } | |
188 | #else | |
189 | static inline void omap_init_rng(void) {} | |
190 | #endif | |
191 | ||
192 | /*-------------------------------------------------------------------------*/ | |
193 | ||
9b6553cd TL |
194 | /* Numbering for the SPI-capable controllers when used for SPI: |
195 | * spi = 1 | |
196 | * uwire = 2 | |
197 | * mmc1..2 = 3..4 | |
198 | * mcbsp1..3 = 5..7 | |
199 | */ | |
200 | ||
201 | #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE) | |
202 | ||
203 | #define OMAP_UWIRE_BASE 0xfffb3000 | |
204 | ||
205 | static struct resource uwire_resources[] = { | |
206 | { | |
207 | .start = OMAP_UWIRE_BASE, | |
208 | .end = OMAP_UWIRE_BASE + 0x20, | |
209 | .flags = IORESOURCE_MEM, | |
210 | }, | |
211 | }; | |
212 | ||
213 | static struct platform_device omap_uwire_device = { | |
214 | .name = "omap_uwire", | |
215 | .id = -1, | |
9b6553cd TL |
216 | .num_resources = ARRAY_SIZE(uwire_resources), |
217 | .resource = uwire_resources, | |
218 | }; | |
219 | ||
220 | static void omap_init_uwire(void) | |
221 | { | |
222 | /* FIXME define and use a boot tag; not all boards will be hooking | |
223 | * up devices to the microwire controller, and multi-board configs | |
224 | * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway... | |
225 | */ | |
226 | ||
227 | /* board-specific code must configure chipselects (only a few | |
228 | * are normally used) and SCLK/SDI/SDO (each has two choices). | |
229 | */ | |
230 | (void) platform_device_register(&omap_uwire_device); | |
231 | } | |
232 | #else | |
233 | static inline void omap_init_uwire(void) {} | |
234 | #endif | |
235 | ||
236 | /*-------------------------------------------------------------------------*/ | |
237 | ||
1a8bfa1e TL |
238 | #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) |
239 | ||
1a8bfa1e TL |
240 | static struct resource wdt_resources[] = { |
241 | { | |
1a8bfa1e TL |
242 | .flags = IORESOURCE_MEM, |
243 | }, | |
244 | }; | |
245 | ||
246 | static struct platform_device omap_wdt_device = { | |
247 | .name = "omap_wdt", | |
248 | .id = -1, | |
1a8bfa1e TL |
249 | .num_resources = ARRAY_SIZE(wdt_resources), |
250 | .resource = wdt_resources, | |
251 | }; | |
252 | ||
253 | static void omap_init_wdt(void) | |
254 | { | |
2817142f FB |
255 | if (cpu_is_omap16xx()) |
256 | wdt_resources[0].start = 0xfffeb000; | |
257 | else if (cpu_is_omap2420()) | |
258 | wdt_resources[0].start = 0x48022000; /* WDT2 */ | |
259 | else if (cpu_is_omap2430()) | |
260 | wdt_resources[0].start = 0x49016000; /* WDT2 */ | |
261 | else if (cpu_is_omap343x()) | |
262 | wdt_resources[0].start = 0x48314000; /* WDT2 */ | |
44169075 SS |
263 | else if (cpu_is_omap44xx()) |
264 | wdt_resources[0].start = 0x4a314000; | |
2817142f FB |
265 | else |
266 | return; | |
267 | ||
268 | wdt_resources[0].end = wdt_resources[0].start + 0x4f; | |
269 | ||
1a8bfa1e TL |
270 | (void) platform_device_register(&omap_wdt_device); |
271 | } | |
272 | #else | |
273 | static inline void omap_init_wdt(void) {} | |
274 | #endif | |
275 | ||
90173882 FC |
276 | #if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE) |
277 | ||
278 | static phys_addr_t omap_dsp_phys_mempool_base; | |
279 | ||
280 | void __init omap_dsp_reserve_sdram_memblock(void) | |
281 | { | |
282 | phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; | |
283 | phys_addr_t paddr; | |
284 | ||
285 | if (!size) | |
286 | return; | |
287 | ||
288 | paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT); | |
289 | if (!paddr) { | |
290 | pr_err("%s: failed to reserve %x bytes\n", | |
291 | __func__, size); | |
292 | return; | |
293 | } | |
294 | ||
295 | omap_dsp_phys_mempool_base = paddr; | |
296 | } | |
297 | ||
298 | phys_addr_t omap_dsp_get_mempool_base(void) | |
299 | { | |
300 | return omap_dsp_phys_mempool_base; | |
301 | } | |
302 | EXPORT_SYMBOL(omap_dsp_get_mempool_base); | |
303 | #endif | |
304 | ||
1a8bfa1e TL |
305 | /* |
306 | * This gets called after board-specific INIT_MACHINE, and initializes most | |
307 | * on-chip peripherals accessible on this board (except for few like USB): | |
308 | * | |
309 | * (a) Does any "standard config" pin muxing needed. Board-specific | |
310 | * code will have muxed GPIO pins and done "nonstandard" setup; | |
311 | * that code could live in the boot loader. | |
312 | * (b) Populating board-specific platform_data with the data drivers | |
313 | * rely on to handle wiring variations. | |
314 | * (c) Creating platform devices as meaningful on this board and | |
315 | * with this kernel configuration. | |
316 | * | |
317 | * Claiming GPIOs, and setting their direction and initial values, is the | |
318 | * responsibility of the device drivers. So is responding to probe(). | |
319 | * | |
320 | * Board-specific knowlege like creating devices or pin setup is to be | |
321 | * kept out of drivers as much as possible. In particular, pin setup | |
322 | * may be handled by the boot loader, and drivers should expect it will | |
323 | * normally have been done by the time they're probed. | |
324 | */ | |
325 | static int __init omap_init_devices(void) | |
326 | { | |
327 | /* please keep these calls, and their implementations above, | |
328 | * in alphabetical order so they're easier to sort through. | |
329 | */ | |
3bfe8971 | 330 | omap_init_rng(); |
d6a2d9b8 | 331 | omap_init_mcpdm(); |
9b6553cd | 332 | omap_init_uwire(); |
1a8bfa1e | 333 | omap_init_wdt(); |
1a8bfa1e TL |
334 | return 0; |
335 | } | |
336 | arch_initcall(omap_init_devices); |