[deliverable/linux.git] / arch / arm / plat-omap / i2c.c

/*
 * linux/arch/arm/plat-omap/i2c.c
 *
 * Helper module for board specific I2C bus registration
 *
 * Copyright (C) 2007 Nokia Corporation.
 *
 * Contact: Jarkko Nikula <jhnikula@gmail.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>

#include <mach/irqs.h>
#include <plat/i2c.h>
#include <plat/omap_device.h>

#define OMAP_I2C_SIZE		0x3f
#define OMAP1_I2C_BASE		0xfffb3800
#define OMAP1_INT_I2C		(32 + 4)

static const char name[] = "omap_i2c";

#define I2C_RESOURCE_BUILDER(base, irq)			\
	{						\
		.start	= (base),			\
		.end	= (base) + OMAP_I2C_SIZE,	\
		.flags	= IORESOURCE_MEM,		\
	},						\
	{						\
		.start	= (irq),			\
		.flags	= IORESOURCE_IRQ,		\
	},

static struct resource i2c_resources[][2] = {
	{ I2C_RESOURCE_BUILDER(0, 0) },
};

#define I2C_DEV_BUILDER(bus_id, res, data)		\
	{						\
		.id	= (bus_id),			\
		.name	= name,				\
		.num_resources	= ARRAY_SIZE(res),	\
		.resource	= (res),		\
		.dev		= {			\
			.platform_data	= (data),	\
		},					\
	}

#define MAX_OMAP_I2C_HWMOD_NAME_LEN	16
#define OMAP_I2C_MAX_CONTROLLERS 4
static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
static struct platform_device omap_i2c_devices[] = {
	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
};

#define OMAP_I2C_CMDLINE_SETUP	(BIT(31))

static int __init omap_i2c_nr_ports(void)
{
	int ports = 0;

	if (cpu_class_is_omap1())
		ports = 1;
	else if (cpu_is_omap24xx())
		ports = 2;
	else if (cpu_is_omap34xx())
		ports = 3;
	else if (cpu_is_omap44xx())
		ports = 4;

	return ports;
}

static inline int omap1_i2c_add_bus(int bus_id)
{
	struct platform_device *pdev;
	struct omap_i2c_bus_platform_data *pdata;
	struct resource *res;

	omap1_i2c_mux_pins(bus_id);

	pdev = &omap_i2c_devices[bus_id - 1];
	res = pdev->resource;
	res[0].start = OMAP1_I2C_BASE;
	res[0].end = res[0].start + OMAP_I2C_SIZE;
	res[1].start = OMAP1_INT_I2C;
	pdata = &i2c_pdata[bus_id - 1];

	/* all OMAP1 have IP version 1 register set */
	pdata->rev = OMAP_I2C_IP_VERSION_1;

	/* all OMAP1 I2C are implemented like this */
	pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
		       OMAP_I2C_FLAG_SIMPLE_CLOCK |
		       OMAP_I2C_FLAG_16BIT_DATA_REG |
		       OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;

	/* how the cpu bus is wired up differs for 7xx only */

	if (cpu_is_omap7xx())
		pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
	else
		pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;

	return platform_device_register(pdev);
}


#ifdef CONFIG_ARCH_OMAP2PLUS
static inline int omap2_i2c_add_bus(int bus_id)
{
	int l;
	struct omap_hwmod *oh;
	struct platform_device *pdev;
	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
	struct omap_i2c_bus_platform_data *pdata;
	struct omap_i2c_dev_attr *dev_attr;

	omap2_i2c_mux_pins(bus_id);

	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
		"String buffer overflow in I2C%d device setup\n", bus_id);
	oh = omap_hwmod_lookup(oh_name);
	if (!oh) {
			pr_err("Could not look up %s\n", oh_name);
			return -EEXIST;
	}

	pdata = &i2c_pdata[bus_id - 1];
	/*
	 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
	 * use, and functionality implementation flags, up to the OMAP I2C
	 * driver via platform data
	 */
	pdata->rev = oh->class->rev;

	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
	pdata->flags = dev_attr->flags;

	pdev = omap_device_build(name, bus_id, oh, pdata,
			sizeof(struct omap_i2c_bus_platform_data),
			NULL, 0, 0);
	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);

	return PTR_RET(pdev);
}
#else
static inline int omap2_i2c_add_bus(int bus_id)
{
	return 0;
}
#endif

static int __init omap_i2c_add_bus(int bus_id)
{
	if (cpu_class_is_omap1())
		return omap1_i2c_add_bus(bus_id);
	else
		return omap2_i2c_add_bus(bus_id);
}

/**
 * omap_i2c_bus_setup - Process command line options for the I2C bus speed
 * @str: String of options
 *
 * This function allow to override the default I2C bus speed for given I2C
 * bus with a command line option.
 *
 * Format: i2c_bus=bus_id,clkrate (in kHz)
 *
 * Returns 1 on success, 0 otherwise.
 */
static int __init omap_i2c_bus_setup(char *str)
{
	int ports;
	int ints[3];

	ports = omap_i2c_nr_ports();
	get_options(str, 3, ints);
	if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
		return 0;
	i2c_pdata[ints[1] - 1].clkrate = ints[2];
	i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;

	return 1;
}
__setup("i2c_bus=", omap_i2c_bus_setup);

/*
 * Register busses defined in command line but that are not registered with
 * omap_register_i2c_bus from board initialization code.
 */
static int __init omap_register_i2c_bus_cmdline(void)
{
	int i, err = 0;

	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
		if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
			i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
			err = omap_i2c_add_bus(i + 1);
			if (err)
				goto out;
		}

out:
	return err;
}
subsys_initcall(omap_register_i2c_bus_cmdline);

/**
 * omap_register_i2c_bus - register I2C bus with device descriptors
 * @bus_id: bus id counting from number 1
 * @clkrate: clock rate of the bus in kHz
 * @info: pointer into I2C device descriptor table or NULL
 * @len: number of descriptors in the table
 *
 * Returns 0 on success or an error code.
 */
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
			  struct i2c_board_info const *info,
			  unsigned len)
{
	int err;

	BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());

	if (info) {
		err = i2c_register_board_info(bus_id, info, len);
		if (err)
			return err;
	}

	if (!i2c_pdata[bus_id - 1].clkrate)
		i2c_pdata[bus_id - 1].clkrate = clkrate;

	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;

	return omap_i2c_add_bus(bus_id);
}
Commit	Line	Data
85d05fb3 JN	1	/*
	2	* linux/arch/arm/plat-omap/i2c.c
	3	*
	4	* Helper module for board specific I2C bus registration
	5	*
	6	* Copyright (C) 2007 Nokia Corporation.
	7	*
ddf25dfe	8	* Contact: Jarkko Nikula <jhnikula@gmail.com>
85d05fb3 JN	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation.
	13	*
	14	* This program is distributed in the hope that it will be useful, but
	15	* WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	17	* General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	22	* 02110-1301 USA
	23	*
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/i2c.h>
4d17aeb1 PW	29	#include <linux/slab.h>
	30	#include <linux/err.h>
	31	#include <linux/clk.h>
20c9d2c4	32
80b02c17	33	#include <mach/irqs.h>
9833eff3	34	#include <plat/i2c.h>
4d17aeb1	35	#include <plat/omap_device.h>
85d05fb3 JN	36
	37	#define OMAP_I2C_SIZE 0x3f
	38	#define OMAP1_I2C_BASE 0xfffb3800
936e0f2f	39	#define OMAP1_INT_I2C (32 + 4)
85d05fb3	40
f7bb0d9a	41	static const char name[] = "omap_i2c";
85d05fb3 JN	42
	43	#define I2C_RESOURCE_BUILDER(base, irq) \
	44	{ \
	45	.start = (base), \
	46	.end = (base) + OMAP_I2C_SIZE, \
	47	.flags = IORESOURCE_MEM, \
	48	}, \
	49	{ \
	50	.start = (irq), \
	51	.flags = IORESOURCE_IRQ, \
	52	},
	53
	54	static struct resource i2c_resources[][2] = {
	55	{ I2C_RESOURCE_BUILDER(0, 0) },
85d05fb3 JN	56	};
	57
	58	#define I2C_DEV_BUILDER(bus_id, res, data) \
	59	{ \
	60	.id = (bus_id), \
	61	.name = name, \
	62	.num_resources = ARRAY_SIZE(res), \
	63	.resource = (res), \
	64	.dev = { \
	65	.platform_data = (data), \
	66	}, \
	67	}
	68
4d17aeb1 PW	69	#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
	70	#define OMAP_I2C_MAX_CONTROLLERS 4
	71	static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
85d05fb3	72	static struct platform_device omap_i2c_devices[] = {
20c9d2c4	73	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
85d05fb3 JN	74	};
85d05fb3 JN	75
7954763b JN	76	#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
7954763b JN	77
3a853fb9 JN	78	static int __init omap_i2c_nr_ports(void)
	79	{
	80	int ports = 0;
	81
	82	if (cpu_class_is_omap1())
	83	ports = 1;
	84	else if (cpu_is_omap24xx())
	85	ports = 2;
	86	else if (cpu_is_omap34xx())
	87	ports = 3;
6daa642d TL	88	else if (cpu_is_omap44xx())
6daa642d TL	89	ports = 4;
3a853fb9 JN	90
	91	return ports;
	92	}
	93
4d17aeb1	94	static inline int omap1_i2c_add_bus(int bus_id)
7954763b	95	{
4d17aeb1 PW	96	struct platform_device *pdev;
4d17aeb1 PW	97	struct omap_i2c_bus_platform_data *pdata;
00b4ade1	98	struct resource *res;
4d17aeb1	99
b32dd41e TL	100	omap1_i2c_mux_pins(bus_id);
b32dd41e TL	101
4d17aeb1	102	pdev = &omap_i2c_devices[bus_id - 1];
00b4ade1 PW	103	res = pdev->resource;
	104	res[0].start = OMAP1_I2C_BASE;
	105	res[0].end = res[0].start + OMAP_I2C_SIZE;
936e0f2f	106	res[1].start = OMAP1_INT_I2C;
4d17aeb1 PW	107	pdata = &i2c_pdata[bus_id - 1];
4d17aeb1 PW	108
67b90c67 AG	109	/* all OMAP1 have IP version 1 register set */
	110	pdata->rev = OMAP_I2C_IP_VERSION_1;
	111
8e286f5a AG	112	/* all OMAP1 I2C are implemented like this */
	113	pdata->flags = OMAP_I2C_FLAG_NO_FIFO \|
	114	OMAP_I2C_FLAG_SIMPLE_CLOCK \|
	115	OMAP_I2C_FLAG_16BIT_DATA_REG \|
	116	OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
	117
	118	/* how the cpu bus is wired up differs for 7xx only */
	119
	120	if (cpu_is_omap7xx())
	121	pdata->flags \|= OMAP_I2C_FLAG_BUS_SHIFT_1;
	122	else
	123	pdata->flags \|= OMAP_I2C_FLAG_BUS_SHIFT_2;
	124
b32dd41e TL	125	return platform_device_register(pdev);
	126	}
	127
4d17aeb1	128
790a26f6	129	#ifdef CONFIG_ARCH_OMAP2PLUS
4d17aeb1 PW	130	static inline int omap2_i2c_add_bus(int bus_id)
	131	{
	132	int l;
	133	struct omap_hwmod *oh;
3528c58e	134	struct platform_device *pdev;
4d17aeb1 PW	135	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
4d17aeb1 PW	136	struct omap_i2c_bus_platform_data *pdata;
029a1e73	137	struct omap_i2c_dev_attr *dev_attr;
b32dd41e	138
4d17aeb1	139	omap2_i2c_mux_pins(bus_id);
b32dd41e	140
4d17aeb1 PW	141	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
	142	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
	143	"String buffer overflow in I2C%d device setup\n", bus_id);
	144	oh = omap_hwmod_lookup(oh_name);
	145	if (!oh) {
	146	pr_err("Could not look up %s\n", oh_name);
	147	return -EEXIST;
7954763b JN	148	}
7954763b JN	149
4d17aeb1	150	pdata = &i2c_pdata[bus_id - 1];
d177e5dd AG	151	/*
d177e5dd AG	152	* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
029a1e73 AG	153	* use, and functionality implementation flags, up to the OMAP I2C
029a1e73 AG	154	* driver via platform data
d177e5dd AG	155	*/
	156	pdata->rev = oh->class->rev;
	157
029a1e73 AG	158	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
	159	pdata->flags = dev_attr->flags;
	160
3528c58e	161	pdev = omap_device_build(name, bus_id, oh, pdata,
4d17aeb1	162	sizeof(struct omap_i2c_bus_platform_data),
f718e2c0	163	NULL, 0, 0);
3528c58e	164	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
4d17aeb1	165
af504e5d	166	return PTR_RET(pdev);
7954763b	167	}
be40f7a3 TL	168	#else
	169	static inline int omap2_i2c_add_bus(int bus_id)
	170	{
	171	return 0;
	172	}
	173	#endif
7954763b	174
b32dd41e TL	175	static int __init omap_i2c_add_bus(int bus_id)
b32dd41e TL	176	{
b32dd41e	177	if (cpu_class_is_omap1())
4d17aeb1	178	return omap1_i2c_add_bus(bus_id);
b32dd41e	179	else
4d17aeb1	180	return omap2_i2c_add_bus(bus_id);
b32dd41e TL	181	}
b32dd41e TL	182
3a853fb9 JN	183	/**
	184	* omap_i2c_bus_setup - Process command line options for the I2C bus speed
	185	* @str: String of options
	186	*
	187	* This function allow to override the default I2C bus speed for given I2C
	188	* bus with a command line option.
	189	*
	190	* Format: i2c_bus=bus_id,clkrate (in kHz)
	191	*
	192	* Returns 1 on success, 0 otherwise.
	193	*/
	194	static int __init omap_i2c_bus_setup(char *str)
	195	{
	196	int ports;
	197	int ints[3];
	198
	199	ports = omap_i2c_nr_ports();
	200	get_options(str, 3, ints);
	201	if (ints[0] < 2 \|\| ints[1] < 1 \|\| ints[1] > ports)
	202	return 0;
20c9d2c4 KJ	203	i2c_pdata[ints[1] - 1].clkrate = ints[2];
20c9d2c4 KJ	204	i2c_pdata[ints[1] - 1].clkrate \|= OMAP_I2C_CMDLINE_SETUP;
3a853fb9 JN	205
	206	return 1;
	207	}
	208	__setup("i2c_bus=", omap_i2c_bus_setup);
	209
7954763b JN	210	/*
	211	* Register busses defined in command line but that are not registered with
	212	* omap_register_i2c_bus from board initialization code.
	213	*/
	214	static int __init omap_register_i2c_bus_cmdline(void)
	215	{
	216	int i, err = 0;
	217
20c9d2c4 KJ	218	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
	219	if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
	220	i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
7954763b JN	221	err = omap_i2c_add_bus(i + 1);
	222	if (err)
	223	goto out;
	224	}
	225
	226	out:
	227	return err;
	228	}
	229	subsys_initcall(omap_register_i2c_bus_cmdline);
	230
d4c58bf4	231	/**
9833eff3	232	* omap_register_i2c_bus - register I2C bus with device descriptors
d4c58bf4 JN	233	* @bus_id: bus id counting from number 1
	234	* @clkrate: clock rate of the bus in kHz
	235	* @info: pointer into I2C device descriptor table or NULL
	236	* @len: number of descriptors in the table
	237	*
	238	* Returns 0 on success or an error code.
	239	*/
9833eff3	240	int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
85d05fb3 JN	241	struct i2c_board_info const *info,
	242	unsigned len)
	243	{
3a853fb9	244	int err;
85d05fb3	245
3a853fb9	246	BUG_ON(bus_id < 1 \|\| bus_id > omap_i2c_nr_ports());
85d05fb3 JN	247
	248	if (info) {
	249	err = i2c_register_board_info(bus_id, info, len);
	250	if (err)
	251	return err;
	252	}
	253
20c9d2c4 KJ	254	if (!i2c_pdata[bus_id - 1].clkrate)
	255	i2c_pdata[bus_id - 1].clkrate = clkrate;
	256
	257	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
85d05fb3	258
7954763b	259	return omap_i2c_add_bus(bus_id);
85d05fb3	260	}