Commit | Line | Data |
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85d05fb3 JN |
1 | /* |
2 | * linux/arch/arm/plat-omap/i2c.c | |
3 | * | |
4 | * Helper module for board specific I2C bus registration | |
5 | * | |
6 | * Copyright (C) 2007 Nokia Corporation. | |
7 | * | |
ddf25dfe | 8 | * Contact: Jarkko Nikula <jhnikula@gmail.com> |
85d05fb3 JN |
9 | * |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * version 2 as published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
22 | * 02110-1301 USA | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <linux/i2c.h> | |
3a8761c0 | 29 | #include <linux/i2c-omap.h> |
4d17aeb1 PW |
30 | #include <linux/slab.h> |
31 | #include <linux/err.h> | |
32 | #include <linux/clk.h> | |
20c9d2c4 | 33 | |
80b02c17 | 34 | #include <mach/irqs.h> |
3a8761c0 | 35 | #include <plat/cpu.h> |
85d05fb3 | 36 | |
3a8761c0 | 37 | #include "i2c.h" |
85d05fb3 | 38 | |
4d17aeb1 PW |
39 | #define OMAP_I2C_MAX_CONTROLLERS 4 |
40 | static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS]; | |
85d05fb3 | 41 | |
7954763b JN |
42 | #define OMAP_I2C_CMDLINE_SETUP (BIT(31)) |
43 | ||
3a853fb9 JN |
44 | static int __init omap_i2c_nr_ports(void) |
45 | { | |
46 | int ports = 0; | |
47 | ||
48 | if (cpu_class_is_omap1()) | |
49 | ports = 1; | |
50 | else if (cpu_is_omap24xx()) | |
51 | ports = 2; | |
52 | else if (cpu_is_omap34xx()) | |
53 | ports = 3; | |
6daa642d TL |
54 | else if (cpu_is_omap44xx()) |
55 | ports = 4; | |
3a853fb9 JN |
56 | |
57 | return ports; | |
58 | } | |
59 | ||
60 | /** | |
61 | * omap_i2c_bus_setup - Process command line options for the I2C bus speed | |
62 | * @str: String of options | |
63 | * | |
64 | * This function allow to override the default I2C bus speed for given I2C | |
65 | * bus with a command line option. | |
66 | * | |
67 | * Format: i2c_bus=bus_id,clkrate (in kHz) | |
68 | * | |
69 | * Returns 1 on success, 0 otherwise. | |
70 | */ | |
71 | static int __init omap_i2c_bus_setup(char *str) | |
72 | { | |
73 | int ports; | |
74 | int ints[3]; | |
75 | ||
76 | ports = omap_i2c_nr_ports(); | |
77 | get_options(str, 3, ints); | |
78 | if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports) | |
79 | return 0; | |
20c9d2c4 KJ |
80 | i2c_pdata[ints[1] - 1].clkrate = ints[2]; |
81 | i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP; | |
3a853fb9 JN |
82 | |
83 | return 1; | |
84 | } | |
85 | __setup("i2c_bus=", omap_i2c_bus_setup); | |
86 | ||
7954763b JN |
87 | /* |
88 | * Register busses defined in command line but that are not registered with | |
89 | * omap_register_i2c_bus from board initialization code. | |
90 | */ | |
91 | static int __init omap_register_i2c_bus_cmdline(void) | |
92 | { | |
93 | int i, err = 0; | |
94 | ||
20c9d2c4 KJ |
95 | for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++) |
96 | if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) { | |
97 | i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; | |
3a8761c0 | 98 | err = omap_i2c_add_bus(&i2c_pdata[i], i + 1); |
7954763b JN |
99 | if (err) |
100 | goto out; | |
101 | } | |
102 | ||
103 | out: | |
104 | return err; | |
105 | } | |
106 | subsys_initcall(omap_register_i2c_bus_cmdline); | |
107 | ||
d4c58bf4 | 108 | /** |
9833eff3 | 109 | * omap_register_i2c_bus - register I2C bus with device descriptors |
d4c58bf4 JN |
110 | * @bus_id: bus id counting from number 1 |
111 | * @clkrate: clock rate of the bus in kHz | |
112 | * @info: pointer into I2C device descriptor table or NULL | |
113 | * @len: number of descriptors in the table | |
114 | * | |
115 | * Returns 0 on success or an error code. | |
116 | */ | |
9833eff3 | 117 | int __init omap_register_i2c_bus(int bus_id, u32 clkrate, |
85d05fb3 JN |
118 | struct i2c_board_info const *info, |
119 | unsigned len) | |
120 | { | |
3a853fb9 | 121 | int err; |
85d05fb3 | 122 | |
3a853fb9 | 123 | BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports()); |
85d05fb3 JN |
124 | |
125 | if (info) { | |
126 | err = i2c_register_board_info(bus_id, info, len); | |
127 | if (err) | |
128 | return err; | |
129 | } | |
130 | ||
20c9d2c4 KJ |
131 | if (!i2c_pdata[bus_id - 1].clkrate) |
132 | i2c_pdata[bus_id - 1].clkrate = clkrate; | |
133 | ||
134 | i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP; | |
85d05fb3 | 135 | |
3a8761c0 | 136 | return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id); |
85d05fb3 | 137 | } |