[deliverable/linux.git] / arch / arm / plat-omap / i2c.c

/*
 * linux/arch/arm/plat-omap/i2c.c
 *
 * Helper module for board specific I2C bus registration
 *
 * Copyright (C) 2007 Nokia Corporation.
 *
 * Contact: Jarkko Nikula <jhnikula@gmail.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c-omap.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>

#include <mach/irqs.h>
#include <plat/mux.h>
#include <plat/i2c.h>
#include <plat/omap-pm.h>
#include <plat/omap_device.h>

#define OMAP_I2C_SIZE		0x3f
#define OMAP1_I2C_BASE		0xfffb3800
#define OMAP1_INT_I2C		(32 + 4)

static const char name[] = "omap_i2c";

#define I2C_RESOURCE_BUILDER(base, irq)			\
	{						\
		.start	= (base),			\
		.end	= (base) + OMAP_I2C_SIZE,	\
		.flags	= IORESOURCE_MEM,		\
	},						\
	{						\
		.start	= (irq),			\
		.flags	= IORESOURCE_IRQ,		\
	},

static struct resource i2c_resources[][2] = {
	{ I2C_RESOURCE_BUILDER(0, 0) },
};

#define I2C_DEV_BUILDER(bus_id, res, data)		\
	{						\
		.id	= (bus_id),			\
		.name	= name,				\
		.num_resources	= ARRAY_SIZE(res),	\
		.resource	= (res),		\
		.dev		= {			\
			.platform_data	= (data),	\
		},					\
	}

#define MAX_OMAP_I2C_HWMOD_NAME_LEN	16
#define OMAP_I2C_MAX_CONTROLLERS 4
static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
static struct platform_device omap_i2c_devices[] = {
	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
};

#define OMAP_I2C_CMDLINE_SETUP	(BIT(31))

static int __init omap_i2c_nr_ports(void)
{
	int ports = 0;

	if (cpu_class_is_omap1())
		ports = 1;
	else if (cpu_is_omap24xx())
		ports = 2;
	else if (cpu_is_omap34xx())
		ports = 3;
	else if (cpu_is_omap44xx())
		ports = 4;

	return ports;
}

static inline int omap1_i2c_add_bus(int bus_id)
{
	struct platform_device *pdev;
	struct omap_i2c_bus_platform_data *pdata;
	struct resource *res;

	omap1_i2c_mux_pins(bus_id);

	pdev = &omap_i2c_devices[bus_id - 1];
	res = pdev->resource;
	res[0].start = OMAP1_I2C_BASE;
	res[0].end = res[0].start + OMAP_I2C_SIZE;
	res[1].start = OMAP1_INT_I2C;
	pdata = &i2c_pdata[bus_id - 1];

	/* all OMAP1 have IP version 1 register set */
	pdata->rev = OMAP_I2C_IP_VERSION_1;

	/* all OMAP1 I2C are implemented like this */
	pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
		       OMAP_I2C_FLAG_SIMPLE_CLOCK |
		       OMAP_I2C_FLAG_16BIT_DATA_REG |
		       OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;

	/* how the cpu bus is wired up differs for 7xx only */

	if (cpu_is_omap7xx())
		pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
	else
		pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;

	return platform_device_register(pdev);
}


#ifdef CONFIG_ARCH_OMAP2PLUS
/*
 * XXX This function is a temporary compatibility wrapper - only
 * needed until the I2C driver can be converted to call
 * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
 */
static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
{
	omap_pm_set_max_mpu_wakeup_lat(dev, t);
}

static inline int omap2_i2c_add_bus(int bus_id)
{
	int l;
	struct omap_hwmod *oh;
	struct platform_device *pdev;
	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
	struct omap_i2c_bus_platform_data *pdata;
	struct omap_i2c_dev_attr *dev_attr;

	omap2_i2c_mux_pins(bus_id);

	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
		"String buffer overflow in I2C%d device setup\n", bus_id);
	oh = omap_hwmod_lookup(oh_name);
	if (!oh) {
			pr_err("Could not look up %s\n", oh_name);
			return -EEXIST;
	}

	pdata = &i2c_pdata[bus_id - 1];
	/*
	 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
	 * use, and functionality implementation flags, up to the OMAP I2C
	 * driver via platform data
	 */
	pdata->rev = oh->class->rev;

	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
	pdata->flags = dev_attr->flags;

	/*
	 * When waiting for completion of a i2c transfer, we need to
	 * set a wake up latency constraint for the MPU. This is to
	 * ensure quick enough wakeup from idle, when transfer
	 * completes.
	 * Only omap3 has support for constraints
	 */
	if (cpu_is_omap34xx())
		pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
	pdev = omap_device_build(name, bus_id, oh, pdata,
			sizeof(struct omap_i2c_bus_platform_data),
			NULL, 0, 0);
	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);

	return PTR_RET(pdev);
}
#else
static inline int omap2_i2c_add_bus(int bus_id)
{
	return 0;
}
#endif

static int __init omap_i2c_add_bus(int bus_id)
{
	if (cpu_class_is_omap1())
		return omap1_i2c_add_bus(bus_id);
	else
		return omap2_i2c_add_bus(bus_id);
}

/**
 * omap_i2c_bus_setup - Process command line options for the I2C bus speed
 * @str: String of options
 *
 * This function allow to override the default I2C bus speed for given I2C
 * bus with a command line option.
 *
 * Format: i2c_bus=bus_id,clkrate (in kHz)
 *
 * Returns 1 on success, 0 otherwise.
 */
static int __init omap_i2c_bus_setup(char *str)
{
	int ports;
	int ints[3];

	ports = omap_i2c_nr_ports();
	get_options(str, 3, ints);
	if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
		return 0;
	i2c_pdata[ints[1] - 1].clkrate = ints[2];
	i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;

	return 1;
}
__setup("i2c_bus=", omap_i2c_bus_setup);

/*
 * Register busses defined in command line but that are not registered with
 * omap_register_i2c_bus from board initialization code.
 */
static int __init omap_register_i2c_bus_cmdline(void)
{
	int i, err = 0;

	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
		if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
			i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
			err = omap_i2c_add_bus(i + 1);
			if (err)
				goto out;
		}

out:
	return err;
}
subsys_initcall(omap_register_i2c_bus_cmdline);

/**
 * omap_register_i2c_bus - register I2C bus with device descriptors
 * @bus_id: bus id counting from number 1
 * @clkrate: clock rate of the bus in kHz
 * @info: pointer into I2C device descriptor table or NULL
 * @len: number of descriptors in the table
 *
 * Returns 0 on success or an error code.
 */
int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
			  struct i2c_board_info const *info,
			  unsigned len)
{
	int err;

	BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());

	if (info) {
		err = i2c_register_board_info(bus_id, info, len);
		if (err)
			return err;
	}

	if (!i2c_pdata[bus_id - 1].clkrate)
		i2c_pdata[bus_id - 1].clkrate = clkrate;

	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;

	return omap_i2c_add_bus(bus_id);
}
Commit	Line	Data
85d05fb3 JN	1	/*
	2	* linux/arch/arm/plat-omap/i2c.c
	3	*
	4	* Helper module for board specific I2C bus registration
	5	*
	6	* Copyright (C) 2007 Nokia Corporation.
	7	*
ddf25dfe	8	* Contact: Jarkko Nikula <jhnikula@gmail.com>
85d05fb3 JN	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License
	12	* version 2 as published by the Free Software Foundation.
	13	*
	14	* This program is distributed in the hope that it will be useful, but
	15	* WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	17	* General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	22	* 02110-1301 USA
	23	*
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/i2c.h>
20c9d2c4	29	#include <linux/i2c-omap.h>
4d17aeb1 PW	30	#include <linux/slab.h>
	31	#include <linux/err.h>
	32	#include <linux/clk.h>
20c9d2c4	33
80b02c17	34	#include <mach/irqs.h>
ce491cf8	35	#include <plat/mux.h>
9833eff3	36	#include <plat/i2c.h>
20c9d2c4	37	#include <plat/omap-pm.h>
4d17aeb1	38	#include <plat/omap_device.h>
85d05fb3 JN	39
	40	#define OMAP_I2C_SIZE 0x3f
	41	#define OMAP1_I2C_BASE 0xfffb3800
936e0f2f	42	#define OMAP1_INT_I2C (32 + 4)
85d05fb3	43
f7bb0d9a	44	static const char name[] = "omap_i2c";
85d05fb3 JN	45
	46	#define I2C_RESOURCE_BUILDER(base, irq) \
	47	{ \
	48	.start = (base), \
	49	.end = (base) + OMAP_I2C_SIZE, \
	50	.flags = IORESOURCE_MEM, \
	51	}, \
	52	{ \
	53	.start = (irq), \
	54	.flags = IORESOURCE_IRQ, \
	55	},
	56
	57	static struct resource i2c_resources[][2] = {
	58	{ I2C_RESOURCE_BUILDER(0, 0) },
85d05fb3 JN	59	};
	60
	61	#define I2C_DEV_BUILDER(bus_id, res, data) \
	62	{ \
	63	.id = (bus_id), \
	64	.name = name, \
	65	.num_resources = ARRAY_SIZE(res), \
	66	.resource = (res), \
	67	.dev = { \
	68	.platform_data = (data), \
	69	}, \
	70	}
	71
4d17aeb1 PW	72	#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
	73	#define OMAP_I2C_MAX_CONTROLLERS 4
	74	static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
85d05fb3	75	static struct platform_device omap_i2c_devices[] = {
20c9d2c4	76	I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
85d05fb3 JN	77	};
85d05fb3 JN	78
7954763b JN	79	#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
7954763b JN	80
3a853fb9 JN	81	static int __init omap_i2c_nr_ports(void)
	82	{
	83	int ports = 0;
	84
	85	if (cpu_class_is_omap1())
	86	ports = 1;
	87	else if (cpu_is_omap24xx())
	88	ports = 2;
	89	else if (cpu_is_omap34xx())
	90	ports = 3;
6daa642d TL	91	else if (cpu_is_omap44xx())
6daa642d TL	92	ports = 4;
3a853fb9 JN	93
	94	return ports;
	95	}
	96
4d17aeb1	97	static inline int omap1_i2c_add_bus(int bus_id)
7954763b	98	{
4d17aeb1 PW	99	struct platform_device *pdev;
4d17aeb1 PW	100	struct omap_i2c_bus_platform_data *pdata;
00b4ade1	101	struct resource *res;
4d17aeb1	102
b32dd41e TL	103	omap1_i2c_mux_pins(bus_id);
b32dd41e TL	104
4d17aeb1	105	pdev = &omap_i2c_devices[bus_id - 1];
00b4ade1 PW	106	res = pdev->resource;
	107	res[0].start = OMAP1_I2C_BASE;
	108	res[0].end = res[0].start + OMAP_I2C_SIZE;
936e0f2f	109	res[1].start = OMAP1_INT_I2C;
4d17aeb1 PW	110	pdata = &i2c_pdata[bus_id - 1];
4d17aeb1 PW	111
67b90c67 AG	112	/* all OMAP1 have IP version 1 register set */
	113	pdata->rev = OMAP_I2C_IP_VERSION_1;
	114
8e286f5a AG	115	/* all OMAP1 I2C are implemented like this */
	116	pdata->flags = OMAP_I2C_FLAG_NO_FIFO \|
	117	OMAP_I2C_FLAG_SIMPLE_CLOCK \|
	118	OMAP_I2C_FLAG_16BIT_DATA_REG \|
	119	OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
	120
	121	/* how the cpu bus is wired up differs for 7xx only */
	122
	123	if (cpu_is_omap7xx())
	124	pdata->flags \|= OMAP_I2C_FLAG_BUS_SHIFT_1;
	125	else
	126	pdata->flags \|= OMAP_I2C_FLAG_BUS_SHIFT_2;
	127
b32dd41e TL	128	return platform_device_register(pdev);
	129	}
	130
4d17aeb1	131
790a26f6	132	#ifdef CONFIG_ARCH_OMAP2PLUS
564889c1 PW	133	/*
	134	* XXX This function is a temporary compatibility wrapper - only
	135	* needed until the I2C driver can be converted to call
	136	* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
	137	*/
	138	static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
	139	{
	140	omap_pm_set_max_mpu_wakeup_lat(dev, t);
	141	}
	142
4d17aeb1 PW	143	static inline int omap2_i2c_add_bus(int bus_id)
	144	{
	145	int l;
	146	struct omap_hwmod *oh;
3528c58e	147	struct platform_device *pdev;
4d17aeb1 PW	148	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
4d17aeb1 PW	149	struct omap_i2c_bus_platform_data *pdata;
029a1e73	150	struct omap_i2c_dev_attr *dev_attr;
b32dd41e	151
4d17aeb1	152	omap2_i2c_mux_pins(bus_id);
b32dd41e	153
4d17aeb1 PW	154	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
	155	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
	156	"String buffer overflow in I2C%d device setup\n", bus_id);
	157	oh = omap_hwmod_lookup(oh_name);
	158	if (!oh) {
	159	pr_err("Could not look up %s\n", oh_name);
	160	return -EEXIST;
7954763b JN	161	}
7954763b JN	162
4d17aeb1	163	pdata = &i2c_pdata[bus_id - 1];
d177e5dd AG	164	/*
d177e5dd AG	165	* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
029a1e73 AG	166	* use, and functionality implementation flags, up to the OMAP I2C
029a1e73 AG	167	* driver via platform data
d177e5dd AG	168	*/
	169	pdata->rev = oh->class->rev;
	170
029a1e73 AG	171	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
	172	pdata->flags = dev_attr->flags;
	173
20c9d2c4 KJ	174	/*
	175	* When waiting for completion of a i2c transfer, we need to
	176	* set a wake up latency constraint for the MPU. This is to
	177	* ensure quick enough wakeup from idle, when transfer
	178	* completes.
4d17aeb1	179	* Only omap3 has support for constraints
20c9d2c4	180	*/
4d17aeb1 PW	181	if (cpu_is_omap34xx())
4d17aeb1 PW	182	pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
3528c58e	183	pdev = omap_device_build(name, bus_id, oh, pdata,
4d17aeb1	184	sizeof(struct omap_i2c_bus_platform_data),
f718e2c0	185	NULL, 0, 0);
3528c58e	186	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
4d17aeb1	187
af504e5d	188	return PTR_RET(pdev);
7954763b	189	}
be40f7a3 TL	190	#else
	191	static inline int omap2_i2c_add_bus(int bus_id)
	192	{
	193	return 0;
	194	}
	195	#endif
7954763b	196
b32dd41e TL	197	static int __init omap_i2c_add_bus(int bus_id)
b32dd41e TL	198	{
b32dd41e	199	if (cpu_class_is_omap1())
4d17aeb1	200	return omap1_i2c_add_bus(bus_id);
b32dd41e	201	else
4d17aeb1	202	return omap2_i2c_add_bus(bus_id);
b32dd41e TL	203	}
b32dd41e TL	204
3a853fb9 JN	205	/**
	206	* omap_i2c_bus_setup - Process command line options for the I2C bus speed
	207	* @str: String of options
	208	*
	209	* This function allow to override the default I2C bus speed for given I2C
	210	* bus with a command line option.
	211	*
	212	* Format: i2c_bus=bus_id,clkrate (in kHz)
	213	*
	214	* Returns 1 on success, 0 otherwise.
	215	*/
	216	static int __init omap_i2c_bus_setup(char *str)
	217	{
	218	int ports;
	219	int ints[3];
	220
	221	ports = omap_i2c_nr_ports();
	222	get_options(str, 3, ints);
	223	if (ints[0] < 2 \|\| ints[1] < 1 \|\| ints[1] > ports)
	224	return 0;
20c9d2c4 KJ	225	i2c_pdata[ints[1] - 1].clkrate = ints[2];
20c9d2c4 KJ	226	i2c_pdata[ints[1] - 1].clkrate \|= OMAP_I2C_CMDLINE_SETUP;
3a853fb9 JN	227
	228	return 1;
	229	}
	230	__setup("i2c_bus=", omap_i2c_bus_setup);
	231
7954763b JN	232	/*
	233	* Register busses defined in command line but that are not registered with
	234	* omap_register_i2c_bus from board initialization code.
	235	*/
	236	static int __init omap_register_i2c_bus_cmdline(void)
	237	{
	238	int i, err = 0;
	239
20c9d2c4 KJ	240	for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
	241	if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
	242	i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
7954763b JN	243	err = omap_i2c_add_bus(i + 1);
	244	if (err)
	245	goto out;
	246	}
	247
	248	out:
	249	return err;
	250	}
	251	subsys_initcall(omap_register_i2c_bus_cmdline);
	252
d4c58bf4	253	/**
9833eff3	254	* omap_register_i2c_bus - register I2C bus with device descriptors
d4c58bf4 JN	255	* @bus_id: bus id counting from number 1
	256	* @clkrate: clock rate of the bus in kHz
	257	* @info: pointer into I2C device descriptor table or NULL
	258	* @len: number of descriptors in the table
	259	*
	260	* Returns 0 on success or an error code.
	261	*/
9833eff3	262	int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
85d05fb3 JN	263	struct i2c_board_info const *info,
	264	unsigned len)
	265	{
3a853fb9	266	int err;
85d05fb3	267
3a853fb9	268	BUG_ON(bus_id < 1 \|\| bus_id > omap_i2c_nr_ports());
85d05fb3 JN	269
	270	if (info) {
	271	err = i2c_register_board_info(bus_id, info, len);
	272	if (err)
	273	return err;
	274	}
	275
20c9d2c4 KJ	276	if (!i2c_pdata[bus_id - 1].clkrate)
	277	i2c_pdata[bus_id - 1].clkrate = clkrate;
	278
	279	i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
85d05fb3	280
7954763b	281	return omap_i2c_add_bus(bus_id);
85d05fb3	282	}