OMAP: Remove OMAP_IO_ADDRESS, use OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS instead
[deliverable/linux.git] / arch / arm / plat-omap / include / mach / gpio.h
CommitLineData
1da177e4 1/*
a09e64fb 2 * arch/arm/plat-omap/include/mach/gpio.h
1da177e4
LT
3 *
4 * OMAP GPIO handling defines and functions
5 *
9839c6b8 6 * Copyright (C) 2003-2005 Nokia Corporation
1da177e4 7 *
121e70b6 8 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
1da177e4
LT
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26#ifndef __ASM_ARCH_OMAP_GPIO_H
27#define __ASM_ARCH_OMAP_GPIO_H
28
fced80c7 29#include <linux/io.h>
a09e64fb 30#include <mach/irqs.h>
1da177e4 31
7c7095aa 32#define OMAP_MPUIO_BASE 0xfffb5000
9839c6b8 33
56739a69
ZM
34#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
35
9839c6b8
TL
36#define OMAP_MPUIO_INPUT_LATCH 0x00
37#define OMAP_MPUIO_OUTPUT 0x02
38#define OMAP_MPUIO_IO_CNTL 0x04
39#define OMAP_MPUIO_KBR_LATCH 0x08
40#define OMAP_MPUIO_KBC 0x0a
41#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c
42#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e
43#define OMAP_MPUIO_KBD_INT 0x10
44#define OMAP_MPUIO_GPIO_INT 0x12
45#define OMAP_MPUIO_KBD_MASKIT 0x14
46#define OMAP_MPUIO_GPIO_MASKIT 0x16
47#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18
48#define OMAP_MPUIO_LATCH 0x1a
49#else
1da177e4
LT
50#define OMAP_MPUIO_INPUT_LATCH 0x00
51#define OMAP_MPUIO_OUTPUT 0x04
52#define OMAP_MPUIO_IO_CNTL 0x08
53#define OMAP_MPUIO_KBR_LATCH 0x10
54#define OMAP_MPUIO_KBC 0x14
55#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
56#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
57#define OMAP_MPUIO_KBD_INT 0x20
58#define OMAP_MPUIO_GPIO_INT 0x24
59#define OMAP_MPUIO_KBD_MASKIT 0x28
60#define OMAP_MPUIO_GPIO_MASKIT 0x2c
61#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
62#define OMAP_MPUIO_LATCH 0x34
9839c6b8 63#endif
1da177e4 64
5492fb1a
SMK
65#define OMAP34XX_NR_GPIOS 6
66
1da177e4
LT
67#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
68#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
69
70#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \
71 IH_MPUIO_BASE + ((nr) & 0x0f) : \
9ad5897c 72 IH_GPIO_BASE + (nr))
1da177e4 73
1da177e4 74extern int omap_gpio_init(void); /* Call from board init only */
646e3ed1
TL
75extern void omap2_gpio_prepare_for_retention(void);
76extern void omap2_gpio_resume_after_retention(void);
5eb3bb9c
KH
77extern void omap_set_gpio_debounce(int gpio, int enable);
78extern void omap_set_gpio_debounce_time(int gpio, int enable);
1da177e4 79
3c729f1e
DB
80/*-------------------------------------------------------------------------*/
81
52e31344
DB
82/* Wrappers for "new style" GPIO calls, using the new infrastructure
83 * which lets us plug in FPGA, I2C, and other implementations.
84 * *
85 * The original OMAP-specfic calls should eventually be removed.
3c729f1e
DB
86 */
87
52e31344
DB
88#include <linux/errno.h>
89#include <asm-generic/gpio.h>
3c729f1e
DB
90
91static inline int gpio_get_value(unsigned gpio)
92{
52e31344 93 return __gpio_get_value(gpio);
3c729f1e
DB
94}
95
96static inline void gpio_set_value(unsigned gpio, int value)
97{
52e31344 98 __gpio_set_value(gpio, value);
3c729f1e
DB
99}
100
52e31344
DB
101static inline int gpio_cansleep(unsigned gpio)
102{
103 return __gpio_cansleep(gpio);
104}
3c729f1e
DB
105
106static inline int gpio_to_irq(unsigned gpio)
107{
a007b709 108 return __gpio_to_irq(gpio);
3c729f1e
DB
109}
110
111static inline int irq_to_gpio(unsigned irq)
112{
a007b709
DB
113 int tmp;
114
115 /* omap1 SOC mpuio */
3c729f1e
DB
116 if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
117 return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
a007b709
DB
118
119 /* SOC gpio */
120 tmp = irq - IH_GPIO_BASE;
121 if (tmp < OMAP_MAX_GPIO_LINES)
122 return tmp;
123
124 /* we don't supply reverse mappings for non-SOC gpios */
125 return -EIO;
3c729f1e
DB
126}
127
1da177e4 128#endif
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