Commit | Line | Data |
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1da177e4 | 1 | /* |
a09e64fb | 2 | * arch/arm/plat-omap/include/mach/gpio.h |
1da177e4 LT |
3 | * |
4 | * OMAP GPIO handling defines and functions | |
5 | * | |
9839c6b8 | 6 | * Copyright (C) 2003-2005 Nokia Corporation |
1da177e4 | 7 | * |
121e70b6 | 8 | * Written by Juha Yrjölä <juha.yrjola@nokia.com> |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | * | |
24 | */ | |
25 | ||
26 | #ifndef __ASM_ARCH_OMAP_GPIO_H | |
27 | #define __ASM_ARCH_OMAP_GPIO_H | |
28 | ||
fced80c7 | 29 | #include <linux/io.h> |
a09e64fb | 30 | #include <mach/irqs.h> |
1da177e4 | 31 | |
7c7095aa | 32 | #define OMAP_MPUIO_BASE 0xfffb5000 |
9839c6b8 TL |
33 | |
34 | #ifdef CONFIG_ARCH_OMAP730 | |
35 | #define OMAP_MPUIO_INPUT_LATCH 0x00 | |
36 | #define OMAP_MPUIO_OUTPUT 0x02 | |
37 | #define OMAP_MPUIO_IO_CNTL 0x04 | |
38 | #define OMAP_MPUIO_KBR_LATCH 0x08 | |
39 | #define OMAP_MPUIO_KBC 0x0a | |
40 | #define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c | |
41 | #define OMAP_MPUIO_GPIO_INT_EDGE 0x0e | |
42 | #define OMAP_MPUIO_KBD_INT 0x10 | |
43 | #define OMAP_MPUIO_GPIO_INT 0x12 | |
44 | #define OMAP_MPUIO_KBD_MASKIT 0x14 | |
45 | #define OMAP_MPUIO_GPIO_MASKIT 0x16 | |
46 | #define OMAP_MPUIO_GPIO_DEBOUNCING 0x18 | |
47 | #define OMAP_MPUIO_LATCH 0x1a | |
48 | #else | |
1da177e4 LT |
49 | #define OMAP_MPUIO_INPUT_LATCH 0x00 |
50 | #define OMAP_MPUIO_OUTPUT 0x04 | |
51 | #define OMAP_MPUIO_IO_CNTL 0x08 | |
52 | #define OMAP_MPUIO_KBR_LATCH 0x10 | |
53 | #define OMAP_MPUIO_KBC 0x14 | |
54 | #define OMAP_MPUIO_GPIO_EVENT_MODE 0x18 | |
55 | #define OMAP_MPUIO_GPIO_INT_EDGE 0x1c | |
56 | #define OMAP_MPUIO_KBD_INT 0x20 | |
57 | #define OMAP_MPUIO_GPIO_INT 0x24 | |
58 | #define OMAP_MPUIO_KBD_MASKIT 0x28 | |
59 | #define OMAP_MPUIO_GPIO_MASKIT 0x2c | |
60 | #define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 | |
61 | #define OMAP_MPUIO_LATCH 0x34 | |
9839c6b8 | 62 | #endif |
1da177e4 | 63 | |
5492fb1a SMK |
64 | #define OMAP34XX_NR_GPIOS 6 |
65 | ||
1da177e4 LT |
66 | #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) |
67 | #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) | |
68 | ||
69 | #define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \ | |
70 | IH_MPUIO_BASE + ((nr) & 0x0f) : \ | |
9ad5897c | 71 | IH_GPIO_BASE + (nr)) |
1da177e4 | 72 | |
1da177e4 LT |
73 | extern int omap_gpio_init(void); /* Call from board init only */ |
74 | extern int omap_request_gpio(int gpio); | |
75 | extern void omap_free_gpio(int gpio); | |
76 | extern void omap_set_gpio_direction(int gpio, int is_input); | |
77 | extern void omap_set_gpio_dataout(int gpio, int enable); | |
78 | extern int omap_get_gpio_datain(int gpio); | |
646e3ed1 TL |
79 | extern void omap2_gpio_prepare_for_retention(void); |
80 | extern void omap2_gpio_resume_after_retention(void); | |
5eb3bb9c KH |
81 | extern void omap_set_gpio_debounce(int gpio, int enable); |
82 | extern void omap_set_gpio_debounce_time(int gpio, int enable); | |
1da177e4 | 83 | |
3c729f1e DB |
84 | /*-------------------------------------------------------------------------*/ |
85 | ||
52e31344 DB |
86 | /* Wrappers for "new style" GPIO calls, using the new infrastructure |
87 | * which lets us plug in FPGA, I2C, and other implementations. | |
88 | * * | |
89 | * The original OMAP-specfic calls should eventually be removed. | |
3c729f1e DB |
90 | */ |
91 | ||
52e31344 DB |
92 | #include <linux/errno.h> |
93 | #include <asm-generic/gpio.h> | |
3c729f1e DB |
94 | |
95 | static inline int gpio_get_value(unsigned gpio) | |
96 | { | |
52e31344 | 97 | return __gpio_get_value(gpio); |
3c729f1e DB |
98 | } |
99 | ||
100 | static inline void gpio_set_value(unsigned gpio, int value) | |
101 | { | |
52e31344 | 102 | __gpio_set_value(gpio, value); |
3c729f1e DB |
103 | } |
104 | ||
52e31344 DB |
105 | static inline int gpio_cansleep(unsigned gpio) |
106 | { | |
107 | return __gpio_cansleep(gpio); | |
108 | } | |
3c729f1e DB |
109 | |
110 | static inline int gpio_to_irq(unsigned gpio) | |
111 | { | |
a007b709 | 112 | return __gpio_to_irq(gpio); |
3c729f1e DB |
113 | } |
114 | ||
115 | static inline int irq_to_gpio(unsigned irq) | |
116 | { | |
a007b709 DB |
117 | int tmp; |
118 | ||
119 | /* omap1 SOC mpuio */ | |
3c729f1e DB |
120 | if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16))) |
121 | return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES; | |
a007b709 DB |
122 | |
123 | /* SOC gpio */ | |
124 | tmp = irq - IH_GPIO_BASE; | |
125 | if (tmp < OMAP_MAX_GPIO_LINES) | |
126 | return tmp; | |
127 | ||
128 | /* we don't supply reverse mappings for non-SOC gpios */ | |
129 | return -EIO; | |
3c729f1e DB |
130 | } |
131 | ||
1da177e4 | 132 | #endif |