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1 | /* |
2 | * OMAP2/3 powerdomain control | |
3 | * | |
4 | * Copyright (C) 2007-8 Texas Instruments, Inc. | |
5 | * Copyright (C) 2007-8 Nokia Corporation | |
6 | * | |
7 | * Written by Paul Walmsley | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN | |
15 | #define ASM_ARM_ARCH_OMAP_POWERDOMAIN | |
16 | ||
17 | #include <linux/types.h> | |
18 | #include <linux/list.h> | |
19 | ||
20 | #include <asm/atomic.h> | |
21 | ||
22 | #include <mach/cpu.h> | |
23 | ||
24 | ||
25 | /* Powerdomain basic power states */ | |
26 | #define PWRDM_POWER_OFF 0x0 | |
27 | #define PWRDM_POWER_RET 0x1 | |
28 | #define PWRDM_POWER_INACTIVE 0x2 | |
29 | #define PWRDM_POWER_ON 0x3 | |
30 | ||
31 | /* Powerdomain allowable state bitfields */ | |
32 | #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ | |
33 | (1 << PWRDM_POWER_ON)) | |
34 | ||
35 | #define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \ | |
36 | (1 << PWRDM_POWER_RET)) | |
37 | ||
38 | #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) | |
39 | ||
40 | ||
41 | /* | |
42 | * Number of memory banks that are power-controllable. On OMAP3430, the | |
43 | * maximum is 4. | |
44 | */ | |
45 | #define PWRDM_MAX_MEM_BANKS 4 | |
46 | ||
47 | /* XXX A completely arbitrary number. What is reasonable here? */ | |
48 | #define PWRDM_TRANSITION_BAILOUT 100000 | |
49 | ||
50 | struct powerdomain; | |
51 | ||
52 | /* Encodes dependencies between powerdomains - statically defined */ | |
53 | struct pwrdm_dep { | |
54 | ||
55 | /* Powerdomain name */ | |
56 | const char *pwrdm_name; | |
57 | ||
58 | /* Powerdomain pointer - resolved by the powerdomain code */ | |
59 | struct powerdomain *pwrdm; | |
60 | ||
61 | /* Flags to mark OMAP chip restrictions, etc. */ | |
62 | const struct omap_chip_id omap_chip; | |
63 | ||
64 | }; | |
65 | ||
66 | struct powerdomain { | |
67 | ||
68 | /* Powerdomain name */ | |
69 | const char *name; | |
70 | ||
71 | /* the address offset from CM_BASE/PRM_BASE */ | |
72 | const s16 prcm_offs; | |
73 | ||
74 | /* Used to represent the OMAP chip types containing this pwrdm */ | |
75 | const struct omap_chip_id omap_chip; | |
76 | ||
77 | /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ | |
78 | const u8 dep_bit; | |
79 | ||
80 | /* Powerdomains that can be told to wake this powerdomain up */ | |
81 | struct pwrdm_dep *wkdep_srcs; | |
82 | ||
83 | /* Powerdomains that can be told to keep this pwrdm from inactivity */ | |
84 | struct pwrdm_dep *sleepdep_srcs; | |
85 | ||
86 | /* Possible powerdomain power states */ | |
87 | const u8 pwrsts; | |
88 | ||
89 | /* Possible logic power states when pwrdm in RETENTION */ | |
90 | const u8 pwrsts_logic_ret; | |
91 | ||
92 | /* Number of software-controllable memory banks in this powerdomain */ | |
93 | const u8 banks; | |
94 | ||
95 | /* Possible memory bank pwrstates when pwrdm in RETENTION */ | |
96 | const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; | |
97 | ||
98 | /* Possible memory bank pwrstates when pwrdm is ON */ | |
99 | const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; | |
100 | ||
101 | struct list_head node; | |
102 | ||
103 | }; | |
104 | ||
105 | ||
106 | void pwrdm_init(struct powerdomain **pwrdm_list); | |
107 | ||
108 | int pwrdm_register(struct powerdomain *pwrdm); | |
109 | int pwrdm_unregister(struct powerdomain *pwrdm); | |
110 | struct powerdomain *pwrdm_lookup(const char *name); | |
111 | ||
112 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); | |
113 | ||
114 | int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); | |
115 | int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); | |
116 | int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); | |
117 | int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); | |
118 | int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); | |
119 | int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); | |
120 | ||
121 | int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); | |
122 | ||
123 | int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); | |
124 | int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); | |
125 | int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); | |
126 | int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); | |
127 | ||
128 | int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); | |
129 | int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); | |
130 | int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); | |
131 | ||
132 | int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm); | |
133 | int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm); | |
134 | int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); | |
135 | int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank); | |
136 | ||
137 | int pwrdm_wait_transition(struct powerdomain *pwrdm); | |
138 | ||
139 | #endif |