Merge tag 'timer' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / arch / arm / plat-omap / include / plat / cpu.h
CommitLineData
1da177e4 1/*
a09e64fb 2 * arch/arm/plat-omap/include/mach/cpu.h
1da177e4
LT
3 *
4 * OMAP cpu type detection
5 *
097c584c 6 * Copyright (C) 2004, 2008 Nokia Corporation
1da177e4 7 *
e49c4d27 8 * Copyright (C) 2009-11 Texas Instruments.
44169075 9 *
1da177e4
LT
10 * Written by Tony Lindgren <tony.lindgren@nokia.com>
11 *
44169075
SS
12 * Added OMAP4 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
13 *
1da177e4
LT
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 *
28 */
29
30#ifndef __ASM_ARCH_OMAP_CPU_H
31#define __ASM_ARCH_OMAP_CPU_H
32
8384ce07 33#include <linux/bitops.h>
1cf9d079 34#include <plat/multi.h>
8384ce07 35
8e25ad96
KH
36/*
37 * Omap device type i.e. EMU/HS/TST/GP/BAD
38 */
39#define OMAP2_DEVICE_TYPE_TEST 0
40#define OMAP2_DEVICE_TYPE_EMU 1
41#define OMAP2_DEVICE_TYPE_SEC 2
42#define OMAP2_DEVICE_TYPE_GP 3
43#define OMAP2_DEVICE_TYPE_BAD 4
44
45int omap_type(void);
46
a8823143 47/*
84a34344 48 * omap_rev bits:
a8823143
TL
49 * CPU id bits (0730, 1510, 1710, 2422...) [31:16]
50 * CPU revision (See _REV_ defined in cpu.h) [15:08]
51 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
52 */
84a34344 53unsigned int omap_rev(void);
1da177e4 54
048f4bd7
SP
55/*
56 * Get the CPU revision for OMAP devices
57 */
58#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
59
1da177e4 60/*
9839c6b8
TL
61 * Macros to group OMAP into cpu classes.
62 * These can be used in most places.
ae302f40 63 * cpu_is_omap7xx(): True for OMAP730, OMAP850
9ad5897c 64 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
9839c6b8 65 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
9ad5897c
TL
66 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
67 * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
68 * cpu_is_omap243x(): True for OMAP2430
2c17f615 69 * cpu_is_omap343x(): True for OMAP3430
c6a6e6e2 70 * cpu_is_omap443x(): True for OMAP4430
fa54dccd 71 * cpu_is_omap446x(): True for OMAP4460
ec023e46 72 * cpu_is_omap447x(): True for OMAP4470
1da177e4 73 */
84a34344 74#define GET_OMAP_CLASS (omap_rev() & 0xff)
1da177e4 75
1da177e4
LT
76#define IS_OMAP_CLASS(class, id) \
77static inline int is_omap ##class (void) \
78{ \
79 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
80}
81
99541195
AM
82#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
83
84#define IS_AM_CLASS(class, id) \
85static inline int is_am ##class (void) \
86{ \
87 return (GET_AM_CLASS == (id)) ? 1 : 0; \
88}
89
a920360f
HP
90#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
91
92#define IS_TI_CLASS(class, id) \
93static inline int is_ti ##class (void) \
94{ \
95 return (GET_TI_CLASS == (id)) ? 1 : 0; \
96}
97
84a34344 98#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
9ad5897c
TL
99
100#define IS_OMAP_SUBCLASS(subclass, id) \
101static inline int is_omap ##subclass (void) \
102{ \
103 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
104}
105
4bd7be22
HP
106#define IS_TI_SUBCLASS(subclass, id) \
107static inline int is_ti ##subclass (void) \
108{ \
109 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
110}
111
99541195
AM
112#define IS_AM_SUBCLASS(subclass, id) \
113static inline int is_am ##subclass (void) \
114{ \
115 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
116}
117
1da177e4
LT
118IS_OMAP_CLASS(7xx, 0x07)
119IS_OMAP_CLASS(15xx, 0x15)
120IS_OMAP_CLASS(16xx, 0x16)
121IS_OMAP_CLASS(24xx, 0x24)
2c17f615 122IS_OMAP_CLASS(34xx, 0x34)
b570e0ec 123IS_OMAP_CLASS(44xx, 0x44)
68a88b98 124IS_AM_CLASS(35xx, 0x35)
99541195 125IS_AM_CLASS(33xx, 0x33)
1da177e4 126
a920360f
HP
127IS_TI_CLASS(81xx, 0x81)
128
9ad5897c
TL
129IS_OMAP_SUBCLASS(242x, 0x242)
130IS_OMAP_SUBCLASS(243x, 0x243)
2c17f615 131IS_OMAP_SUBCLASS(343x, 0x343)
2456a10f 132IS_OMAP_SUBCLASS(363x, 0x363)
b570e0ec 133IS_OMAP_SUBCLASS(443x, 0x443)
fa54dccd 134IS_OMAP_SUBCLASS(446x, 0x446)
ec023e46 135IS_OMAP_SUBCLASS(447x, 0x447)
9ad5897c 136
4bd7be22 137IS_TI_SUBCLASS(816x, 0x816)
4390f5b2 138IS_TI_SUBCLASS(814x, 0x814)
99541195 139IS_AM_SUBCLASS(335x, 0x335)
4bd7be22 140
9839c6b8
TL
141#define cpu_is_omap7xx() 0
142#define cpu_is_omap15xx() 0
143#define cpu_is_omap16xx() 0
144#define cpu_is_omap24xx() 0
9ad5897c
TL
145#define cpu_is_omap242x() 0
146#define cpu_is_omap243x() 0
2c17f615
SMK
147#define cpu_is_omap34xx() 0
148#define cpu_is_omap343x() 0
a920360f 149#define cpu_is_ti81xx() 0
4bd7be22 150#define cpu_is_ti816x() 0
4390f5b2 151#define cpu_is_ti814x() 0
68a88b98 152#define soc_is_am35xx() 0
99541195
AM
153#define cpu_is_am33xx() 0
154#define cpu_is_am335x() 0
44169075
SS
155#define cpu_is_omap44xx() 0
156#define cpu_is_omap443x() 0
fa54dccd 157#define cpu_is_omap446x() 0
ec023e46 158#define cpu_is_omap447x() 0
9839c6b8
TL
159
160#if defined(MULTI_OMAP1)
161# if defined(CONFIG_ARCH_OMAP730)
162# undef cpu_is_omap7xx
163# define cpu_is_omap7xx() is_omap7xx()
164# endif
ae302f40
ZM
165# if defined(CONFIG_ARCH_OMAP850)
166# undef cpu_is_omap7xx
167# define cpu_is_omap7xx() is_omap7xx()
168# endif
9ad5897c 169# if defined(CONFIG_ARCH_OMAP15XX)
9839c6b8
TL
170# undef cpu_is_omap15xx
171# define cpu_is_omap15xx() is_omap15xx()
172# endif
173# if defined(CONFIG_ARCH_OMAP16XX)
174# undef cpu_is_omap16xx
1da177e4
LT
175# define cpu_is_omap16xx() is_omap16xx()
176# endif
177#else
178# if defined(CONFIG_ARCH_OMAP730)
9839c6b8 179# undef cpu_is_omap7xx
1da177e4 180# define cpu_is_omap7xx() 1
1da177e4 181# endif
ae302f40
ZM
182# if defined(CONFIG_ARCH_OMAP850)
183# undef cpu_is_omap7xx
184# define cpu_is_omap7xx() 1
185# endif
9ad5897c 186# if defined(CONFIG_ARCH_OMAP15XX)
9839c6b8 187# undef cpu_is_omap15xx
1da177e4 188# define cpu_is_omap15xx() 1
1da177e4
LT
189# endif
190# if defined(CONFIG_ARCH_OMAP16XX)
9839c6b8 191# undef cpu_is_omap16xx
1da177e4 192# define cpu_is_omap16xx() 1
9839c6b8 193# endif
2c17f615
SMK
194#endif
195
196#if defined(MULTI_OMAP2)
088ef950 197# if defined(CONFIG_ARCH_OMAP2)
9839c6b8 198# undef cpu_is_omap24xx
2c17f615 199# define cpu_is_omap24xx() is_omap24xx()
54c44fb7 200# endif
59b479e0 201# if defined (CONFIG_SOC_OMAP2420)
54c44fb7 202# undef cpu_is_omap242x
9ad5897c 203# define cpu_is_omap242x() is_omap242x()
54c44fb7 204# endif
59b479e0 205# if defined (CONFIG_SOC_OMAP2430)
54c44fb7 206# undef cpu_is_omap243x
9ad5897c 207# define cpu_is_omap243x() is_omap243x()
1da177e4 208# endif
a8eb7ca0 209# if defined(CONFIG_ARCH_OMAP3)
2c17f615
SMK
210# undef cpu_is_omap34xx
211# undef cpu_is_omap343x
212# define cpu_is_omap34xx() is_omap34xx()
213# define cpu_is_omap343x() is_omap343x()
214# endif
215#else
088ef950 216# if defined(CONFIG_ARCH_OMAP2)
2c17f615
SMK
217# undef cpu_is_omap24xx
218# define cpu_is_omap24xx() 1
219# endif
59b479e0 220# if defined(CONFIG_SOC_OMAP2420)
2c17f615
SMK
221# undef cpu_is_omap242x
222# define cpu_is_omap242x() 1
223# endif
59b479e0 224# if defined(CONFIG_SOC_OMAP2430)
2c17f615
SMK
225# undef cpu_is_omap243x
226# define cpu_is_omap243x() 1
227# endif
a8eb7ca0 228# if defined(CONFIG_ARCH_OMAP3)
2c17f615
SMK
229# undef cpu_is_omap34xx
230# define cpu_is_omap34xx() 1
231# endif
59b479e0 232# if defined(CONFIG_SOC_OMAP3430)
2c17f615
SMK
233# undef cpu_is_omap343x
234# define cpu_is_omap343x() 1
235# endif
1da177e4
LT
236#endif
237
9839c6b8
TL
238/*
239 * Macros to detect individual cpu types.
240 * These are only rarely needed.
d2ba779a 241 * cpu_is_omap310(): True for OMAP310
9839c6b8
TL
242 * cpu_is_omap1510(): True for OMAP1510
243 * cpu_is_omap1610(): True for OMAP1610
244 * cpu_is_omap1611(): True for OMAP1611
245 * cpu_is_omap5912(): True for OMAP5912
246 * cpu_is_omap1621(): True for OMAP1621
247 * cpu_is_omap1710(): True for OMAP1710
248 * cpu_is_omap2420(): True for OMAP2420
9ad5897c
TL
249 * cpu_is_omap2422(): True for OMAP2422
250 * cpu_is_omap2423(): True for OMAP2423
251 * cpu_is_omap2430(): True for OMAP2430
2c17f615 252 * cpu_is_omap3430(): True for OMAP3430
9839c6b8 253 */
84a34344 254#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
9839c6b8
TL
255
256#define IS_OMAP_TYPE(type, id) \
257static inline int is_omap ##type (void) \
258{ \
259 return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
260}
261
9ad5897c 262IS_OMAP_TYPE(310, 0x0310)
9839c6b8
TL
263IS_OMAP_TYPE(1510, 0x1510)
264IS_OMAP_TYPE(1610, 0x1610)
265IS_OMAP_TYPE(1611, 0x1611)
266IS_OMAP_TYPE(5912, 0x1611)
267IS_OMAP_TYPE(1621, 0x1621)
268IS_OMAP_TYPE(1710, 0x1710)
269IS_OMAP_TYPE(2420, 0x2420)
9ad5897c
TL
270IS_OMAP_TYPE(2422, 0x2422)
271IS_OMAP_TYPE(2423, 0x2423)
272IS_OMAP_TYPE(2430, 0x2430)
2c17f615 273IS_OMAP_TYPE(3430, 0x3430)
9839c6b8 274
9ad5897c 275#define cpu_is_omap310() 0
9839c6b8
TL
276#define cpu_is_omap1510() 0
277#define cpu_is_omap1610() 0
278#define cpu_is_omap5912() 0
279#define cpu_is_omap1611() 0
280#define cpu_is_omap1621() 0
281#define cpu_is_omap1710() 0
282#define cpu_is_omap2420() 0
9ad5897c
TL
283#define cpu_is_omap2422() 0
284#define cpu_is_omap2423() 0
285#define cpu_is_omap2430() 0
2c17f615 286#define cpu_is_omap3430() 0
2456a10f 287#define cpu_is_omap3630() 0
9839c6b8 288
9839c6b8
TL
289/*
290 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
0fb37842 291 * between 310 vs. 1510 and 1611B/5912 vs. 1710.
9839c6b8 292 */
a9f82d10 293
9ad5897c
TL
294#if defined(CONFIG_ARCH_OMAP15XX)
295# undef cpu_is_omap310
296# undef cpu_is_omap1510
297# define cpu_is_omap310() is_omap310()
298# define cpu_is_omap1510() is_omap1510()
299#endif
300
9839c6b8
TL
301#if defined(CONFIG_ARCH_OMAP16XX)
302# undef cpu_is_omap1610
303# undef cpu_is_omap1611
304# undef cpu_is_omap5912
305# undef cpu_is_omap1621
306# undef cpu_is_omap1710
1da177e4 307# define cpu_is_omap1610() is_omap1610()
9839c6b8 308# define cpu_is_omap1611() is_omap1611()
1da177e4 309# define cpu_is_omap5912() is_omap5912()
9839c6b8 310# define cpu_is_omap1621() is_omap1621()
1da177e4 311# define cpu_is_omap1710() is_omap1710()
9839c6b8
TL
312#endif
313
088ef950 314#if defined(CONFIG_ARCH_OMAP2)
9ad5897c
TL
315# undef cpu_is_omap2420
316# undef cpu_is_omap2422
317# undef cpu_is_omap2423
318# undef cpu_is_omap2430
319# define cpu_is_omap2420() is_omap2420()
320# define cpu_is_omap2422() is_omap2422()
321# define cpu_is_omap2423() is_omap2423()
322# define cpu_is_omap2430() is_omap2430()
1da177e4
LT
323#endif
324
a8eb7ca0 325#if defined(CONFIG_ARCH_OMAP3)
2c17f615 326# undef cpu_is_omap3430
a920360f 327# undef cpu_is_ti81xx
4bd7be22 328# undef cpu_is_ti816x
4390f5b2 329# undef cpu_is_ti814x
68a88b98 330# undef soc_is_am35xx
99541195
AM
331# undef cpu_is_am33xx
332# undef cpu_is_am335x
2c17f615 333# define cpu_is_omap3430() is_omap3430()
2456a10f
NM
334# undef cpu_is_omap3630
335# define cpu_is_omap3630() is_omap363x()
a920360f 336# define cpu_is_ti81xx() is_ti81xx()
4bd7be22 337# define cpu_is_ti816x() is_ti816x()
4390f5b2 338# define cpu_is_ti814x() is_ti814x()
68a88b98 339# define soc_is_am35xx() is_am35xx()
99541195
AM
340# define cpu_is_am33xx() is_am33xx()
341# define cpu_is_am335x() is_am335x()
2c17f615
SMK
342#endif
343
44169075
SS
344# if defined(CONFIG_ARCH_OMAP4)
345# undef cpu_is_omap44xx
346# undef cpu_is_omap443x
fa54dccd 347# undef cpu_is_omap446x
ec023e46 348# undef cpu_is_omap447x
b570e0ec
SS
349# define cpu_is_omap44xx() is_omap44xx()
350# define cpu_is_omap443x() is_omap443x()
fa54dccd 351# define cpu_is_omap446x() is_omap446x()
ec023e46 352# define cpu_is_omap447x() is_omap447x()
44169075
SS
353# endif
354
9ad5897c 355/* Macros to detect if we have OMAP1 or OMAP2 */
ae302f40 356#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
9ad5897c 357 cpu_is_omap16xx())
44169075
SS
358#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
359 cpu_is_omap44xx())
2c17f615 360
a8823143
TL
361/* Various silicon revisions for omap2 */
362#define OMAP242X_CLASS 0x24200024
76abab21 363#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
057673d8 364#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS | (0x1 << 8))
2c17f615 365
a8823143 366#define OMAP243X_CLASS 0x24300024
76abab21 367#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
2c17f615 368
a8823143 369#define OMAP343X_CLASS 0x34300034
76abab21 370#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
057673d8
PW
371#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS | (0x1 << 8))
372#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS | (0x2 << 8))
373#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS | (0x3 << 8))
374#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS | (0x4 << 8))
375#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS | (0x5 << 8))
76abab21
SP
376
377#define OMAP363X_CLASS 0x36300034
378#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
057673d8
PW
379#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
380#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
2456a10f 381
4bd7be22
HP
382#define TI816X_CLASS 0x81600034
383#define TI8168_REV_ES1_0 TI816X_CLASS
057673d8 384#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
4bd7be22 385
4390f5b2
HP
386#define TI814X_CLASS 0x81400034
387#define TI8148_REV_ES1_0 TI814X_CLASS
388#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
389#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
390
68a88b98
KH
391#define AM35XX_CLASS 0x35170034
392#define AM35XX_REV_ES1_0 AM35XX_CLASS
393#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
394
99541195
AM
395#define AM335X_CLASS 0x33500034
396#define AM335X_REV_ES1_0 AM335X_CLASS
397
b570e0ec 398#define OMAP443X_CLASS 0x44300044
e49c4d27
NK
399#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
400#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
401#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
402#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
55035c15 403#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
44169075 404
fa54dccd
A
405#define OMAP446X_CLASS 0x44600044
406#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
33ee0db5 407#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS | (0x11 << 8))
fa54dccd 408
ec023e46
LI
409#define OMAP447X_CLASS 0x44700044
410#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
411
4de34f35
VH
412void omap2xxx_check_revision(void);
413void omap3xxx_check_revision(void);
414void omap4xxx_check_revision(void);
415void omap3xxx_check_features(void);
416void ti81xx_check_features(void);
417void omap4xxx_check_features(void);
a9f82d10 418
8384ce07
SP
419/*
420 * Runtime detection of OMAP3 features
b02b9172
PW
421 *
422 * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
423 * family have OS-level control over the I/O chain clock. This is
424 * to avoid a window during which wakeups could potentially be lost
425 * during powerdomain transitions. If this bit is set, it
426 * indicates that the chip does support OS-level control of this
427 * feature.
8384ce07 428 */
cc0170b2 429extern u32 omap_features;
8384ce07
SP
430
431#define OMAP3_HAS_L2CACHE BIT(0)
432#define OMAP3_HAS_IVA BIT(1)
433#define OMAP3_HAS_SGX BIT(2)
434#define OMAP3_HAS_NEON BIT(3)
435#define OMAP3_HAS_ISP BIT(4)
7356f0b2 436#define OMAP3_HAS_192MHZ_CLK BIT(5)
ad0c63f1 437#define OMAP3_HAS_IO_WAKEUP BIT(6)
4bd7be22 438#define OMAP3_HAS_SDRC BIT(7)
b02b9172
PW
439#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
440#define OMAP4_HAS_MPU_1GHZ BIT(9)
441#define OMAP4_HAS_MPU_1_2GHZ BIT(10)
442#define OMAP4_HAS_MPU_1_5GHZ BIT(11)
cc0170b2 443
8384ce07
SP
444
445#define OMAP3_HAS_FEATURE(feat,flag) \
446static inline unsigned int omap3_has_ ##feat(void) \
447{ \
cc0170b2 448 return omap_features & OMAP3_HAS_ ##flag; \
8384ce07
SP
449} \
450
451OMAP3_HAS_FEATURE(l2cache, L2CACHE)
452OMAP3_HAS_FEATURE(sgx, SGX)
453OMAP3_HAS_FEATURE(iva, IVA)
454OMAP3_HAS_FEATURE(neon, NEON)
455OMAP3_HAS_FEATURE(isp, ISP)
7356f0b2 456OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
ad0c63f1 457OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
4bd7be22 458OMAP3_HAS_FEATURE(sdrc, SDRC)
b02b9172 459OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
8384ce07 460
cc0170b2
A
461/*
462 * Runtime detection of OMAP4 features
463 */
cc0170b2
A
464#define OMAP4_HAS_FEATURE(feat, flag) \
465static inline unsigned int omap4_has_ ##feat(void) \
466{ \
467 return omap_features & OMAP4_HAS_ ##flag; \
468} \
469
470OMAP4_HAS_FEATURE(mpu_1ghz, MPU_1GHZ)
471OMAP4_HAS_FEATURE(mpu_1_2ghz, MPU_1_2GHZ)
472OMAP4_HAS_FEATURE(mpu_1_5ghz, MPU_1_5GHZ)
473
a9f82d10 474#endif
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