OMAP: omap_device: optionally auto-adjust device activate/deactivate latencies
[deliverable/linux.git] / arch / arm / plat-omap / include / plat / omap_hwmod.h
CommitLineData
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1/*
2 * omap_hwmod macros, structures
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * Created in collaboration with (alphabetical order): Benoit Cousson,
8 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
9 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * These headers and macros are used to define OMAP on-chip module
16 * data and their integration with other OMAP modules and Linux.
17 *
18 * References:
19 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
20 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
21 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
22 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
23 * - Open Core Protocol Specification 2.2
24 *
25 * To do:
26 * - add interconnect error log structures
27 * - add pinmuxing
28 * - init_conn_id_bit (CONNID_BIT_VECTOR)
29 * - implement default hwmod SMS/SDRC flags?
30 *
31 */
32#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
33#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
34
35#include <linux/kernel.h>
36#include <linux/ioport.h>
37
ce491cf8 38#include <plat/cpu.h>
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39
40struct omap_device;
41
42/* OCP SYSCONFIG bit shifts/masks */
43#define SYSC_MIDLEMODE_SHIFT 12
44#define SYSC_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
45#define SYSC_CLOCKACTIVITY_SHIFT 8
46#define SYSC_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
47#define SYSC_SIDLEMODE_SHIFT 3
48#define SYSC_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
49#define SYSC_ENAWAKEUP_SHIFT 2
50#define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
51#define SYSC_SOFTRESET_SHIFT 1
52#define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
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53#define SYSC_AUTOIDLE_SHIFT 0
54#define SYSC_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
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55
56/* OCP SYSSTATUS bit shifts/masks */
57#define SYSS_RESETDONE_SHIFT 0
58#define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
59
60/* Master standby/slave idle mode flags */
61#define HWMOD_IDLEMODE_FORCE (1 << 0)
62#define HWMOD_IDLEMODE_NO (1 << 1)
63#define HWMOD_IDLEMODE_SMART (1 << 2)
64
65
66/**
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67 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
68 * @name: name of the IRQ channel (module local name)
69 * @irq_ch: IRQ channel ID
70 *
71 * @name should be something short, e.g., "tx" or "rx". It is for use
72 * by platform_get_resource_byname(). It is defined locally to the
73 * hwmod.
74 */
75struct omap_hwmod_irq_info {
76 const char *name;
77 u16 irq;
78};
79
80/**
81 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
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82 * @name: name of the DMA channel (module local name)
83 * @dma_ch: DMA channel ID
84 *
85 * @name should be something short, e.g., "tx" or "rx". It is for use
86 * by platform_get_resource_byname(). It is defined locally to the
87 * hwmod.
88 */
89struct omap_hwmod_dma_info {
90 const char *name;
91 u16 dma_ch;
92};
93
94/**
95 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
96 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
97 * @clkdev_dev_id: opt clock: clkdev dev_id string
98 * @clkdev_con_id: opt clock: clkdev con_id string
99 * @_clk: pointer to the struct clk (filled in at runtime)
100 *
101 * The module's interface clock and main functional clock should not
102 * be added as optional clocks.
103 */
104struct omap_hwmod_opt_clk {
105 const char *role;
106 const char *clkdev_dev_id;
107 const char *clkdev_con_id;
108 struct clk *_clk;
109};
110
111
112/* omap_hwmod_omap2_firewall.flags bits */
113#define OMAP_FIREWALL_L3 (1 << 0)
114#define OMAP_FIREWALL_L4 (1 << 1)
115
116/**
117 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
118 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
119 * @l4_fw_region: L4 firewall region ID
120 * @l4_prot_group: L4 protection group ID
121 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
122 */
123struct omap_hwmod_omap2_firewall {
124 u8 l3_perm_bit;
125 u8 l4_fw_region;
126 u8 l4_prot_group;
127 u8 flags;
128};
129
130
131/*
132 * omap_hwmod_addr_space.flags bits
133 *
134 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
135 * ADDR_TYPE_RT: Address space contains module register target data.
136 */
137#define ADDR_MAP_ON_INIT (1 << 0)
138#define ADDR_TYPE_RT (1 << 1)
139
140/**
141 * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
142 * @pa_start: starting physical address
143 * @pa_end: ending physical address
144 * @flags: (see omap_hwmod_addr_space.flags macros above)
145 *
146 * Address space doesn't necessarily follow physical interconnect
147 * structure. GPMC is one example.
148 */
149struct omap_hwmod_addr_space {
150 u32 pa_start;
151 u32 pa_end;
152 u8 flags;
153};
154
155
156/*
157 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
158 * interface to interact with the hwmod. Used to add sleep dependencies
159 * when the module is enabled or disabled.
160 */
161#define OCP_USER_MPU (1 << 0)
162#define OCP_USER_SDMA (1 << 1)
163
164/* omap_hwmod_ocp_if.flags bits */
165#define OCPIF_HAS_IDLEST (1 << 0)
166#define OCPIF_SWSUP_IDLE (1 << 1)
167#define OCPIF_CAN_BURST (1 << 2)
168
169/**
170 * struct omap_hwmod_ocp_if - OCP interface data
171 * @master: struct omap_hwmod that initiates OCP transactions on this link
172 * @slave: struct omap_hwmod that responds to OCP transactions on this link
173 * @addr: address space associated with this link
174 * @clkdev_dev_id: interface clock: clkdev dev_id string
175 * @clkdev_con_id: interface clock: clkdev con_id string
176 * @_clk: pointer to the interface struct clk (filled in at runtime)
177 * @fw: interface firewall data
178 * @addr_cnt: ARRAY_SIZE(@addr)
179 * @width: OCP data width
180 * @thread_cnt: number of threads
181 * @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
182 * @user: initiators using this interface (see OCP_USER_* macros above)
183 * @flags: OCP interface flags (see OCPIF_* macros above)
184 *
185 * It may also be useful to add a tag_cnt field for OCP2.x devices.
186 *
187 * Parameter names beginning with an underscore are managed internally by
188 * the omap_hwmod code and should not be set during initialization.
189 */
190struct omap_hwmod_ocp_if {
191 struct omap_hwmod *master;
192 struct omap_hwmod *slave;
193 struct omap_hwmod_addr_space *addr;
194 const char *clkdev_dev_id;
195 const char *clkdev_con_id;
196 struct clk *_clk;
197 union {
198 struct omap_hwmod_omap2_firewall omap2;
199 } fw;
200 u8 addr_cnt;
201 u8 width;
202 u8 thread_cnt;
203 u8 max_burst_len;
204 u8 user;
205 u8 flags;
206};
207
208
209/* Macros for use in struct omap_hwmod_sysconfig */
210
211/* Flags for use in omap_hwmod_sysconfig.idlemodes */
212#define MASTER_STANDBY_SHIFT 2
213#define SLAVE_IDLE_SHIFT 0
214#define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
215#define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
216#define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
217#define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
218#define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
219#define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
220
221/* omap_hwmod_sysconfig.sysc_flags capability flags */
222#define SYSC_HAS_AUTOIDLE (1 << 0)
223#define SYSC_HAS_SOFTRESET (1 << 1)
224#define SYSC_HAS_ENAWAKEUP (1 << 2)
225#define SYSC_HAS_EMUFREE (1 << 3)
226#define SYSC_HAS_CLOCKACTIVITY (1 << 4)
227#define SYSC_HAS_SIDLEMODE (1 << 5)
228#define SYSC_HAS_MIDLEMODE (1 << 6)
229#define SYSS_MISSING (1 << 7)
883edfdd 230#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
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231
232/* omap_hwmod_sysconfig.clockact flags */
233#define CLOCKACT_TEST_BOTH 0x0
234#define CLOCKACT_TEST_MAIN 0x1
235#define CLOCKACT_TEST_ICLK 0x2
236#define CLOCKACT_TEST_NONE 0x3
237
238/**
239 * struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data
240 * @rev_offs: IP block revision register offset (from module base addr)
241 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
242 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
243 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
244 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
245 * @clockact: the default value of the module CLOCKACTIVITY bits
246 *
247 * @clockact describes to the module which clocks are likely to be
248 * disabled when the PRCM issues its idle request to the module. Some
249 * modules have separate clockdomains for the interface clock and main
250 * functional clock, and can check whether they should acknowledge the
251 * idle request based on the internal module functionality that has
252 * been associated with the clocks marked in @clockact. This field is
253 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
254 *
255 */
256struct omap_hwmod_sysconfig {
257 u16 rev_offs;
258 u16 sysc_offs;
259 u16 syss_offs;
260 u8 idlemodes;
261 u8 sysc_flags;
262 u8 clockact;
263};
264
265/**
266 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
267 * @module_offs: PRCM submodule offset from the start of the PRM/CM
268 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
269 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
270 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
271 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
272 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
273 *
274 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
275 * WKEN, GRPSEL registers. In an ideal world, no extra information
276 * would be needed for IDLEST information, but alas, there are some
277 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
278 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
279 */
280struct omap_hwmod_omap2_prcm {
281 s16 module_offs;
282 u8 prcm_reg_id;
283 u8 module_bit;
284 u8 idlest_reg_id;
285 u8 idlest_idle_bit;
286 u8 idlest_stdby_bit;
287};
288
289
290/**
291 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
292 * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2
293 * @device_offs: device register offset from @module_offs
294 * @submodule_wkdep_bit: bit shift of the WKDEP range
295 */
296struct omap_hwmod_omap4_prcm {
297 u32 module_offs;
298 u16 device_offs;
299 u8 submodule_wkdep_bit;
300};
301
302
303/*
304 * omap_hwmod.flags definitions
305 *
306 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
307 * of idle, rather than relying on module smart-idle
308 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
309 * of standby, rather than relying on module smart-standby
310 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
311 * SDRAM controller, etc.
312 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
313 * controller, etc.
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314 * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
315 * when module is enabled, rather than the default, which is to
316 * enable autoidle
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317 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
318 */
319#define HWMOD_SWSUP_SIDLE (1 << 0)
320#define HWMOD_SWSUP_MSTANDBY (1 << 1)
321#define HWMOD_INIT_NO_RESET (1 << 2)
322#define HWMOD_INIT_NO_IDLE (1 << 3)
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323#define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
324#define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
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325
326/*
327 * omap_hwmod._int_flags definitions
328 * These are for internal use only and are managed by the omap_hwmod code.
329 *
330 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
331 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
332 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
333 */
334#define _HWMOD_NO_MPU_PORT (1 << 0)
335#define _HWMOD_WAKEUP_ENABLED (1 << 1)
336#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
337
338/*
339 * omap_hwmod._state definitions
340 *
341 * INITIALIZED: reset (optionally), initialized, enabled, disabled
342 * (optionally)
343 *
344 *
345 */
346#define _HWMOD_STATE_UNKNOWN 0
347#define _HWMOD_STATE_REGISTERED 1
348#define _HWMOD_STATE_CLKS_INITED 2
349#define _HWMOD_STATE_INITIALIZED 3
350#define _HWMOD_STATE_ENABLED 4
351#define _HWMOD_STATE_IDLE 5
352#define _HWMOD_STATE_DISABLED 6
353
354/**
355 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
356 * @name: name of the hwmod
357 * @od: struct omap_device currently associated with this hwmod (internal use)
358 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
359 * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
360 * @prcm: PRCM data pertaining to this hwmod
361 * @clkdev_dev_id: main clock: clkdev dev_id string
362 * @clkdev_con_id: main clock: clkdev con_id string
363 * @_clk: pointer to the main struct clk (filled in at runtime)
364 * @opt_clks: other device clocks that drivers can request (0..*)
365 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
366 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
367 * @sysconfig: device SYSCONFIG/SYSSTATUS register data
368 * @dev_attr: arbitrary device attributes that can be passed to the driver
369 * @_sysc_cache: internal-use hwmod flags
370 * @_rt_va: cached register target start address (internal use)
371 * @_mpu_port_index: cached MPU register target slave ID (internal use)
372 * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
373 * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
374 * @mpu_irqs_cnt: number of @mpu_irqs
375 * @sdma_chs_cnt: number of @sdma_chs
376 * @opt_clks_cnt: number of @opt_clks
377 * @master_cnt: number of @master entries
378 * @slaves_cnt: number of @slave entries
379 * @response_lat: device OCP response latency (in interface clock cycles)
380 * @_int_flags: internal-use hwmod flags
381 * @_state: internal-use hwmod state
382 * @flags: hwmod flags (documented below)
383 * @omap_chip: OMAP chips this hwmod is present on
384 * @node: list node for hwmod list (internal use)
385 *
386 * @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main
387 * clock," which for our purposes is defined as "the functional clock needed
388 * for register accesses to complete." Modules may not have a main clock if
389 * the interface clock also serves as a main clock.
390 *
391 * Parameter names beginning with an underscore are managed internally by
392 * the omap_hwmod code and should not be set during initialization.
393 */
394struct omap_hwmod {
395 const char *name;
396 struct omap_device *od;
718bfd76 397 struct omap_hwmod_irq_info *mpu_irqs;
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398 struct omap_hwmod_dma_info *sdma_chs;
399 union {
400 struct omap_hwmod_omap2_prcm omap2;
401 struct omap_hwmod_omap4_prcm omap4;
402 } prcm;
403 const char *clkdev_dev_id;
404 const char *clkdev_con_id;
405 struct clk *_clk;
406 struct omap_hwmod_opt_clk *opt_clks;
407 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
408 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
409 struct omap_hwmod_sysconfig *sysconfig;
410 void *dev_attr;
411 u32 _sysc_cache;
412 void __iomem *_rt_va;
413 struct list_head node;
414 u16 flags;
415 u8 _mpu_port_index;
416 u8 msuspendmux_reg_id;
417 u8 msuspendmux_shift;
418 u8 response_lat;
419 u8 mpu_irqs_cnt;
420 u8 sdma_chs_cnt;
421 u8 opt_clks_cnt;
422 u8 masters_cnt;
423 u8 slaves_cnt;
424 u8 hwmods_cnt;
425 u8 _int_flags;
426 u8 _state;
427 const struct omap_chip_id omap_chip;
428};
429
430int omap_hwmod_init(struct omap_hwmod **ohs);
431int omap_hwmod_register(struct omap_hwmod *oh);
432int omap_hwmod_unregister(struct omap_hwmod *oh);
433struct omap_hwmod *omap_hwmod_lookup(const char *name);
434int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
435int omap_hwmod_late_init(void);
436
437int omap_hwmod_enable(struct omap_hwmod *oh);
438int omap_hwmod_idle(struct omap_hwmod *oh);
439int omap_hwmod_shutdown(struct omap_hwmod *oh);
440
441int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
442int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
443
444int omap_hwmod_reset(struct omap_hwmod *oh);
445void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
446
447void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
448u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
449
450int omap_hwmod_count_resources(struct omap_hwmod *oh);
451int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
452
453struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
454
455int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
456 struct omap_hwmod *init_oh);
457int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
458 struct omap_hwmod *init_oh);
459
460int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
461int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
462int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
463int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
464
465int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
466int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
467
468#endif
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