Commit | Line | Data |
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5e1c5ff4 TL |
1 | /* |
2 | * linux/arch/arm/plat-omap/mux.c | |
3 | * | |
4 | * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h | |
5 | * | |
9330899e | 6 | * Copyright (C) 2003 - 2008 Nokia Corporation |
5e1c5ff4 | 7 | * |
9330899e | 8 | * Written by Tony Lindgren |
5e1c5ff4 TL |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | * | |
24 | */ | |
5e1c5ff4 TL |
25 | #include <linux/module.h> |
26 | #include <linux/init.h> | |
1a8bfa1e | 27 | #include <linux/kernel.h> |
fced80c7 | 28 | #include <linux/io.h> |
5e1c5ff4 | 29 | #include <linux/spinlock.h> |
2c799cef TL |
30 | |
31 | #include <asm/system.h> | |
32 | ||
33 | #include <plat/cpu.h> | |
ce491cf8 | 34 | #include <plat/mux.h> |
5e1c5ff4 TL |
35 | |
36 | #ifdef CONFIG_OMAP_MUX | |
37 | ||
7d7f665d | 38 | static struct omap_mux_cfg *mux_cfg; |
1a8bfa1e | 39 | |
7d7f665d | 40 | int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg) |
1a8bfa1e | 41 | { |
7d7f665d TL |
42 | if (!arch_mux_cfg || !arch_mux_cfg->pins || arch_mux_cfg->size == 0 |
43 | || !arch_mux_cfg->cfg_reg) { | |
44 | printk(KERN_ERR "Invalid pin table\n"); | |
45 | return -EINVAL; | |
46 | } | |
47 | ||
48 | mux_cfg = arch_mux_cfg; | |
1a8bfa1e TL |
49 | |
50 | return 0; | |
51 | } | |
52 | ||
5e1c5ff4 TL |
53 | /* |
54 | * Sets the Omap MUX and PULL_DWN registers based on the table | |
55 | */ | |
1a8bfa1e | 56 | int __init_or_module omap_cfg_reg(const unsigned long index) |
5e1c5ff4 | 57 | { |
225dfda1 | 58 | struct pin_config *reg; |
5e1c5ff4 | 59 | |
c9d8230e | 60 | if (!cpu_class_is_omap1()) { |
15ac7afe TL |
61 | printk(KERN_ERR "mux: Broken omap_cfg_reg(%lu) entry\n", |
62 | index); | |
63 | WARN_ON(1); | |
64 | return -EINVAL; | |
65 | } | |
44169075 | 66 | |
7d7f665d TL |
67 | if (mux_cfg == NULL) { |
68 | printk(KERN_ERR "Pin mux table not initialized\n"); | |
69 | return -ENODEV; | |
70 | } | |
92105bb7 | 71 | |
7d7f665d | 72 | if (index >= mux_cfg->size) { |
1a8bfa1e | 73 | printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", |
7d7f665d | 74 | index, mux_cfg->size); |
1a8bfa1e TL |
75 | dump_stack(); |
76 | return -ENODEV; | |
5e1c5ff4 TL |
77 | } |
78 | ||
225dfda1 | 79 | reg = (struct pin_config *)&mux_cfg->pins[index]; |
5e1c5ff4 | 80 | |
225dfda1 TL |
81 | if (!mux_cfg->cfg_reg) |
82 | return -ENODEV; | |
5e1c5ff4 | 83 | |
225dfda1 | 84 | return mux_cfg->cfg_reg(reg); |
5e1c5ff4 | 85 | } |
5e1c5ff4 | 86 | EXPORT_SYMBOL(omap_cfg_reg); |
1a8bfa1e TL |
87 | #else |
88 | #define omap_mux_init() do {} while(0) | |
89 | #define omap_cfg_reg(x) do {} while(0) | |
5e1c5ff4 | 90 | #endif /* CONFIG_OMAP_MUX */ |