projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 5e1c5ff4 TL |
1 | /* |
| 2 | * linux/arch/arm/plat-omap/ocpi.c | |
| 3 | * | |
| 4 | * Minimal OCP bus support for omap16xx | |
| 5 | * | |
| 6 | * Copyright (C) 2003 - 2005 Nokia Corporation | |
| 7 | * Written by Tony Lindgren <tony@atomide.com> | |
| 8 | * | |
| 9 | * Modified for clock framework by Paul Mundt <paul.mundt@nokia.com>. | |
| 10 | * | |
| 11 | * This program is free software; you can redistribute it and/or modify | |
| 12 | * it under the terms of the GNU General Public License as published by | |
| 13 | * the Free Software Foundation; either version 2 of the License, or | |
| 14 | * (at your option) any later version. | |
| 15 | * | |
| 16 | * This program is distributed in the hope that it will be useful, | |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 19 | * GNU General Public License for more details. | |
| 20 | * | |
| 21 | * You should have received a copy of the GNU General Public License | |
| 22 | * along with this program; if not, write to the Free Software | |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 24 | */ | |
| 25 | ||
| 26 | #include <linux/config.h> | |
| 27 | #include <linux/module.h> | |
| 5e1c5ff4 TL |
28 | #include <linux/types.h> |
| 29 | #include <linux/errno.h> | |
| 30 | #include <linux/kernel.h> | |
| 31 | #include <linux/init.h> | |
| 32 | #include <linux/spinlock.h> | |
| 33 | #include <linux/err.h> | |
| 34 | ||
| 35 | #include <asm/io.h> | |
| 36 | #include <asm/hardware/clock.h> | |
| 37 | #include <asm/arch/hardware.h> | |
| 38 | ||
| 39 | #define OCPI_BASE 0xfffec320 | |
| 40 | #define OCPI_FAULT (OCPI_BASE + 0x00) | |
| 41 | #define OCPI_CMD_FAULT (OCPI_BASE + 0x04) | |
| 42 | #define OCPI_SINT0 (OCPI_BASE + 0x08) | |
| 43 | #define OCPI_TABORT (OCPI_BASE + 0x0c) | |
| 44 | #define OCPI_SINT1 (OCPI_BASE + 0x10) | |
| 45 | #define OCPI_PROT (OCPI_BASE + 0x14) | |
| 46 | #define OCPI_SEC (OCPI_BASE + 0x18) | |
| 47 | ||
| 48 | /* USB OHCI OCPI access error registers */ | |
| 49 | #define HOSTUEADDR 0xfffba0e0 | |
| 50 | #define HOSTUESTATUS 0xfffba0e4 | |
| 51 | ||
| 52 | static struct clk *ocpi_ck; | |
| 53 | ||
| 54 | /* | |
| 55 | * Enables device access to OMAP buses via the OCPI bridge | |
| 56 | * FIXME: Add locking | |
| 57 | */ | |
| 58 | int ocpi_enable(void) | |
| 59 | { | |
| 60 | unsigned int val; | |
| 61 | ||
| 62 | if (!cpu_is_omap16xx()) | |
| 63 | return -ENODEV; | |
| 64 | ||
| 65 | /* Make sure there's clock for OCPI */ | |
| 66 | clk_enable(ocpi_ck); | |
| 67 | ||
| 68 | /* Enable access for OHCI in OCPI */ | |
| 69 | val = omap_readl(OCPI_PROT); | |
| 70 | val &= ~0xff; | |
| 71 | //val &= (1 << 0); /* Allow access only to EMIFS */ | |
| 72 | omap_writel(val, OCPI_PROT); | |
| 73 | ||
| 74 | val = omap_readl(OCPI_SEC); | |
| 75 | val &= ~0xff; | |
| 76 | omap_writel(val, OCPI_SEC); | |
| 77 | ||
| 78 | return 0; | |
| 79 | } | |
| 80 | EXPORT_SYMBOL(ocpi_enable); | |
| 81 | ||
| 82 | static int __init omap_ocpi_init(void) | |
| 83 | { | |
| 84 | if (!cpu_is_omap16xx()) | |
| 85 | return -ENODEV; | |
| 86 | ||
| 87 | ocpi_ck = clk_get(NULL, "l3_ocpi_ck"); | |
| 88 | if (IS_ERR(ocpi_ck)) | |
| 89 | return PTR_ERR(ocpi_ck); | |
| 90 | ||
| 91 | clk_use(ocpi_ck); | |
| 92 | ocpi_enable(); | |
| 93 | printk("OMAP OCPI interconnect driver loaded\n"); | |
| 94 | ||
| 95 | return 0; | |
| 96 | } | |
| 97 | ||
| 98 | static void __exit omap_ocpi_exit(void) | |
| 99 | { | |
| 100 | /* REVISIT: Disable OCPI */ | |
| 101 | ||
| 102 | if (!cpu_is_omap16xx()) | |
| 103 | return; | |
| 104 | ||
| 105 | clk_unuse(ocpi_ck); | |
| 106 | clk_put(ocpi_ck); | |
| 107 | } | |
| 108 | ||
| 109 | MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>"); | |
| 110 | MODULE_DESCRIPTION("OMAP OCPI bus controller module"); | |
| 111 | MODULE_LICENSE("GPL"); | |
| 112 | module_init(omap_ocpi_init); | |
| 113 | module_exit(omap_ocpi_exit); |