Commit | Line | Data |
---|---|---|
28a2b450 AL |
1 | /* |
2 | * arch/arm/plat-orion/common.c | |
3 | * | |
4 | * Marvell Orion SoC common setup code used by multiple mach-/common.c | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
7e3819d8 | 14 | #include <linux/dma-mapping.h> |
28a2b450 | 15 | #include <linux/serial_8250.h> |
9e613f8a | 16 | #include <linux/ata_platform.h> |
2f129bf4 AL |
17 | #include <linux/clk.h> |
18 | #include <linux/clkdev.h> | |
7e3819d8 | 19 | #include <linux/mv643xx_eth.h> |
aac7ffa3 | 20 | #include <linux/mv643xx_i2c.h> |
7e3819d8 | 21 | #include <net/dsa.h> |
c02cecb9 AB |
22 | #include <linux/platform_data/dma-mv_xor.h> |
23 | #include <linux/platform_data/usb-ehci-orion.h> | |
48fce88c | 24 | #include <plat/common.h> |
28a2b450 | 25 | |
4574b886 AL |
26 | /* Create a clkdev entry for a given device/clk */ |
27 | void __init orion_clkdev_add(const char *con_id, const char *dev_id, | |
28 | struct clk *clk) | |
29 | { | |
4dbc0230 | 30 | clkdev_create(clk, con_id, "%s", dev_id); |
4574b886 AL |
31 | } |
32 | ||
33 | /* Create clkdev entries for all orion platforms except kirkwood. | |
34 | Kirkwood has gated clocks for some of its peripherals, so creates | |
35 | its own clkdev entries. For all the other orion devices, create | |
36 | clkdev entries to the tclk. */ | |
37 | void __init orion_clkdev_init(struct clk *tclk) | |
38 | { | |
39 | orion_clkdev_add(NULL, "orion_spi.0", tclk); | |
40 | orion_clkdev_add(NULL, "orion_spi.1", tclk); | |
452503eb AL |
41 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); |
42 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); | |
43 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); | |
44 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); | |
4f04be62 | 45 | orion_clkdev_add(NULL, "orion_wdt", tclk); |
e91cac0a | 46 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); |
4574b886 AL |
47 | } |
48 | ||
28a2b450 AL |
49 | /* Fill in the resources structure and link it into the platform |
50 | device structure. There is always a memory region, and nearly | |
51 | always an interrupt.*/ | |
52 | static void fill_resources(struct platform_device *device, | |
53 | struct resource *resources, | |
54 | resource_size_t mapbase, | |
55 | resource_size_t size, | |
56 | unsigned int irq) | |
57 | { | |
58 | device->resource = resources; | |
59 | device->num_resources = 1; | |
60 | resources[0].flags = IORESOURCE_MEM; | |
61 | resources[0].start = mapbase; | |
62 | resources[0].end = mapbase + size; | |
63 | ||
64 | if (irq != NO_IRQ) { | |
65 | device->num_resources++; | |
66 | resources[1].flags = IORESOURCE_IRQ; | |
67 | resources[1].start = irq; | |
68 | resources[1].end = irq; | |
69 | } | |
70 | } | |
71 | ||
72 | /***************************************************************************** | |
73 | * UART | |
74 | ****************************************************************************/ | |
74c33576 AL |
75 | static unsigned long __init uart_get_clk_rate(struct clk *clk) |
76 | { | |
77 | clk_prepare_enable(clk); | |
78 | return clk_get_rate(clk); | |
79 | } | |
80 | ||
28a2b450 AL |
81 | static void __init uart_complete( |
82 | struct platform_device *orion_uart, | |
83 | struct plat_serial8250_port *data, | |
84 | struct resource *resources, | |
d19beac1 | 85 | void __iomem *membase, |
28a2b450 AL |
86 | resource_size_t mapbase, |
87 | unsigned int irq, | |
74c33576 | 88 | struct clk *clk) |
28a2b450 AL |
89 | { |
90 | data->mapbase = mapbase; | |
d19beac1 | 91 | data->membase = membase; |
28a2b450 | 92 | data->irq = irq; |
74c33576 | 93 | data->uartclk = uart_get_clk_rate(clk); |
28a2b450 AL |
94 | orion_uart->dev.platform_data = data; |
95 | ||
96 | fill_resources(orion_uart, resources, mapbase, 0xff, irq); | |
97 | platform_device_register(orion_uart); | |
98 | } | |
99 | ||
100 | /***************************************************************************** | |
101 | * UART0 | |
102 | ****************************************************************************/ | |
103 | static struct plat_serial8250_port orion_uart0_data[] = { | |
104 | { | |
105 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
106 | .iotype = UPIO_MEM, | |
107 | .regshift = 2, | |
108 | }, { | |
109 | }, | |
110 | }; | |
111 | ||
112 | static struct resource orion_uart0_resources[2]; | |
113 | ||
114 | static struct platform_device orion_uart0 = { | |
115 | .name = "serial8250", | |
116 | .id = PLAT8250_DEV_PLATFORM, | |
117 | }; | |
118 | ||
d19beac1 | 119 | void __init orion_uart0_init(void __iomem *membase, |
28a2b450 AL |
120 | resource_size_t mapbase, |
121 | unsigned int irq, | |
74c33576 | 122 | struct clk *clk) |
28a2b450 AL |
123 | { |
124 | uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, | |
74c33576 | 125 | membase, mapbase, irq, clk); |
28a2b450 AL |
126 | } |
127 | ||
128 | /***************************************************************************** | |
129 | * UART1 | |
130 | ****************************************************************************/ | |
131 | static struct plat_serial8250_port orion_uart1_data[] = { | |
132 | { | |
133 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
134 | .iotype = UPIO_MEM, | |
135 | .regshift = 2, | |
136 | }, { | |
137 | }, | |
138 | }; | |
139 | ||
140 | static struct resource orion_uart1_resources[2]; | |
141 | ||
142 | static struct platform_device orion_uart1 = { | |
143 | .name = "serial8250", | |
144 | .id = PLAT8250_DEV_PLATFORM1, | |
145 | }; | |
146 | ||
d19beac1 | 147 | void __init orion_uart1_init(void __iomem *membase, |
28a2b450 AL |
148 | resource_size_t mapbase, |
149 | unsigned int irq, | |
74c33576 | 150 | struct clk *clk) |
28a2b450 AL |
151 | { |
152 | uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, | |
74c33576 | 153 | membase, mapbase, irq, clk); |
28a2b450 AL |
154 | } |
155 | ||
156 | /***************************************************************************** | |
157 | * UART2 | |
158 | ****************************************************************************/ | |
159 | static struct plat_serial8250_port orion_uart2_data[] = { | |
160 | { | |
161 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
162 | .iotype = UPIO_MEM, | |
163 | .regshift = 2, | |
164 | }, { | |
165 | }, | |
166 | }; | |
167 | ||
168 | static struct resource orion_uart2_resources[2]; | |
169 | ||
170 | static struct platform_device orion_uart2 = { | |
171 | .name = "serial8250", | |
172 | .id = PLAT8250_DEV_PLATFORM2, | |
173 | }; | |
174 | ||
d19beac1 | 175 | void __init orion_uart2_init(void __iomem *membase, |
28a2b450 AL |
176 | resource_size_t mapbase, |
177 | unsigned int irq, | |
74c33576 | 178 | struct clk *clk) |
28a2b450 AL |
179 | { |
180 | uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, | |
74c33576 | 181 | membase, mapbase, irq, clk); |
28a2b450 AL |
182 | } |
183 | ||
184 | /***************************************************************************** | |
185 | * UART3 | |
186 | ****************************************************************************/ | |
187 | static struct plat_serial8250_port orion_uart3_data[] = { | |
188 | { | |
189 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
190 | .iotype = UPIO_MEM, | |
191 | .regshift = 2, | |
192 | }, { | |
193 | }, | |
194 | }; | |
195 | ||
196 | static struct resource orion_uart3_resources[2]; | |
197 | ||
198 | static struct platform_device orion_uart3 = { | |
199 | .name = "serial8250", | |
200 | .id = 3, | |
201 | }; | |
202 | ||
d19beac1 | 203 | void __init orion_uart3_init(void __iomem *membase, |
28a2b450 AL |
204 | resource_size_t mapbase, |
205 | unsigned int irq, | |
74c33576 | 206 | struct clk *clk) |
28a2b450 AL |
207 | { |
208 | uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, | |
74c33576 | 209 | membase, mapbase, irq, clk); |
28a2b450 | 210 | } |
f6eaccb3 AL |
211 | |
212 | /***************************************************************************** | |
213 | * SoC RTC | |
214 | ****************************************************************************/ | |
215 | static struct resource orion_rtc_resource[2]; | |
216 | ||
217 | void __init orion_rtc_init(unsigned long mapbase, | |
218 | unsigned long irq) | |
219 | { | |
220 | orion_rtc_resource[0].start = mapbase; | |
221 | orion_rtc_resource[0].end = mapbase + SZ_32 - 1; | |
222 | orion_rtc_resource[0].flags = IORESOURCE_MEM; | |
223 | orion_rtc_resource[1].start = irq; | |
224 | orion_rtc_resource[1].end = irq; | |
225 | orion_rtc_resource[1].flags = IORESOURCE_IRQ; | |
226 | ||
227 | platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); | |
228 | } | |
7e3819d8 AL |
229 | |
230 | /***************************************************************************** | |
231 | * GE | |
232 | ****************************************************************************/ | |
233 | static __init void ge_complete( | |
234 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, | |
7e3819d8 AL |
235 | struct resource *orion_ge_resource, unsigned long irq, |
236 | struct platform_device *orion_ge_shared, | |
c3a07134 | 237 | struct platform_device *orion_ge_mvmdio, |
7e3819d8 AL |
238 | struct mv643xx_eth_platform_data *eth_data, |
239 | struct platform_device *orion_ge) | |
240 | { | |
7e3819d8 AL |
241 | orion_ge_resource->start = irq; |
242 | orion_ge_resource->end = irq; | |
243 | eth_data->shared = orion_ge_shared; | |
244 | orion_ge->dev.platform_data = eth_data; | |
245 | ||
246 | platform_device_register(orion_ge_shared); | |
c3a07134 FF |
247 | if (orion_ge_mvmdio) |
248 | platform_device_register(orion_ge_mvmdio); | |
7e3819d8 AL |
249 | platform_device_register(orion_ge); |
250 | } | |
251 | ||
252 | /***************************************************************************** | |
253 | * GE00 | |
254 | ****************************************************************************/ | |
48fce88c | 255 | static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; |
7e3819d8 AL |
256 | |
257 | static struct resource orion_ge00_shared_resources[] = { | |
258 | { | |
259 | .name = "ge00 base", | |
7e3819d8 AL |
260 | }, |
261 | }; | |
262 | ||
263 | static struct platform_device orion_ge00_shared = { | |
264 | .name = MV643XX_ETH_SHARED_NAME, | |
265 | .id = 0, | |
266 | .dev = { | |
267 | .platform_data = &orion_ge00_shared_data, | |
268 | }, | |
269 | }; | |
270 | ||
c3a07134 FF |
271 | static struct resource orion_ge_mvmdio_resources[] = { |
272 | { | |
273 | .name = "ge00 mvmdio base", | |
274 | }, { | |
275 | .name = "ge00 mvmdio err irq", | |
276 | }, | |
277 | }; | |
278 | ||
279 | static struct platform_device orion_ge_mvmdio = { | |
280 | .name = "orion-mdio", | |
281 | .id = -1, | |
282 | }; | |
283 | ||
7e3819d8 AL |
284 | static struct resource orion_ge00_resources[] = { |
285 | { | |
286 | .name = "ge00 irq", | |
287 | .flags = IORESOURCE_IRQ, | |
288 | }, | |
289 | }; | |
290 | ||
291 | static struct platform_device orion_ge00 = { | |
292 | .name = MV643XX_ETH_NAME, | |
293 | .id = 0, | |
294 | .num_resources = 1, | |
295 | .resource = orion_ge00_resources, | |
296 | .dev = { | |
297 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
298 | }, | |
299 | }; | |
300 | ||
301 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
302 | unsigned long mapbase, |
303 | unsigned long irq, | |
58569aee APR |
304 | unsigned long irq_err, |
305 | unsigned int tx_csum_limit) | |
7e3819d8 AL |
306 | { |
307 | fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, | |
c3a07134 FF |
308 | mapbase + 0x2000, SZ_16K - 1, NO_IRQ); |
309 | fill_resources(&orion_ge_mvmdio, orion_ge_mvmdio_resources, | |
310 | mapbase + 0x2004, 0x84 - 1, irq_err); | |
58569aee | 311 | orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; |
452503eb | 312 | ge_complete(&orion_ge00_shared_data, |
7e3819d8 | 313 | orion_ge00_resources, irq, &orion_ge00_shared, |
c3a07134 | 314 | &orion_ge_mvmdio, |
7e3819d8 AL |
315 | eth_data, &orion_ge00); |
316 | } | |
317 | ||
318 | /***************************************************************************** | |
319 | * GE01 | |
320 | ****************************************************************************/ | |
48fce88c | 321 | static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; |
7e3819d8 AL |
322 | |
323 | static struct resource orion_ge01_shared_resources[] = { | |
324 | { | |
325 | .name = "ge01 base", | |
c3a07134 | 326 | } |
7e3819d8 AL |
327 | }; |
328 | ||
329 | static struct platform_device orion_ge01_shared = { | |
330 | .name = MV643XX_ETH_SHARED_NAME, | |
331 | .id = 1, | |
332 | .dev = { | |
333 | .platform_data = &orion_ge01_shared_data, | |
334 | }, | |
335 | }; | |
336 | ||
337 | static struct resource orion_ge01_resources[] = { | |
338 | { | |
339 | .name = "ge01 irq", | |
340 | .flags = IORESOURCE_IRQ, | |
341 | }, | |
342 | }; | |
343 | ||
344 | static struct platform_device orion_ge01 = { | |
345 | .name = MV643XX_ETH_NAME, | |
346 | .id = 1, | |
347 | .num_resources = 1, | |
348 | .resource = orion_ge01_resources, | |
349 | .dev = { | |
350 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
351 | }, | |
352 | }; | |
353 | ||
354 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
355 | unsigned long mapbase, |
356 | unsigned long irq, | |
58569aee APR |
357 | unsigned long irq_err, |
358 | unsigned int tx_csum_limit) | |
7e3819d8 AL |
359 | { |
360 | fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, | |
c3a07134 | 361 | mapbase + 0x2000, SZ_16K - 1, NO_IRQ); |
58569aee | 362 | orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; |
452503eb | 363 | ge_complete(&orion_ge01_shared_data, |
7e3819d8 | 364 | orion_ge01_resources, irq, &orion_ge01_shared, |
c3a07134 | 365 | NULL, |
7e3819d8 AL |
366 | eth_data, &orion_ge01); |
367 | } | |
368 | ||
369 | /***************************************************************************** | |
370 | * GE10 | |
371 | ****************************************************************************/ | |
48fce88c | 372 | static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; |
7e3819d8 AL |
373 | |
374 | static struct resource orion_ge10_shared_resources[] = { | |
375 | { | |
376 | .name = "ge10 base", | |
c3a07134 | 377 | } |
7e3819d8 AL |
378 | }; |
379 | ||
380 | static struct platform_device orion_ge10_shared = { | |
381 | .name = MV643XX_ETH_SHARED_NAME, | |
2b8b2797 | 382 | .id = 2, |
7e3819d8 AL |
383 | .dev = { |
384 | .platform_data = &orion_ge10_shared_data, | |
385 | }, | |
386 | }; | |
387 | ||
388 | static struct resource orion_ge10_resources[] = { | |
389 | { | |
390 | .name = "ge10 irq", | |
391 | .flags = IORESOURCE_IRQ, | |
392 | }, | |
393 | }; | |
394 | ||
395 | static struct platform_device orion_ge10 = { | |
396 | .name = MV643XX_ETH_NAME, | |
2b8b2797 GC |
397 | .id = 2, |
398 | .num_resources = 1, | |
7e3819d8 AL |
399 | .resource = orion_ge10_resources, |
400 | .dev = { | |
401 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
402 | }, | |
403 | }; | |
404 | ||
405 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
406 | unsigned long mapbase, |
407 | unsigned long irq, | |
452503eb | 408 | unsigned long irq_err) |
7e3819d8 AL |
409 | { |
410 | fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, | |
c3a07134 | 411 | mapbase + 0x2000, SZ_16K - 1, NO_IRQ); |
452503eb | 412 | ge_complete(&orion_ge10_shared_data, |
7e3819d8 | 413 | orion_ge10_resources, irq, &orion_ge10_shared, |
c3a07134 | 414 | NULL, |
7e3819d8 AL |
415 | eth_data, &orion_ge10); |
416 | } | |
417 | ||
418 | /***************************************************************************** | |
419 | * GE11 | |
420 | ****************************************************************************/ | |
48fce88c | 421 | static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; |
7e3819d8 AL |
422 | |
423 | static struct resource orion_ge11_shared_resources[] = { | |
424 | { | |
425 | .name = "ge11 base", | |
7e3819d8 AL |
426 | }, |
427 | }; | |
428 | ||
429 | static struct platform_device orion_ge11_shared = { | |
430 | .name = MV643XX_ETH_SHARED_NAME, | |
2b8b2797 | 431 | .id = 3, |
7e3819d8 AL |
432 | .dev = { |
433 | .platform_data = &orion_ge11_shared_data, | |
434 | }, | |
435 | }; | |
436 | ||
437 | static struct resource orion_ge11_resources[] = { | |
438 | { | |
439 | .name = "ge11 irq", | |
440 | .flags = IORESOURCE_IRQ, | |
441 | }, | |
442 | }; | |
443 | ||
444 | static struct platform_device orion_ge11 = { | |
445 | .name = MV643XX_ETH_NAME, | |
2b8b2797 GC |
446 | .id = 3, |
447 | .num_resources = 1, | |
7e3819d8 AL |
448 | .resource = orion_ge11_resources, |
449 | .dev = { | |
450 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
451 | }, | |
452 | }; | |
453 | ||
454 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
455 | unsigned long mapbase, |
456 | unsigned long irq, | |
452503eb | 457 | unsigned long irq_err) |
7e3819d8 AL |
458 | { |
459 | fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, | |
c3a07134 | 460 | mapbase + 0x2000, SZ_16K - 1, NO_IRQ); |
452503eb | 461 | ge_complete(&orion_ge11_shared_data, |
7e3819d8 | 462 | orion_ge11_resources, irq, &orion_ge11_shared, |
c3a07134 | 463 | NULL, |
7e3819d8 AL |
464 | eth_data, &orion_ge11); |
465 | } | |
466 | ||
467 | /***************************************************************************** | |
468 | * Ethernet switch | |
469 | ****************************************************************************/ | |
470 | static struct resource orion_switch_resources[] = { | |
471 | { | |
472 | .start = 0, | |
473 | .end = 0, | |
474 | .flags = IORESOURCE_IRQ, | |
475 | }, | |
476 | }; | |
477 | ||
478 | static struct platform_device orion_switch_device = { | |
479 | .name = "dsa", | |
480 | .id = 0, | |
481 | .num_resources = 0, | |
482 | .resource = orion_switch_resources, | |
483 | }; | |
484 | ||
485 | void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) | |
486 | { | |
487 | int i; | |
488 | ||
489 | if (irq != NO_IRQ) { | |
490 | orion_switch_resources[0].start = irq; | |
491 | orion_switch_resources[0].end = irq; | |
492 | orion_switch_device.num_resources = 1; | |
493 | } | |
494 | ||
495 | d->netdev = &orion_ge00.dev; | |
496 | for (i = 0; i < d->nr_chips; i++) | |
d836ace6 | 497 | d->chip[i].host_dev = &orion_ge_mvmdio.dev; |
7e3819d8 AL |
498 | orion_switch_device.dev.platform_data = d; |
499 | ||
500 | platform_device_register(&orion_switch_device); | |
501 | } | |
aac7ffa3 AL |
502 | |
503 | /***************************************************************************** | |
504 | * I2C | |
505 | ****************************************************************************/ | |
506 | static struct mv64xxx_i2c_pdata orion_i2c_pdata = { | |
507 | .freq_n = 3, | |
508 | .timeout = 1000, /* Default timeout of 1 second */ | |
509 | }; | |
510 | ||
511 | static struct resource orion_i2c_resources[2]; | |
512 | ||
513 | static struct platform_device orion_i2c = { | |
514 | .name = MV64XXX_I2C_CTLR_NAME, | |
515 | .id = 0, | |
516 | .dev = { | |
517 | .platform_data = &orion_i2c_pdata, | |
518 | }, | |
519 | }; | |
520 | ||
521 | static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { | |
522 | .freq_n = 3, | |
523 | .timeout = 1000, /* Default timeout of 1 second */ | |
524 | }; | |
525 | ||
526 | static struct resource orion_i2c_1_resources[2]; | |
527 | ||
528 | static struct platform_device orion_i2c_1 = { | |
529 | .name = MV64XXX_I2C_CTLR_NAME, | |
530 | .id = 1, | |
531 | .dev = { | |
532 | .platform_data = &orion_i2c_1_pdata, | |
533 | }, | |
534 | }; | |
535 | ||
536 | void __init orion_i2c_init(unsigned long mapbase, | |
537 | unsigned long irq, | |
538 | unsigned long freq_m) | |
539 | { | |
540 | orion_i2c_pdata.freq_m = freq_m; | |
541 | fill_resources(&orion_i2c, orion_i2c_resources, mapbase, | |
542 | SZ_32 - 1, irq); | |
543 | platform_device_register(&orion_i2c); | |
544 | } | |
545 | ||
546 | void __init orion_i2c_1_init(unsigned long mapbase, | |
547 | unsigned long irq, | |
548 | unsigned long freq_m) | |
549 | { | |
550 | orion_i2c_1_pdata.freq_m = freq_m; | |
551 | fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, | |
552 | SZ_32 - 1, irq); | |
553 | platform_device_register(&orion_i2c_1); | |
554 | } | |
980f9f60 AL |
555 | |
556 | /***************************************************************************** | |
557 | * SPI | |
558 | ****************************************************************************/ | |
980f9f60 AL |
559 | static struct resource orion_spi_resources; |
560 | ||
561 | static struct platform_device orion_spi = { | |
562 | .name = "orion_spi", | |
563 | .id = 0, | |
980f9f60 AL |
564 | }; |
565 | ||
980f9f60 AL |
566 | static struct resource orion_spi_1_resources; |
567 | ||
568 | static struct platform_device orion_spi_1 = { | |
569 | .name = "orion_spi", | |
570 | .id = 1, | |
980f9f60 AL |
571 | }; |
572 | ||
573 | /* Note: The SPI silicon core does have interrupts. However the | |
574 | * current Linux software driver does not use interrupts. */ | |
575 | ||
4574b886 | 576 | void __init orion_spi_init(unsigned long mapbase) |
980f9f60 | 577 | { |
980f9f60 AL |
578 | fill_resources(&orion_spi, &orion_spi_resources, |
579 | mapbase, SZ_512 - 1, NO_IRQ); | |
580 | platform_device_register(&orion_spi); | |
581 | } | |
582 | ||
4574b886 | 583 | void __init orion_spi_1_init(unsigned long mapbase) |
980f9f60 | 584 | { |
980f9f60 AL |
585 | fill_resources(&orion_spi_1, &orion_spi_1_resources, |
586 | mapbase, SZ_512 - 1, NO_IRQ); | |
587 | platform_device_register(&orion_spi_1); | |
588 | } | |
5e00d378 | 589 | |
ee962723 AL |
590 | /***************************************************************************** |
591 | * XOR | |
592 | ****************************************************************************/ | |
ee962723 AL |
593 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
594 | ||
ee962723 AL |
595 | /***************************************************************************** |
596 | * XOR0 | |
597 | ****************************************************************************/ | |
598 | static struct resource orion_xor0_shared_resources[] = { | |
599 | { | |
600 | .name = "xor 0 low", | |
601 | .flags = IORESOURCE_MEM, | |
602 | }, { | |
603 | .name = "xor 0 high", | |
604 | .flags = IORESOURCE_MEM, | |
af19e148 TP |
605 | }, { |
606 | .name = "irq channel 0", | |
607 | .flags = IORESOURCE_IRQ, | |
608 | }, { | |
609 | .name = "irq channel 1", | |
610 | .flags = IORESOURCE_IRQ, | |
ee962723 AL |
611 | }, |
612 | }; | |
613 | ||
b503fa01 | 614 | static struct mv_xor_channel_data orion_xor0_channels_data[2]; |
ee962723 | 615 | |
7dde453d | 616 | static struct mv_xor_platform_data orion_xor0_pdata = { |
e39f6ec1 | 617 | .channels = orion_xor0_channels_data, |
ee962723 AL |
618 | }; |
619 | ||
af19e148 | 620 | static struct platform_device orion_xor0_shared = { |
0dddee7a | 621 | .name = MV_XOR_NAME, |
af19e148 TP |
622 | .id = 0, |
623 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), | |
624 | .resource = orion_xor0_shared_resources, | |
625 | .dev = { | |
626 | .dma_mask = &orion_xor_dmamask, | |
627 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
628 | .platform_data = &orion_xor0_pdata, | |
ee962723 AL |
629 | }, |
630 | }; | |
631 | ||
db33f4de | 632 | void __init orion_xor0_init(unsigned long mapbase_low, |
ee962723 AL |
633 | unsigned long mapbase_high, |
634 | unsigned long irq_0, | |
635 | unsigned long irq_1) | |
636 | { | |
ee962723 AL |
637 | orion_xor0_shared_resources[0].start = mapbase_low; |
638 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; | |
639 | orion_xor0_shared_resources[1].start = mapbase_high; | |
640 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; | |
641 | ||
af19e148 TP |
642 | orion_xor0_shared_resources[2].start = irq_0; |
643 | orion_xor0_shared_resources[2].end = irq_0; | |
644 | orion_xor0_shared_resources[3].start = irq_1; | |
645 | orion_xor0_shared_resources[3].end = irq_1; | |
ee962723 | 646 | |
e39f6ec1 TP |
647 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); |
648 | dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); | |
ee962723 | 649 | |
e39f6ec1 TP |
650 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); |
651 | dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); | |
af19e148 TP |
652 | |
653 | platform_device_register(&orion_xor0_shared); | |
ee962723 AL |
654 | } |
655 | ||
656 | /***************************************************************************** | |
657 | * XOR1 | |
658 | ****************************************************************************/ | |
659 | static struct resource orion_xor1_shared_resources[] = { | |
660 | { | |
661 | .name = "xor 1 low", | |
662 | .flags = IORESOURCE_MEM, | |
663 | }, { | |
664 | .name = "xor 1 high", | |
665 | .flags = IORESOURCE_MEM, | |
dd2c57b8 TP |
666 | }, { |
667 | .name = "irq channel 0", | |
668 | .flags = IORESOURCE_IRQ, | |
669 | }, { | |
670 | .name = "irq channel 1", | |
671 | .flags = IORESOURCE_IRQ, | |
ee962723 AL |
672 | }, |
673 | }; | |
674 | ||
b503fa01 | 675 | static struct mv_xor_channel_data orion_xor1_channels_data[2]; |
ee962723 | 676 | |
7dde453d | 677 | static struct mv_xor_platform_data orion_xor1_pdata = { |
e39f6ec1 | 678 | .channels = orion_xor1_channels_data, |
ee962723 AL |
679 | }; |
680 | ||
dd2c57b8 | 681 | static struct platform_device orion_xor1_shared = { |
0dddee7a | 682 | .name = MV_XOR_NAME, |
dd2c57b8 TP |
683 | .id = 1, |
684 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), | |
685 | .resource = orion_xor1_shared_resources, | |
686 | .dev = { | |
687 | .dma_mask = &orion_xor_dmamask, | |
688 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
689 | .platform_data = &orion_xor1_pdata, | |
ee962723 AL |
690 | }, |
691 | }; | |
692 | ||
693 | void __init orion_xor1_init(unsigned long mapbase_low, | |
694 | unsigned long mapbase_high, | |
695 | unsigned long irq_0, | |
696 | unsigned long irq_1) | |
697 | { | |
698 | orion_xor1_shared_resources[0].start = mapbase_low; | |
699 | orion_xor1_shared_resources[0].end = mapbase_low + 0xff; | |
700 | orion_xor1_shared_resources[1].start = mapbase_high; | |
701 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; | |
702 | ||
dd2c57b8 TP |
703 | orion_xor1_shared_resources[2].start = irq_0; |
704 | orion_xor1_shared_resources[2].end = irq_0; | |
705 | orion_xor1_shared_resources[3].start = irq_1; | |
706 | orion_xor1_shared_resources[3].end = irq_1; | |
ee962723 | 707 | |
e39f6ec1 TP |
708 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); |
709 | dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); | |
ee962723 | 710 | |
e39f6ec1 TP |
711 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); |
712 | dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); | |
dd2c57b8 TP |
713 | |
714 | platform_device_register(&orion_xor1_shared); | |
ee962723 | 715 | } |
4fcd3f37 AL |
716 | |
717 | /***************************************************************************** | |
718 | * EHCI | |
719 | ****************************************************************************/ | |
72053353 | 720 | static struct orion_ehci_data orion_ehci_data; |
4fcd3f37 AL |
721 | static u64 ehci_dmamask = DMA_BIT_MASK(32); |
722 | ||
723 | ||
724 | /***************************************************************************** | |
725 | * EHCI0 | |
726 | ****************************************************************************/ | |
727 | static struct resource orion_ehci_resources[2]; | |
728 | ||
729 | static struct platform_device orion_ehci = { | |
730 | .name = "orion-ehci", | |
731 | .id = 0, | |
732 | .dev = { | |
733 | .dma_mask = &ehci_dmamask, | |
734 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
735 | .platform_data = &orion_ehci_data, | |
736 | }, | |
737 | }; | |
738 | ||
db33f4de | 739 | void __init orion_ehci_init(unsigned long mapbase, |
72053353 AL |
740 | unsigned long irq, |
741 | enum orion_ehci_phy_ver phy_version) | |
4fcd3f37 | 742 | { |
72053353 | 743 | orion_ehci_data.phy_version = phy_version; |
4fcd3f37 AL |
744 | fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, |
745 | irq); | |
746 | ||
747 | platform_device_register(&orion_ehci); | |
748 | } | |
749 | ||
750 | /***************************************************************************** | |
751 | * EHCI1 | |
752 | ****************************************************************************/ | |
753 | static struct resource orion_ehci_1_resources[2]; | |
754 | ||
755 | static struct platform_device orion_ehci_1 = { | |
756 | .name = "orion-ehci", | |
757 | .id = 1, | |
758 | .dev = { | |
759 | .dma_mask = &ehci_dmamask, | |
760 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
761 | .platform_data = &orion_ehci_data, | |
762 | }, | |
763 | }; | |
764 | ||
db33f4de | 765 | void __init orion_ehci_1_init(unsigned long mapbase, |
4fcd3f37 AL |
766 | unsigned long irq) |
767 | { | |
4fcd3f37 AL |
768 | fill_resources(&orion_ehci_1, orion_ehci_1_resources, |
769 | mapbase, SZ_4K - 1, irq); | |
770 | ||
771 | platform_device_register(&orion_ehci_1); | |
772 | } | |
773 | ||
774 | /***************************************************************************** | |
775 | * EHCI2 | |
776 | ****************************************************************************/ | |
777 | static struct resource orion_ehci_2_resources[2]; | |
778 | ||
779 | static struct platform_device orion_ehci_2 = { | |
780 | .name = "orion-ehci", | |
781 | .id = 2, | |
782 | .dev = { | |
783 | .dma_mask = &ehci_dmamask, | |
784 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
785 | .platform_data = &orion_ehci_data, | |
786 | }, | |
787 | }; | |
788 | ||
db33f4de | 789 | void __init orion_ehci_2_init(unsigned long mapbase, |
4fcd3f37 AL |
790 | unsigned long irq) |
791 | { | |
4fcd3f37 AL |
792 | fill_resources(&orion_ehci_2, orion_ehci_2_resources, |
793 | mapbase, SZ_4K - 1, irq); | |
794 | ||
795 | platform_device_register(&orion_ehci_2); | |
796 | } | |
9e613f8a AL |
797 | |
798 | /***************************************************************************** | |
799 | * SATA | |
800 | ****************************************************************************/ | |
801 | static struct resource orion_sata_resources[2] = { | |
802 | { | |
803 | .name = "sata base", | |
804 | }, { | |
805 | .name = "sata irq", | |
806 | }, | |
807 | }; | |
808 | ||
809 | static struct platform_device orion_sata = { | |
810 | .name = "sata_mv", | |
811 | .id = 0, | |
812 | .dev = { | |
813 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
814 | }, | |
815 | }; | |
816 | ||
817 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, | |
9e613f8a AL |
818 | unsigned long mapbase, |
819 | unsigned long irq) | |
820 | { | |
9e613f8a AL |
821 | orion_sata.dev.platform_data = sata_data; |
822 | fill_resources(&orion_sata, orion_sata_resources, | |
823 | mapbase, 0x5000 - 1, irq); | |
824 | ||
825 | platform_device_register(&orion_sata); | |
826 | } | |
827 | ||
44350061 AL |
828 | /***************************************************************************** |
829 | * Cryptographic Engines and Security Accelerator (CESA) | |
830 | ****************************************************************************/ | |
831 | static struct resource orion_crypto_resources[] = { | |
832 | { | |
833 | .name = "regs", | |
834 | }, { | |
835 | .name = "crypto interrupt", | |
836 | }, { | |
837 | .name = "sram", | |
838 | .flags = IORESOURCE_MEM, | |
839 | }, | |
840 | }; | |
9e613f8a | 841 | |
44350061 AL |
842 | static struct platform_device orion_crypto = { |
843 | .name = "mv_crypto", | |
844 | .id = -1, | |
845 | }; | |
846 | ||
847 | void __init orion_crypto_init(unsigned long mapbase, | |
848 | unsigned long srambase, | |
849 | unsigned long sram_size, | |
850 | unsigned long irq) | |
851 | { | |
852 | fill_resources(&orion_crypto, orion_crypto_resources, | |
853 | mapbase, 0xffff, irq); | |
854 | orion_crypto.num_resources = 3; | |
855 | orion_crypto_resources[2].start = srambase; | |
856 | orion_crypto_resources[2].end = srambase + sram_size - 1; | |
857 | ||
858 | platform_device_register(&orion_crypto); | |
859 | } |