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28a2b450 AL |
1 | /* |
2 | * arch/arm/plat-orion/common.c | |
3 | * | |
4 | * Marvell Orion SoC common setup code used by multiple mach-/common.c | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
7e3819d8 | 14 | #include <linux/dma-mapping.h> |
28a2b450 | 15 | #include <linux/serial_8250.h> |
9e613f8a | 16 | #include <linux/ata_platform.h> |
2f129bf4 AL |
17 | #include <linux/clk.h> |
18 | #include <linux/clkdev.h> | |
7e3819d8 | 19 | #include <linux/mv643xx_eth.h> |
aac7ffa3 | 20 | #include <linux/mv643xx_i2c.h> |
7e3819d8 | 21 | #include <net/dsa.h> |
ee962723 | 22 | #include <plat/mv_xor.h> |
4fcd3f37 | 23 | #include <plat/ehci-orion.h> |
a855a7ce | 24 | #include <mach/bridge-regs.h> |
28a2b450 | 25 | |
4574b886 AL |
26 | /* Create a clkdev entry for a given device/clk */ |
27 | void __init orion_clkdev_add(const char *con_id, const char *dev_id, | |
28 | struct clk *clk) | |
29 | { | |
30 | struct clk_lookup *cl; | |
31 | ||
32 | cl = clkdev_alloc(clk, con_id, dev_id); | |
33 | if (cl) | |
34 | clkdev_add(cl); | |
35 | } | |
36 | ||
37 | /* Create clkdev entries for all orion platforms except kirkwood. | |
38 | Kirkwood has gated clocks for some of its peripherals, so creates | |
39 | its own clkdev entries. For all the other orion devices, create | |
40 | clkdev entries to the tclk. */ | |
41 | void __init orion_clkdev_init(struct clk *tclk) | |
42 | { | |
43 | orion_clkdev_add(NULL, "orion_spi.0", tclk); | |
44 | orion_clkdev_add(NULL, "orion_spi.1", tclk); | |
452503eb AL |
45 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); |
46 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); | |
47 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); | |
48 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); | |
4f04be62 | 49 | orion_clkdev_add(NULL, "orion_wdt", tclk); |
e91cac0a | 50 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); |
4574b886 AL |
51 | } |
52 | ||
28a2b450 AL |
53 | /* Fill in the resources structure and link it into the platform |
54 | device structure. There is always a memory region, and nearly | |
55 | always an interrupt.*/ | |
56 | static void fill_resources(struct platform_device *device, | |
57 | struct resource *resources, | |
58 | resource_size_t mapbase, | |
59 | resource_size_t size, | |
60 | unsigned int irq) | |
61 | { | |
62 | device->resource = resources; | |
63 | device->num_resources = 1; | |
64 | resources[0].flags = IORESOURCE_MEM; | |
65 | resources[0].start = mapbase; | |
66 | resources[0].end = mapbase + size; | |
67 | ||
68 | if (irq != NO_IRQ) { | |
69 | device->num_resources++; | |
70 | resources[1].flags = IORESOURCE_IRQ; | |
71 | resources[1].start = irq; | |
72 | resources[1].end = irq; | |
73 | } | |
74 | } | |
75 | ||
76 | /***************************************************************************** | |
77 | * UART | |
78 | ****************************************************************************/ | |
74c33576 AL |
79 | static unsigned long __init uart_get_clk_rate(struct clk *clk) |
80 | { | |
81 | clk_prepare_enable(clk); | |
82 | return clk_get_rate(clk); | |
83 | } | |
84 | ||
28a2b450 AL |
85 | static void __init uart_complete( |
86 | struct platform_device *orion_uart, | |
87 | struct plat_serial8250_port *data, | |
88 | struct resource *resources, | |
89 | unsigned int membase, | |
90 | resource_size_t mapbase, | |
91 | unsigned int irq, | |
74c33576 | 92 | struct clk *clk) |
28a2b450 AL |
93 | { |
94 | data->mapbase = mapbase; | |
95 | data->membase = (void __iomem *)membase; | |
96 | data->irq = irq; | |
74c33576 | 97 | data->uartclk = uart_get_clk_rate(clk); |
28a2b450 AL |
98 | orion_uart->dev.platform_data = data; |
99 | ||
100 | fill_resources(orion_uart, resources, mapbase, 0xff, irq); | |
101 | platform_device_register(orion_uart); | |
102 | } | |
103 | ||
104 | /***************************************************************************** | |
105 | * UART0 | |
106 | ****************************************************************************/ | |
107 | static struct plat_serial8250_port orion_uart0_data[] = { | |
108 | { | |
109 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
110 | .iotype = UPIO_MEM, | |
111 | .regshift = 2, | |
112 | }, { | |
113 | }, | |
114 | }; | |
115 | ||
116 | static struct resource orion_uart0_resources[2]; | |
117 | ||
118 | static struct platform_device orion_uart0 = { | |
119 | .name = "serial8250", | |
120 | .id = PLAT8250_DEV_PLATFORM, | |
121 | }; | |
122 | ||
123 | void __init orion_uart0_init(unsigned int membase, | |
124 | resource_size_t mapbase, | |
125 | unsigned int irq, | |
74c33576 | 126 | struct clk *clk) |
28a2b450 AL |
127 | { |
128 | uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, | |
74c33576 | 129 | membase, mapbase, irq, clk); |
28a2b450 AL |
130 | } |
131 | ||
132 | /***************************************************************************** | |
133 | * UART1 | |
134 | ****************************************************************************/ | |
135 | static struct plat_serial8250_port orion_uart1_data[] = { | |
136 | { | |
137 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
138 | .iotype = UPIO_MEM, | |
139 | .regshift = 2, | |
140 | }, { | |
141 | }, | |
142 | }; | |
143 | ||
144 | static struct resource orion_uart1_resources[2]; | |
145 | ||
146 | static struct platform_device orion_uart1 = { | |
147 | .name = "serial8250", | |
148 | .id = PLAT8250_DEV_PLATFORM1, | |
149 | }; | |
150 | ||
151 | void __init orion_uart1_init(unsigned int membase, | |
152 | resource_size_t mapbase, | |
153 | unsigned int irq, | |
74c33576 | 154 | struct clk *clk) |
28a2b450 AL |
155 | { |
156 | uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, | |
74c33576 | 157 | membase, mapbase, irq, clk); |
28a2b450 AL |
158 | } |
159 | ||
160 | /***************************************************************************** | |
161 | * UART2 | |
162 | ****************************************************************************/ | |
163 | static struct plat_serial8250_port orion_uart2_data[] = { | |
164 | { | |
165 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
166 | .iotype = UPIO_MEM, | |
167 | .regshift = 2, | |
168 | }, { | |
169 | }, | |
170 | }; | |
171 | ||
172 | static struct resource orion_uart2_resources[2]; | |
173 | ||
174 | static struct platform_device orion_uart2 = { | |
175 | .name = "serial8250", | |
176 | .id = PLAT8250_DEV_PLATFORM2, | |
177 | }; | |
178 | ||
179 | void __init orion_uart2_init(unsigned int membase, | |
180 | resource_size_t mapbase, | |
181 | unsigned int irq, | |
74c33576 | 182 | struct clk *clk) |
28a2b450 AL |
183 | { |
184 | uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, | |
74c33576 | 185 | membase, mapbase, irq, clk); |
28a2b450 AL |
186 | } |
187 | ||
188 | /***************************************************************************** | |
189 | * UART3 | |
190 | ****************************************************************************/ | |
191 | static struct plat_serial8250_port orion_uart3_data[] = { | |
192 | { | |
193 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
194 | .iotype = UPIO_MEM, | |
195 | .regshift = 2, | |
196 | }, { | |
197 | }, | |
198 | }; | |
199 | ||
200 | static struct resource orion_uart3_resources[2]; | |
201 | ||
202 | static struct platform_device orion_uart3 = { | |
203 | .name = "serial8250", | |
204 | .id = 3, | |
205 | }; | |
206 | ||
207 | void __init orion_uart3_init(unsigned int membase, | |
208 | resource_size_t mapbase, | |
209 | unsigned int irq, | |
74c33576 | 210 | struct clk *clk) |
28a2b450 AL |
211 | { |
212 | uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, | |
74c33576 | 213 | membase, mapbase, irq, clk); |
28a2b450 | 214 | } |
f6eaccb3 AL |
215 | |
216 | /***************************************************************************** | |
217 | * SoC RTC | |
218 | ****************************************************************************/ | |
219 | static struct resource orion_rtc_resource[2]; | |
220 | ||
221 | void __init orion_rtc_init(unsigned long mapbase, | |
222 | unsigned long irq) | |
223 | { | |
224 | orion_rtc_resource[0].start = mapbase; | |
225 | orion_rtc_resource[0].end = mapbase + SZ_32 - 1; | |
226 | orion_rtc_resource[0].flags = IORESOURCE_MEM; | |
227 | orion_rtc_resource[1].start = irq; | |
228 | orion_rtc_resource[1].end = irq; | |
229 | orion_rtc_resource[1].flags = IORESOURCE_IRQ; | |
230 | ||
231 | platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); | |
232 | } | |
7e3819d8 AL |
233 | |
234 | /***************************************************************************** | |
235 | * GE | |
236 | ****************************************************************************/ | |
237 | static __init void ge_complete( | |
238 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, | |
7e3819d8 AL |
239 | struct resource *orion_ge_resource, unsigned long irq, |
240 | struct platform_device *orion_ge_shared, | |
241 | struct mv643xx_eth_platform_data *eth_data, | |
242 | struct platform_device *orion_ge) | |
243 | { | |
7e3819d8 AL |
244 | orion_ge_resource->start = irq; |
245 | orion_ge_resource->end = irq; | |
246 | eth_data->shared = orion_ge_shared; | |
247 | orion_ge->dev.platform_data = eth_data; | |
248 | ||
249 | platform_device_register(orion_ge_shared); | |
250 | platform_device_register(orion_ge); | |
251 | } | |
252 | ||
253 | /***************************************************************************** | |
254 | * GE00 | |
255 | ****************************************************************************/ | |
256 | struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; | |
257 | ||
258 | static struct resource orion_ge00_shared_resources[] = { | |
259 | { | |
260 | .name = "ge00 base", | |
261 | }, { | |
262 | .name = "ge00 err irq", | |
263 | }, | |
264 | }; | |
265 | ||
266 | static struct platform_device orion_ge00_shared = { | |
267 | .name = MV643XX_ETH_SHARED_NAME, | |
268 | .id = 0, | |
269 | .dev = { | |
270 | .platform_data = &orion_ge00_shared_data, | |
271 | }, | |
272 | }; | |
273 | ||
274 | static struct resource orion_ge00_resources[] = { | |
275 | { | |
276 | .name = "ge00 irq", | |
277 | .flags = IORESOURCE_IRQ, | |
278 | }, | |
279 | }; | |
280 | ||
281 | static struct platform_device orion_ge00 = { | |
282 | .name = MV643XX_ETH_NAME, | |
283 | .id = 0, | |
284 | .num_resources = 1, | |
285 | .resource = orion_ge00_resources, | |
286 | .dev = { | |
287 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
288 | }, | |
289 | }; | |
290 | ||
291 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
292 | unsigned long mapbase, |
293 | unsigned long irq, | |
452503eb | 294 | unsigned long irq_err) |
7e3819d8 AL |
295 | { |
296 | fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, | |
297 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 298 | ge_complete(&orion_ge00_shared_data, |
7e3819d8 AL |
299 | orion_ge00_resources, irq, &orion_ge00_shared, |
300 | eth_data, &orion_ge00); | |
301 | } | |
302 | ||
303 | /***************************************************************************** | |
304 | * GE01 | |
305 | ****************************************************************************/ | |
306 | struct mv643xx_eth_shared_platform_data orion_ge01_shared_data = { | |
307 | .shared_smi = &orion_ge00_shared, | |
308 | }; | |
309 | ||
310 | static struct resource orion_ge01_shared_resources[] = { | |
311 | { | |
312 | .name = "ge01 base", | |
313 | }, { | |
314 | .name = "ge01 err irq", | |
315 | }, | |
316 | }; | |
317 | ||
318 | static struct platform_device orion_ge01_shared = { | |
319 | .name = MV643XX_ETH_SHARED_NAME, | |
320 | .id = 1, | |
321 | .dev = { | |
322 | .platform_data = &orion_ge01_shared_data, | |
323 | }, | |
324 | }; | |
325 | ||
326 | static struct resource orion_ge01_resources[] = { | |
327 | { | |
328 | .name = "ge01 irq", | |
329 | .flags = IORESOURCE_IRQ, | |
330 | }, | |
331 | }; | |
332 | ||
333 | static struct platform_device orion_ge01 = { | |
334 | .name = MV643XX_ETH_NAME, | |
335 | .id = 1, | |
336 | .num_resources = 1, | |
337 | .resource = orion_ge01_resources, | |
338 | .dev = { | |
339 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
340 | }, | |
341 | }; | |
342 | ||
343 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
344 | unsigned long mapbase, |
345 | unsigned long irq, | |
452503eb | 346 | unsigned long irq_err) |
7e3819d8 AL |
347 | { |
348 | fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, | |
349 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 350 | ge_complete(&orion_ge01_shared_data, |
7e3819d8 AL |
351 | orion_ge01_resources, irq, &orion_ge01_shared, |
352 | eth_data, &orion_ge01); | |
353 | } | |
354 | ||
355 | /***************************************************************************** | |
356 | * GE10 | |
357 | ****************************************************************************/ | |
358 | struct mv643xx_eth_shared_platform_data orion_ge10_shared_data = { | |
359 | .shared_smi = &orion_ge00_shared, | |
360 | }; | |
361 | ||
362 | static struct resource orion_ge10_shared_resources[] = { | |
363 | { | |
364 | .name = "ge10 base", | |
365 | }, { | |
366 | .name = "ge10 err irq", | |
367 | }, | |
368 | }; | |
369 | ||
370 | static struct platform_device orion_ge10_shared = { | |
371 | .name = MV643XX_ETH_SHARED_NAME, | |
372 | .id = 1, | |
373 | .dev = { | |
374 | .platform_data = &orion_ge10_shared_data, | |
375 | }, | |
376 | }; | |
377 | ||
378 | static struct resource orion_ge10_resources[] = { | |
379 | { | |
380 | .name = "ge10 irq", | |
381 | .flags = IORESOURCE_IRQ, | |
382 | }, | |
383 | }; | |
384 | ||
385 | static struct platform_device orion_ge10 = { | |
386 | .name = MV643XX_ETH_NAME, | |
387 | .id = 1, | |
388 | .num_resources = 2, | |
389 | .resource = orion_ge10_resources, | |
390 | .dev = { | |
391 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
392 | }, | |
393 | }; | |
394 | ||
395 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
396 | unsigned long mapbase, |
397 | unsigned long irq, | |
452503eb | 398 | unsigned long irq_err) |
7e3819d8 AL |
399 | { |
400 | fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, | |
401 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 402 | ge_complete(&orion_ge10_shared_data, |
7e3819d8 AL |
403 | orion_ge10_resources, irq, &orion_ge10_shared, |
404 | eth_data, &orion_ge10); | |
405 | } | |
406 | ||
407 | /***************************************************************************** | |
408 | * GE11 | |
409 | ****************************************************************************/ | |
410 | struct mv643xx_eth_shared_platform_data orion_ge11_shared_data = { | |
411 | .shared_smi = &orion_ge00_shared, | |
412 | }; | |
413 | ||
414 | static struct resource orion_ge11_shared_resources[] = { | |
415 | { | |
416 | .name = "ge11 base", | |
417 | }, { | |
418 | .name = "ge11 err irq", | |
419 | }, | |
420 | }; | |
421 | ||
422 | static struct platform_device orion_ge11_shared = { | |
423 | .name = MV643XX_ETH_SHARED_NAME, | |
424 | .id = 1, | |
425 | .dev = { | |
426 | .platform_data = &orion_ge11_shared_data, | |
427 | }, | |
428 | }; | |
429 | ||
430 | static struct resource orion_ge11_resources[] = { | |
431 | { | |
432 | .name = "ge11 irq", | |
433 | .flags = IORESOURCE_IRQ, | |
434 | }, | |
435 | }; | |
436 | ||
437 | static struct platform_device orion_ge11 = { | |
438 | .name = MV643XX_ETH_NAME, | |
439 | .id = 1, | |
440 | .num_resources = 2, | |
441 | .resource = orion_ge11_resources, | |
442 | .dev = { | |
443 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
444 | }, | |
445 | }; | |
446 | ||
447 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
448 | unsigned long mapbase, |
449 | unsigned long irq, | |
452503eb | 450 | unsigned long irq_err) |
7e3819d8 AL |
451 | { |
452 | fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, | |
453 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 454 | ge_complete(&orion_ge11_shared_data, |
7e3819d8 AL |
455 | orion_ge11_resources, irq, &orion_ge11_shared, |
456 | eth_data, &orion_ge11); | |
457 | } | |
458 | ||
459 | /***************************************************************************** | |
460 | * Ethernet switch | |
461 | ****************************************************************************/ | |
462 | static struct resource orion_switch_resources[] = { | |
463 | { | |
464 | .start = 0, | |
465 | .end = 0, | |
466 | .flags = IORESOURCE_IRQ, | |
467 | }, | |
468 | }; | |
469 | ||
470 | static struct platform_device orion_switch_device = { | |
471 | .name = "dsa", | |
472 | .id = 0, | |
473 | .num_resources = 0, | |
474 | .resource = orion_switch_resources, | |
475 | }; | |
476 | ||
477 | void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) | |
478 | { | |
479 | int i; | |
480 | ||
481 | if (irq != NO_IRQ) { | |
482 | orion_switch_resources[0].start = irq; | |
483 | orion_switch_resources[0].end = irq; | |
484 | orion_switch_device.num_resources = 1; | |
485 | } | |
486 | ||
487 | d->netdev = &orion_ge00.dev; | |
488 | for (i = 0; i < d->nr_chips; i++) | |
489 | d->chip[i].mii_bus = &orion_ge00_shared.dev; | |
490 | orion_switch_device.dev.platform_data = d; | |
491 | ||
492 | platform_device_register(&orion_switch_device); | |
493 | } | |
aac7ffa3 AL |
494 | |
495 | /***************************************************************************** | |
496 | * I2C | |
497 | ****************************************************************************/ | |
498 | static struct mv64xxx_i2c_pdata orion_i2c_pdata = { | |
499 | .freq_n = 3, | |
500 | .timeout = 1000, /* Default timeout of 1 second */ | |
501 | }; | |
502 | ||
503 | static struct resource orion_i2c_resources[2]; | |
504 | ||
505 | static struct platform_device orion_i2c = { | |
506 | .name = MV64XXX_I2C_CTLR_NAME, | |
507 | .id = 0, | |
508 | .dev = { | |
509 | .platform_data = &orion_i2c_pdata, | |
510 | }, | |
511 | }; | |
512 | ||
513 | static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { | |
514 | .freq_n = 3, | |
515 | .timeout = 1000, /* Default timeout of 1 second */ | |
516 | }; | |
517 | ||
518 | static struct resource orion_i2c_1_resources[2]; | |
519 | ||
520 | static struct platform_device orion_i2c_1 = { | |
521 | .name = MV64XXX_I2C_CTLR_NAME, | |
522 | .id = 1, | |
523 | .dev = { | |
524 | .platform_data = &orion_i2c_1_pdata, | |
525 | }, | |
526 | }; | |
527 | ||
528 | void __init orion_i2c_init(unsigned long mapbase, | |
529 | unsigned long irq, | |
530 | unsigned long freq_m) | |
531 | { | |
532 | orion_i2c_pdata.freq_m = freq_m; | |
533 | fill_resources(&orion_i2c, orion_i2c_resources, mapbase, | |
534 | SZ_32 - 1, irq); | |
535 | platform_device_register(&orion_i2c); | |
536 | } | |
537 | ||
538 | void __init orion_i2c_1_init(unsigned long mapbase, | |
539 | unsigned long irq, | |
540 | unsigned long freq_m) | |
541 | { | |
542 | orion_i2c_1_pdata.freq_m = freq_m; | |
543 | fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, | |
544 | SZ_32 - 1, irq); | |
545 | platform_device_register(&orion_i2c_1); | |
546 | } | |
980f9f60 AL |
547 | |
548 | /***************************************************************************** | |
549 | * SPI | |
550 | ****************************************************************************/ | |
980f9f60 AL |
551 | static struct resource orion_spi_resources; |
552 | ||
553 | static struct platform_device orion_spi = { | |
554 | .name = "orion_spi", | |
555 | .id = 0, | |
980f9f60 AL |
556 | }; |
557 | ||
980f9f60 AL |
558 | static struct resource orion_spi_1_resources; |
559 | ||
560 | static struct platform_device orion_spi_1 = { | |
561 | .name = "orion_spi", | |
562 | .id = 1, | |
980f9f60 AL |
563 | }; |
564 | ||
565 | /* Note: The SPI silicon core does have interrupts. However the | |
566 | * current Linux software driver does not use interrupts. */ | |
567 | ||
4574b886 | 568 | void __init orion_spi_init(unsigned long mapbase) |
980f9f60 | 569 | { |
980f9f60 AL |
570 | fill_resources(&orion_spi, &orion_spi_resources, |
571 | mapbase, SZ_512 - 1, NO_IRQ); | |
572 | platform_device_register(&orion_spi); | |
573 | } | |
574 | ||
4574b886 | 575 | void __init orion_spi_1_init(unsigned long mapbase) |
980f9f60 | 576 | { |
980f9f60 AL |
577 | fill_resources(&orion_spi_1, &orion_spi_1_resources, |
578 | mapbase, SZ_512 - 1, NO_IRQ); | |
579 | platform_device_register(&orion_spi_1); | |
580 | } | |
5e00d378 AL |
581 | |
582 | /***************************************************************************** | |
583 | * Watchdog | |
584 | ****************************************************************************/ | |
a855a7ce | 585 | static struct resource orion_wdt_resource = |
0fa1f060 | 586 | DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28); |
a855a7ce | 587 | |
5e00d378 AL |
588 | static struct platform_device orion_wdt_device = { |
589 | .name = "orion_wdt", | |
590 | .id = -1, | |
a855a7ce | 591 | .num_resources = 1, |
4f04be62 | 592 | .resource = &orion_wdt_resource, |
5e00d378 AL |
593 | }; |
594 | ||
4f04be62 | 595 | void __init orion_wdt_init(void) |
5e00d378 | 596 | { |
5e00d378 AL |
597 | platform_device_register(&orion_wdt_device); |
598 | } | |
ee962723 AL |
599 | |
600 | /***************************************************************************** | |
601 | * XOR | |
602 | ****************************************************************************/ | |
ee962723 AL |
603 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
604 | ||
605 | void __init orion_xor_init_channels( | |
606 | struct mv_xor_platform_data *orion_xor0_data, | |
607 | struct platform_device *orion_xor0_channel, | |
608 | struct mv_xor_platform_data *orion_xor1_data, | |
609 | struct platform_device *orion_xor1_channel) | |
610 | { | |
611 | /* | |
612 | * two engines can't do memset simultaneously, this limitation | |
613 | * satisfied by removing memset support from one of the engines. | |
614 | */ | |
615 | dma_cap_set(DMA_MEMCPY, orion_xor0_data->cap_mask); | |
616 | dma_cap_set(DMA_XOR, orion_xor0_data->cap_mask); | |
617 | platform_device_register(orion_xor0_channel); | |
618 | ||
619 | dma_cap_set(DMA_MEMCPY, orion_xor1_data->cap_mask); | |
620 | dma_cap_set(DMA_MEMSET, orion_xor1_data->cap_mask); | |
621 | dma_cap_set(DMA_XOR, orion_xor1_data->cap_mask); | |
622 | platform_device_register(orion_xor1_channel); | |
623 | } | |
624 | ||
625 | /***************************************************************************** | |
626 | * XOR0 | |
627 | ****************************************************************************/ | |
628 | static struct resource orion_xor0_shared_resources[] = { | |
629 | { | |
630 | .name = "xor 0 low", | |
631 | .flags = IORESOURCE_MEM, | |
632 | }, { | |
633 | .name = "xor 0 high", | |
634 | .flags = IORESOURCE_MEM, | |
635 | }, | |
636 | }; | |
637 | ||
638 | static struct platform_device orion_xor0_shared = { | |
639 | .name = MV_XOR_SHARED_NAME, | |
640 | .id = 0, | |
ee962723 AL |
641 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), |
642 | .resource = orion_xor0_shared_resources, | |
643 | }; | |
644 | ||
645 | static struct resource orion_xor00_resources[] = { | |
646 | [0] = { | |
647 | .flags = IORESOURCE_IRQ, | |
648 | }, | |
649 | }; | |
650 | ||
651 | static struct mv_xor_platform_data orion_xor00_data = { | |
652 | .shared = &orion_xor0_shared, | |
653 | .hw_id = 0, | |
654 | .pool_size = PAGE_SIZE, | |
655 | }; | |
656 | ||
657 | static struct platform_device orion_xor00_channel = { | |
658 | .name = MV_XOR_NAME, | |
659 | .id = 0, | |
660 | .num_resources = ARRAY_SIZE(orion_xor00_resources), | |
661 | .resource = orion_xor00_resources, | |
662 | .dev = { | |
663 | .dma_mask = &orion_xor_dmamask, | |
664 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
665 | .platform_data = &orion_xor00_data, | |
666 | }, | |
667 | }; | |
668 | ||
669 | static struct resource orion_xor01_resources[] = { | |
670 | [0] = { | |
671 | .flags = IORESOURCE_IRQ, | |
672 | }, | |
673 | }; | |
674 | ||
675 | static struct mv_xor_platform_data orion_xor01_data = { | |
676 | .shared = &orion_xor0_shared, | |
677 | .hw_id = 1, | |
678 | .pool_size = PAGE_SIZE, | |
679 | }; | |
680 | ||
681 | static struct platform_device orion_xor01_channel = { | |
682 | .name = MV_XOR_NAME, | |
683 | .id = 1, | |
684 | .num_resources = ARRAY_SIZE(orion_xor01_resources), | |
685 | .resource = orion_xor01_resources, | |
686 | .dev = { | |
687 | .dma_mask = &orion_xor_dmamask, | |
688 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
689 | .platform_data = &orion_xor01_data, | |
690 | }, | |
691 | }; | |
692 | ||
db33f4de | 693 | void __init orion_xor0_init(unsigned long mapbase_low, |
ee962723 AL |
694 | unsigned long mapbase_high, |
695 | unsigned long irq_0, | |
696 | unsigned long irq_1) | |
697 | { | |
ee962723 AL |
698 | orion_xor0_shared_resources[0].start = mapbase_low; |
699 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; | |
700 | orion_xor0_shared_resources[1].start = mapbase_high; | |
701 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; | |
702 | ||
703 | orion_xor00_resources[0].start = irq_0; | |
704 | orion_xor00_resources[0].end = irq_0; | |
705 | orion_xor01_resources[0].start = irq_1; | |
706 | orion_xor01_resources[0].end = irq_1; | |
707 | ||
708 | platform_device_register(&orion_xor0_shared); | |
709 | ||
710 | orion_xor_init_channels(&orion_xor00_data, &orion_xor00_channel, | |
711 | &orion_xor01_data, &orion_xor01_channel); | |
712 | } | |
713 | ||
714 | /***************************************************************************** | |
715 | * XOR1 | |
716 | ****************************************************************************/ | |
717 | static struct resource orion_xor1_shared_resources[] = { | |
718 | { | |
719 | .name = "xor 1 low", | |
720 | .flags = IORESOURCE_MEM, | |
721 | }, { | |
722 | .name = "xor 1 high", | |
723 | .flags = IORESOURCE_MEM, | |
724 | }, | |
725 | }; | |
726 | ||
727 | static struct platform_device orion_xor1_shared = { | |
728 | .name = MV_XOR_SHARED_NAME, | |
729 | .id = 1, | |
ee962723 AL |
730 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), |
731 | .resource = orion_xor1_shared_resources, | |
732 | }; | |
733 | ||
734 | static struct resource orion_xor10_resources[] = { | |
735 | [0] = { | |
736 | .flags = IORESOURCE_IRQ, | |
737 | }, | |
738 | }; | |
739 | ||
740 | static struct mv_xor_platform_data orion_xor10_data = { | |
741 | .shared = &orion_xor1_shared, | |
742 | .hw_id = 0, | |
743 | .pool_size = PAGE_SIZE, | |
744 | }; | |
745 | ||
746 | static struct platform_device orion_xor10_channel = { | |
747 | .name = MV_XOR_NAME, | |
748 | .id = 2, | |
749 | .num_resources = ARRAY_SIZE(orion_xor10_resources), | |
750 | .resource = orion_xor10_resources, | |
751 | .dev = { | |
752 | .dma_mask = &orion_xor_dmamask, | |
753 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
754 | .platform_data = &orion_xor10_data, | |
755 | }, | |
756 | }; | |
757 | ||
758 | static struct resource orion_xor11_resources[] = { | |
759 | [0] = { | |
760 | .flags = IORESOURCE_IRQ, | |
761 | }, | |
762 | }; | |
763 | ||
764 | static struct mv_xor_platform_data orion_xor11_data = { | |
765 | .shared = &orion_xor1_shared, | |
766 | .hw_id = 1, | |
767 | .pool_size = PAGE_SIZE, | |
768 | }; | |
769 | ||
770 | static struct platform_device orion_xor11_channel = { | |
771 | .name = MV_XOR_NAME, | |
772 | .id = 3, | |
773 | .num_resources = ARRAY_SIZE(orion_xor11_resources), | |
774 | .resource = orion_xor11_resources, | |
775 | .dev = { | |
776 | .dma_mask = &orion_xor_dmamask, | |
777 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
778 | .platform_data = &orion_xor11_data, | |
779 | }, | |
780 | }; | |
781 | ||
782 | void __init orion_xor1_init(unsigned long mapbase_low, | |
783 | unsigned long mapbase_high, | |
784 | unsigned long irq_0, | |
785 | unsigned long irq_1) | |
786 | { | |
787 | orion_xor1_shared_resources[0].start = mapbase_low; | |
788 | orion_xor1_shared_resources[0].end = mapbase_low + 0xff; | |
789 | orion_xor1_shared_resources[1].start = mapbase_high; | |
790 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; | |
791 | ||
792 | orion_xor10_resources[0].start = irq_0; | |
793 | orion_xor10_resources[0].end = irq_0; | |
794 | orion_xor11_resources[0].start = irq_1; | |
795 | orion_xor11_resources[0].end = irq_1; | |
796 | ||
797 | platform_device_register(&orion_xor1_shared); | |
798 | ||
799 | orion_xor_init_channels(&orion_xor10_data, &orion_xor10_channel, | |
800 | &orion_xor11_data, &orion_xor11_channel); | |
801 | } | |
4fcd3f37 AL |
802 | |
803 | /***************************************************************************** | |
804 | * EHCI | |
805 | ****************************************************************************/ | |
72053353 | 806 | static struct orion_ehci_data orion_ehci_data; |
4fcd3f37 AL |
807 | static u64 ehci_dmamask = DMA_BIT_MASK(32); |
808 | ||
809 | ||
810 | /***************************************************************************** | |
811 | * EHCI0 | |
812 | ****************************************************************************/ | |
813 | static struct resource orion_ehci_resources[2]; | |
814 | ||
815 | static struct platform_device orion_ehci = { | |
816 | .name = "orion-ehci", | |
817 | .id = 0, | |
818 | .dev = { | |
819 | .dma_mask = &ehci_dmamask, | |
820 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
821 | .platform_data = &orion_ehci_data, | |
822 | }, | |
823 | }; | |
824 | ||
db33f4de | 825 | void __init orion_ehci_init(unsigned long mapbase, |
72053353 AL |
826 | unsigned long irq, |
827 | enum orion_ehci_phy_ver phy_version) | |
4fcd3f37 | 828 | { |
72053353 | 829 | orion_ehci_data.phy_version = phy_version; |
4fcd3f37 AL |
830 | fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, |
831 | irq); | |
832 | ||
833 | platform_device_register(&orion_ehci); | |
834 | } | |
835 | ||
836 | /***************************************************************************** | |
837 | * EHCI1 | |
838 | ****************************************************************************/ | |
839 | static struct resource orion_ehci_1_resources[2]; | |
840 | ||
841 | static struct platform_device orion_ehci_1 = { | |
842 | .name = "orion-ehci", | |
843 | .id = 1, | |
844 | .dev = { | |
845 | .dma_mask = &ehci_dmamask, | |
846 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
847 | .platform_data = &orion_ehci_data, | |
848 | }, | |
849 | }; | |
850 | ||
db33f4de | 851 | void __init orion_ehci_1_init(unsigned long mapbase, |
4fcd3f37 AL |
852 | unsigned long irq) |
853 | { | |
4fcd3f37 AL |
854 | fill_resources(&orion_ehci_1, orion_ehci_1_resources, |
855 | mapbase, SZ_4K - 1, irq); | |
856 | ||
857 | platform_device_register(&orion_ehci_1); | |
858 | } | |
859 | ||
860 | /***************************************************************************** | |
861 | * EHCI2 | |
862 | ****************************************************************************/ | |
863 | static struct resource orion_ehci_2_resources[2]; | |
864 | ||
865 | static struct platform_device orion_ehci_2 = { | |
866 | .name = "orion-ehci", | |
867 | .id = 2, | |
868 | .dev = { | |
869 | .dma_mask = &ehci_dmamask, | |
870 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
871 | .platform_data = &orion_ehci_data, | |
872 | }, | |
873 | }; | |
874 | ||
db33f4de | 875 | void __init orion_ehci_2_init(unsigned long mapbase, |
4fcd3f37 AL |
876 | unsigned long irq) |
877 | { | |
4fcd3f37 AL |
878 | fill_resources(&orion_ehci_2, orion_ehci_2_resources, |
879 | mapbase, SZ_4K - 1, irq); | |
880 | ||
881 | platform_device_register(&orion_ehci_2); | |
882 | } | |
9e613f8a AL |
883 | |
884 | /***************************************************************************** | |
885 | * SATA | |
886 | ****************************************************************************/ | |
887 | static struct resource orion_sata_resources[2] = { | |
888 | { | |
889 | .name = "sata base", | |
890 | }, { | |
891 | .name = "sata irq", | |
892 | }, | |
893 | }; | |
894 | ||
895 | static struct platform_device orion_sata = { | |
896 | .name = "sata_mv", | |
897 | .id = 0, | |
898 | .dev = { | |
899 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
900 | }, | |
901 | }; | |
902 | ||
903 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, | |
9e613f8a AL |
904 | unsigned long mapbase, |
905 | unsigned long irq) | |
906 | { | |
9e613f8a AL |
907 | orion_sata.dev.platform_data = sata_data; |
908 | fill_resources(&orion_sata, orion_sata_resources, | |
909 | mapbase, 0x5000 - 1, irq); | |
910 | ||
911 | platform_device_register(&orion_sata); | |
912 | } | |
913 | ||
44350061 AL |
914 | /***************************************************************************** |
915 | * Cryptographic Engines and Security Accelerator (CESA) | |
916 | ****************************************************************************/ | |
917 | static struct resource orion_crypto_resources[] = { | |
918 | { | |
919 | .name = "regs", | |
920 | }, { | |
921 | .name = "crypto interrupt", | |
922 | }, { | |
923 | .name = "sram", | |
924 | .flags = IORESOURCE_MEM, | |
925 | }, | |
926 | }; | |
9e613f8a | 927 | |
44350061 AL |
928 | static struct platform_device orion_crypto = { |
929 | .name = "mv_crypto", | |
930 | .id = -1, | |
931 | }; | |
932 | ||
933 | void __init orion_crypto_init(unsigned long mapbase, | |
934 | unsigned long srambase, | |
935 | unsigned long sram_size, | |
936 | unsigned long irq) | |
937 | { | |
938 | fill_resources(&orion_crypto, orion_crypto_resources, | |
939 | mapbase, 0xffff, irq); | |
940 | orion_crypto.num_resources = 3; | |
941 | orion_crypto_resources[2].start = srambase; | |
942 | orion_crypto_resources[2].end = srambase + sram_size - 1; | |
943 | ||
944 | platform_device_register(&orion_crypto); | |
945 | } |