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28a2b450 AL |
1 | /* |
2 | * arch/arm/plat-orion/common.c | |
3 | * | |
4 | * Marvell Orion SoC common setup code used by multiple mach-/common.c | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
7e3819d8 | 14 | #include <linux/dma-mapping.h> |
28a2b450 | 15 | #include <linux/serial_8250.h> |
9e613f8a | 16 | #include <linux/ata_platform.h> |
2f129bf4 AL |
17 | #include <linux/clk.h> |
18 | #include <linux/clkdev.h> | |
7e3819d8 | 19 | #include <linux/mv643xx_eth.h> |
aac7ffa3 | 20 | #include <linux/mv643xx_i2c.h> |
7e3819d8 | 21 | #include <net/dsa.h> |
ee962723 | 22 | #include <plat/mv_xor.h> |
4fcd3f37 | 23 | #include <plat/ehci-orion.h> |
a855a7ce | 24 | #include <mach/bridge-regs.h> |
28a2b450 | 25 | |
4574b886 AL |
26 | /* Create a clkdev entry for a given device/clk */ |
27 | void __init orion_clkdev_add(const char *con_id, const char *dev_id, | |
28 | struct clk *clk) | |
29 | { | |
30 | struct clk_lookup *cl; | |
31 | ||
32 | cl = clkdev_alloc(clk, con_id, dev_id); | |
33 | if (cl) | |
34 | clkdev_add(cl); | |
35 | } | |
36 | ||
37 | /* Create clkdev entries for all orion platforms except kirkwood. | |
38 | Kirkwood has gated clocks for some of its peripherals, so creates | |
39 | its own clkdev entries. For all the other orion devices, create | |
40 | clkdev entries to the tclk. */ | |
41 | void __init orion_clkdev_init(struct clk *tclk) | |
42 | { | |
43 | orion_clkdev_add(NULL, "orion_spi.0", tclk); | |
44 | orion_clkdev_add(NULL, "orion_spi.1", tclk); | |
452503eb AL |
45 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); |
46 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); | |
47 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); | |
48 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); | |
4f04be62 | 49 | orion_clkdev_add(NULL, "orion_wdt", tclk); |
4574b886 AL |
50 | } |
51 | ||
28a2b450 AL |
52 | /* Fill in the resources structure and link it into the platform |
53 | device structure. There is always a memory region, and nearly | |
54 | always an interrupt.*/ | |
55 | static void fill_resources(struct platform_device *device, | |
56 | struct resource *resources, | |
57 | resource_size_t mapbase, | |
58 | resource_size_t size, | |
59 | unsigned int irq) | |
60 | { | |
61 | device->resource = resources; | |
62 | device->num_resources = 1; | |
63 | resources[0].flags = IORESOURCE_MEM; | |
64 | resources[0].start = mapbase; | |
65 | resources[0].end = mapbase + size; | |
66 | ||
67 | if (irq != NO_IRQ) { | |
68 | device->num_resources++; | |
69 | resources[1].flags = IORESOURCE_IRQ; | |
70 | resources[1].start = irq; | |
71 | resources[1].end = irq; | |
72 | } | |
73 | } | |
74 | ||
75 | /***************************************************************************** | |
76 | * UART | |
77 | ****************************************************************************/ | |
74c33576 AL |
78 | static unsigned long __init uart_get_clk_rate(struct clk *clk) |
79 | { | |
80 | clk_prepare_enable(clk); | |
81 | return clk_get_rate(clk); | |
82 | } | |
83 | ||
28a2b450 AL |
84 | static void __init uart_complete( |
85 | struct platform_device *orion_uart, | |
86 | struct plat_serial8250_port *data, | |
87 | struct resource *resources, | |
88 | unsigned int membase, | |
89 | resource_size_t mapbase, | |
90 | unsigned int irq, | |
74c33576 | 91 | struct clk *clk) |
28a2b450 AL |
92 | { |
93 | data->mapbase = mapbase; | |
94 | data->membase = (void __iomem *)membase; | |
95 | data->irq = irq; | |
74c33576 | 96 | data->uartclk = uart_get_clk_rate(clk); |
28a2b450 AL |
97 | orion_uart->dev.platform_data = data; |
98 | ||
99 | fill_resources(orion_uart, resources, mapbase, 0xff, irq); | |
100 | platform_device_register(orion_uart); | |
101 | } | |
102 | ||
103 | /***************************************************************************** | |
104 | * UART0 | |
105 | ****************************************************************************/ | |
106 | static struct plat_serial8250_port orion_uart0_data[] = { | |
107 | { | |
108 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
109 | .iotype = UPIO_MEM, | |
110 | .regshift = 2, | |
111 | }, { | |
112 | }, | |
113 | }; | |
114 | ||
115 | static struct resource orion_uart0_resources[2]; | |
116 | ||
117 | static struct platform_device orion_uart0 = { | |
118 | .name = "serial8250", | |
119 | .id = PLAT8250_DEV_PLATFORM, | |
120 | }; | |
121 | ||
122 | void __init orion_uart0_init(unsigned int membase, | |
123 | resource_size_t mapbase, | |
124 | unsigned int irq, | |
74c33576 | 125 | struct clk *clk) |
28a2b450 AL |
126 | { |
127 | uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, | |
74c33576 | 128 | membase, mapbase, irq, clk); |
28a2b450 AL |
129 | } |
130 | ||
131 | /***************************************************************************** | |
132 | * UART1 | |
133 | ****************************************************************************/ | |
134 | static struct plat_serial8250_port orion_uart1_data[] = { | |
135 | { | |
136 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
137 | .iotype = UPIO_MEM, | |
138 | .regshift = 2, | |
139 | }, { | |
140 | }, | |
141 | }; | |
142 | ||
143 | static struct resource orion_uart1_resources[2]; | |
144 | ||
145 | static struct platform_device orion_uart1 = { | |
146 | .name = "serial8250", | |
147 | .id = PLAT8250_DEV_PLATFORM1, | |
148 | }; | |
149 | ||
150 | void __init orion_uart1_init(unsigned int membase, | |
151 | resource_size_t mapbase, | |
152 | unsigned int irq, | |
74c33576 | 153 | struct clk *clk) |
28a2b450 AL |
154 | { |
155 | uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, | |
74c33576 | 156 | membase, mapbase, irq, clk); |
28a2b450 AL |
157 | } |
158 | ||
159 | /***************************************************************************** | |
160 | * UART2 | |
161 | ****************************************************************************/ | |
162 | static struct plat_serial8250_port orion_uart2_data[] = { | |
163 | { | |
164 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
165 | .iotype = UPIO_MEM, | |
166 | .regshift = 2, | |
167 | }, { | |
168 | }, | |
169 | }; | |
170 | ||
171 | static struct resource orion_uart2_resources[2]; | |
172 | ||
173 | static struct platform_device orion_uart2 = { | |
174 | .name = "serial8250", | |
175 | .id = PLAT8250_DEV_PLATFORM2, | |
176 | }; | |
177 | ||
178 | void __init orion_uart2_init(unsigned int membase, | |
179 | resource_size_t mapbase, | |
180 | unsigned int irq, | |
74c33576 | 181 | struct clk *clk) |
28a2b450 AL |
182 | { |
183 | uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, | |
74c33576 | 184 | membase, mapbase, irq, clk); |
28a2b450 AL |
185 | } |
186 | ||
187 | /***************************************************************************** | |
188 | * UART3 | |
189 | ****************************************************************************/ | |
190 | static struct plat_serial8250_port orion_uart3_data[] = { | |
191 | { | |
192 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
193 | .iotype = UPIO_MEM, | |
194 | .regshift = 2, | |
195 | }, { | |
196 | }, | |
197 | }; | |
198 | ||
199 | static struct resource orion_uart3_resources[2]; | |
200 | ||
201 | static struct platform_device orion_uart3 = { | |
202 | .name = "serial8250", | |
203 | .id = 3, | |
204 | }; | |
205 | ||
206 | void __init orion_uart3_init(unsigned int membase, | |
207 | resource_size_t mapbase, | |
208 | unsigned int irq, | |
74c33576 | 209 | struct clk *clk) |
28a2b450 AL |
210 | { |
211 | uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, | |
74c33576 | 212 | membase, mapbase, irq, clk); |
28a2b450 | 213 | } |
f6eaccb3 AL |
214 | |
215 | /***************************************************************************** | |
216 | * SoC RTC | |
217 | ****************************************************************************/ | |
218 | static struct resource orion_rtc_resource[2]; | |
219 | ||
220 | void __init orion_rtc_init(unsigned long mapbase, | |
221 | unsigned long irq) | |
222 | { | |
223 | orion_rtc_resource[0].start = mapbase; | |
224 | orion_rtc_resource[0].end = mapbase + SZ_32 - 1; | |
225 | orion_rtc_resource[0].flags = IORESOURCE_MEM; | |
226 | orion_rtc_resource[1].start = irq; | |
227 | orion_rtc_resource[1].end = irq; | |
228 | orion_rtc_resource[1].flags = IORESOURCE_IRQ; | |
229 | ||
230 | platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); | |
231 | } | |
7e3819d8 AL |
232 | |
233 | /***************************************************************************** | |
234 | * GE | |
235 | ****************************************************************************/ | |
236 | static __init void ge_complete( | |
237 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, | |
7e3819d8 AL |
238 | struct resource *orion_ge_resource, unsigned long irq, |
239 | struct platform_device *orion_ge_shared, | |
240 | struct mv643xx_eth_platform_data *eth_data, | |
241 | struct platform_device *orion_ge) | |
242 | { | |
7e3819d8 AL |
243 | orion_ge_resource->start = irq; |
244 | orion_ge_resource->end = irq; | |
245 | eth_data->shared = orion_ge_shared; | |
246 | orion_ge->dev.platform_data = eth_data; | |
247 | ||
248 | platform_device_register(orion_ge_shared); | |
249 | platform_device_register(orion_ge); | |
250 | } | |
251 | ||
252 | /***************************************************************************** | |
253 | * GE00 | |
254 | ****************************************************************************/ | |
255 | struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; | |
256 | ||
257 | static struct resource orion_ge00_shared_resources[] = { | |
258 | { | |
259 | .name = "ge00 base", | |
260 | }, { | |
261 | .name = "ge00 err irq", | |
262 | }, | |
263 | }; | |
264 | ||
265 | static struct platform_device orion_ge00_shared = { | |
266 | .name = MV643XX_ETH_SHARED_NAME, | |
267 | .id = 0, | |
268 | .dev = { | |
269 | .platform_data = &orion_ge00_shared_data, | |
270 | }, | |
271 | }; | |
272 | ||
273 | static struct resource orion_ge00_resources[] = { | |
274 | { | |
275 | .name = "ge00 irq", | |
276 | .flags = IORESOURCE_IRQ, | |
277 | }, | |
278 | }; | |
279 | ||
280 | static struct platform_device orion_ge00 = { | |
281 | .name = MV643XX_ETH_NAME, | |
282 | .id = 0, | |
283 | .num_resources = 1, | |
284 | .resource = orion_ge00_resources, | |
285 | .dev = { | |
286 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
287 | }, | |
288 | }; | |
289 | ||
290 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
291 | unsigned long mapbase, |
292 | unsigned long irq, | |
452503eb | 293 | unsigned long irq_err) |
7e3819d8 AL |
294 | { |
295 | fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, | |
296 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 297 | ge_complete(&orion_ge00_shared_data, |
7e3819d8 AL |
298 | orion_ge00_resources, irq, &orion_ge00_shared, |
299 | eth_data, &orion_ge00); | |
300 | } | |
301 | ||
302 | /***************************************************************************** | |
303 | * GE01 | |
304 | ****************************************************************************/ | |
305 | struct mv643xx_eth_shared_platform_data orion_ge01_shared_data = { | |
306 | .shared_smi = &orion_ge00_shared, | |
307 | }; | |
308 | ||
309 | static struct resource orion_ge01_shared_resources[] = { | |
310 | { | |
311 | .name = "ge01 base", | |
312 | }, { | |
313 | .name = "ge01 err irq", | |
314 | }, | |
315 | }; | |
316 | ||
317 | static struct platform_device orion_ge01_shared = { | |
318 | .name = MV643XX_ETH_SHARED_NAME, | |
319 | .id = 1, | |
320 | .dev = { | |
321 | .platform_data = &orion_ge01_shared_data, | |
322 | }, | |
323 | }; | |
324 | ||
325 | static struct resource orion_ge01_resources[] = { | |
326 | { | |
327 | .name = "ge01 irq", | |
328 | .flags = IORESOURCE_IRQ, | |
329 | }, | |
330 | }; | |
331 | ||
332 | static struct platform_device orion_ge01 = { | |
333 | .name = MV643XX_ETH_NAME, | |
334 | .id = 1, | |
335 | .num_resources = 1, | |
336 | .resource = orion_ge01_resources, | |
337 | .dev = { | |
338 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
339 | }, | |
340 | }; | |
341 | ||
342 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
343 | unsigned long mapbase, |
344 | unsigned long irq, | |
452503eb | 345 | unsigned long irq_err) |
7e3819d8 AL |
346 | { |
347 | fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, | |
348 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 349 | ge_complete(&orion_ge01_shared_data, |
7e3819d8 AL |
350 | orion_ge01_resources, irq, &orion_ge01_shared, |
351 | eth_data, &orion_ge01); | |
352 | } | |
353 | ||
354 | /***************************************************************************** | |
355 | * GE10 | |
356 | ****************************************************************************/ | |
357 | struct mv643xx_eth_shared_platform_data orion_ge10_shared_data = { | |
358 | .shared_smi = &orion_ge00_shared, | |
359 | }; | |
360 | ||
361 | static struct resource orion_ge10_shared_resources[] = { | |
362 | { | |
363 | .name = "ge10 base", | |
364 | }, { | |
365 | .name = "ge10 err irq", | |
366 | }, | |
367 | }; | |
368 | ||
369 | static struct platform_device orion_ge10_shared = { | |
370 | .name = MV643XX_ETH_SHARED_NAME, | |
371 | .id = 1, | |
372 | .dev = { | |
373 | .platform_data = &orion_ge10_shared_data, | |
374 | }, | |
375 | }; | |
376 | ||
377 | static struct resource orion_ge10_resources[] = { | |
378 | { | |
379 | .name = "ge10 irq", | |
380 | .flags = IORESOURCE_IRQ, | |
381 | }, | |
382 | }; | |
383 | ||
384 | static struct platform_device orion_ge10 = { | |
385 | .name = MV643XX_ETH_NAME, | |
386 | .id = 1, | |
387 | .num_resources = 2, | |
388 | .resource = orion_ge10_resources, | |
389 | .dev = { | |
390 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
391 | }, | |
392 | }; | |
393 | ||
394 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
395 | unsigned long mapbase, |
396 | unsigned long irq, | |
452503eb | 397 | unsigned long irq_err) |
7e3819d8 AL |
398 | { |
399 | fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, | |
400 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 401 | ge_complete(&orion_ge10_shared_data, |
7e3819d8 AL |
402 | orion_ge10_resources, irq, &orion_ge10_shared, |
403 | eth_data, &orion_ge10); | |
404 | } | |
405 | ||
406 | /***************************************************************************** | |
407 | * GE11 | |
408 | ****************************************************************************/ | |
409 | struct mv643xx_eth_shared_platform_data orion_ge11_shared_data = { | |
410 | .shared_smi = &orion_ge00_shared, | |
411 | }; | |
412 | ||
413 | static struct resource orion_ge11_shared_resources[] = { | |
414 | { | |
415 | .name = "ge11 base", | |
416 | }, { | |
417 | .name = "ge11 err irq", | |
418 | }, | |
419 | }; | |
420 | ||
421 | static struct platform_device orion_ge11_shared = { | |
422 | .name = MV643XX_ETH_SHARED_NAME, | |
423 | .id = 1, | |
424 | .dev = { | |
425 | .platform_data = &orion_ge11_shared_data, | |
426 | }, | |
427 | }; | |
428 | ||
429 | static struct resource orion_ge11_resources[] = { | |
430 | { | |
431 | .name = "ge11 irq", | |
432 | .flags = IORESOURCE_IRQ, | |
433 | }, | |
434 | }; | |
435 | ||
436 | static struct platform_device orion_ge11 = { | |
437 | .name = MV643XX_ETH_NAME, | |
438 | .id = 1, | |
439 | .num_resources = 2, | |
440 | .resource = orion_ge11_resources, | |
441 | .dev = { | |
442 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
443 | }, | |
444 | }; | |
445 | ||
446 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
447 | unsigned long mapbase, |
448 | unsigned long irq, | |
452503eb | 449 | unsigned long irq_err) |
7e3819d8 AL |
450 | { |
451 | fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, | |
452 | mapbase + 0x2000, SZ_16K - 1, irq_err); | |
452503eb | 453 | ge_complete(&orion_ge11_shared_data, |
7e3819d8 AL |
454 | orion_ge11_resources, irq, &orion_ge11_shared, |
455 | eth_data, &orion_ge11); | |
456 | } | |
457 | ||
458 | /***************************************************************************** | |
459 | * Ethernet switch | |
460 | ****************************************************************************/ | |
461 | static struct resource orion_switch_resources[] = { | |
462 | { | |
463 | .start = 0, | |
464 | .end = 0, | |
465 | .flags = IORESOURCE_IRQ, | |
466 | }, | |
467 | }; | |
468 | ||
469 | static struct platform_device orion_switch_device = { | |
470 | .name = "dsa", | |
471 | .id = 0, | |
472 | .num_resources = 0, | |
473 | .resource = orion_switch_resources, | |
474 | }; | |
475 | ||
476 | void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) | |
477 | { | |
478 | int i; | |
479 | ||
480 | if (irq != NO_IRQ) { | |
481 | orion_switch_resources[0].start = irq; | |
482 | orion_switch_resources[0].end = irq; | |
483 | orion_switch_device.num_resources = 1; | |
484 | } | |
485 | ||
486 | d->netdev = &orion_ge00.dev; | |
487 | for (i = 0; i < d->nr_chips; i++) | |
488 | d->chip[i].mii_bus = &orion_ge00_shared.dev; | |
489 | orion_switch_device.dev.platform_data = d; | |
490 | ||
491 | platform_device_register(&orion_switch_device); | |
492 | } | |
aac7ffa3 AL |
493 | |
494 | /***************************************************************************** | |
495 | * I2C | |
496 | ****************************************************************************/ | |
497 | static struct mv64xxx_i2c_pdata orion_i2c_pdata = { | |
498 | .freq_n = 3, | |
499 | .timeout = 1000, /* Default timeout of 1 second */ | |
500 | }; | |
501 | ||
502 | static struct resource orion_i2c_resources[2]; | |
503 | ||
504 | static struct platform_device orion_i2c = { | |
505 | .name = MV64XXX_I2C_CTLR_NAME, | |
506 | .id = 0, | |
507 | .dev = { | |
508 | .platform_data = &orion_i2c_pdata, | |
509 | }, | |
510 | }; | |
511 | ||
512 | static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { | |
513 | .freq_n = 3, | |
514 | .timeout = 1000, /* Default timeout of 1 second */ | |
515 | }; | |
516 | ||
517 | static struct resource orion_i2c_1_resources[2]; | |
518 | ||
519 | static struct platform_device orion_i2c_1 = { | |
520 | .name = MV64XXX_I2C_CTLR_NAME, | |
521 | .id = 1, | |
522 | .dev = { | |
523 | .platform_data = &orion_i2c_1_pdata, | |
524 | }, | |
525 | }; | |
526 | ||
527 | void __init orion_i2c_init(unsigned long mapbase, | |
528 | unsigned long irq, | |
529 | unsigned long freq_m) | |
530 | { | |
531 | orion_i2c_pdata.freq_m = freq_m; | |
532 | fill_resources(&orion_i2c, orion_i2c_resources, mapbase, | |
533 | SZ_32 - 1, irq); | |
534 | platform_device_register(&orion_i2c); | |
535 | } | |
536 | ||
537 | void __init orion_i2c_1_init(unsigned long mapbase, | |
538 | unsigned long irq, | |
539 | unsigned long freq_m) | |
540 | { | |
541 | orion_i2c_1_pdata.freq_m = freq_m; | |
542 | fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase, | |
543 | SZ_32 - 1, irq); | |
544 | platform_device_register(&orion_i2c_1); | |
545 | } | |
980f9f60 AL |
546 | |
547 | /***************************************************************************** | |
548 | * SPI | |
549 | ****************************************************************************/ | |
980f9f60 AL |
550 | static struct resource orion_spi_resources; |
551 | ||
552 | static struct platform_device orion_spi = { | |
553 | .name = "orion_spi", | |
554 | .id = 0, | |
980f9f60 AL |
555 | }; |
556 | ||
980f9f60 AL |
557 | static struct resource orion_spi_1_resources; |
558 | ||
559 | static struct platform_device orion_spi_1 = { | |
560 | .name = "orion_spi", | |
561 | .id = 1, | |
980f9f60 AL |
562 | }; |
563 | ||
564 | /* Note: The SPI silicon core does have interrupts. However the | |
565 | * current Linux software driver does not use interrupts. */ | |
566 | ||
4574b886 | 567 | void __init orion_spi_init(unsigned long mapbase) |
980f9f60 | 568 | { |
980f9f60 AL |
569 | fill_resources(&orion_spi, &orion_spi_resources, |
570 | mapbase, SZ_512 - 1, NO_IRQ); | |
571 | platform_device_register(&orion_spi); | |
572 | } | |
573 | ||
4574b886 | 574 | void __init orion_spi_1_init(unsigned long mapbase) |
980f9f60 | 575 | { |
980f9f60 AL |
576 | fill_resources(&orion_spi_1, &orion_spi_1_resources, |
577 | mapbase, SZ_512 - 1, NO_IRQ); | |
578 | platform_device_register(&orion_spi_1); | |
579 | } | |
5e00d378 AL |
580 | |
581 | /***************************************************************************** | |
582 | * Watchdog | |
583 | ****************************************************************************/ | |
a855a7ce | 584 | static struct resource orion_wdt_resource = |
0fa1f060 | 585 | DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28); |
a855a7ce | 586 | |
5e00d378 AL |
587 | static struct platform_device orion_wdt_device = { |
588 | .name = "orion_wdt", | |
589 | .id = -1, | |
a855a7ce | 590 | .num_resources = 1, |
4f04be62 | 591 | .resource = &orion_wdt_resource, |
5e00d378 AL |
592 | }; |
593 | ||
4f04be62 | 594 | void __init orion_wdt_init(void) |
5e00d378 | 595 | { |
5e00d378 AL |
596 | platform_device_register(&orion_wdt_device); |
597 | } | |
ee962723 AL |
598 | |
599 | /***************************************************************************** | |
600 | * XOR | |
601 | ****************************************************************************/ | |
ee962723 AL |
602 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
603 | ||
604 | void __init orion_xor_init_channels( | |
605 | struct mv_xor_platform_data *orion_xor0_data, | |
606 | struct platform_device *orion_xor0_channel, | |
607 | struct mv_xor_platform_data *orion_xor1_data, | |
608 | struct platform_device *orion_xor1_channel) | |
609 | { | |
610 | /* | |
611 | * two engines can't do memset simultaneously, this limitation | |
612 | * satisfied by removing memset support from one of the engines. | |
613 | */ | |
614 | dma_cap_set(DMA_MEMCPY, orion_xor0_data->cap_mask); | |
615 | dma_cap_set(DMA_XOR, orion_xor0_data->cap_mask); | |
616 | platform_device_register(orion_xor0_channel); | |
617 | ||
618 | dma_cap_set(DMA_MEMCPY, orion_xor1_data->cap_mask); | |
619 | dma_cap_set(DMA_MEMSET, orion_xor1_data->cap_mask); | |
620 | dma_cap_set(DMA_XOR, orion_xor1_data->cap_mask); | |
621 | platform_device_register(orion_xor1_channel); | |
622 | } | |
623 | ||
624 | /***************************************************************************** | |
625 | * XOR0 | |
626 | ****************************************************************************/ | |
627 | static struct resource orion_xor0_shared_resources[] = { | |
628 | { | |
629 | .name = "xor 0 low", | |
630 | .flags = IORESOURCE_MEM, | |
631 | }, { | |
632 | .name = "xor 0 high", | |
633 | .flags = IORESOURCE_MEM, | |
634 | }, | |
635 | }; | |
636 | ||
637 | static struct platform_device orion_xor0_shared = { | |
638 | .name = MV_XOR_SHARED_NAME, | |
639 | .id = 0, | |
ee962723 AL |
640 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), |
641 | .resource = orion_xor0_shared_resources, | |
642 | }; | |
643 | ||
644 | static struct resource orion_xor00_resources[] = { | |
645 | [0] = { | |
646 | .flags = IORESOURCE_IRQ, | |
647 | }, | |
648 | }; | |
649 | ||
650 | static struct mv_xor_platform_data orion_xor00_data = { | |
651 | .shared = &orion_xor0_shared, | |
652 | .hw_id = 0, | |
653 | .pool_size = PAGE_SIZE, | |
654 | }; | |
655 | ||
656 | static struct platform_device orion_xor00_channel = { | |
657 | .name = MV_XOR_NAME, | |
658 | .id = 0, | |
659 | .num_resources = ARRAY_SIZE(orion_xor00_resources), | |
660 | .resource = orion_xor00_resources, | |
661 | .dev = { | |
662 | .dma_mask = &orion_xor_dmamask, | |
663 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
664 | .platform_data = &orion_xor00_data, | |
665 | }, | |
666 | }; | |
667 | ||
668 | static struct resource orion_xor01_resources[] = { | |
669 | [0] = { | |
670 | .flags = IORESOURCE_IRQ, | |
671 | }, | |
672 | }; | |
673 | ||
674 | static struct mv_xor_platform_data orion_xor01_data = { | |
675 | .shared = &orion_xor0_shared, | |
676 | .hw_id = 1, | |
677 | .pool_size = PAGE_SIZE, | |
678 | }; | |
679 | ||
680 | static struct platform_device orion_xor01_channel = { | |
681 | .name = MV_XOR_NAME, | |
682 | .id = 1, | |
683 | .num_resources = ARRAY_SIZE(orion_xor01_resources), | |
684 | .resource = orion_xor01_resources, | |
685 | .dev = { | |
686 | .dma_mask = &orion_xor_dmamask, | |
687 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
688 | .platform_data = &orion_xor01_data, | |
689 | }, | |
690 | }; | |
691 | ||
db33f4de | 692 | void __init orion_xor0_init(unsigned long mapbase_low, |
ee962723 AL |
693 | unsigned long mapbase_high, |
694 | unsigned long irq_0, | |
695 | unsigned long irq_1) | |
696 | { | |
ee962723 AL |
697 | orion_xor0_shared_resources[0].start = mapbase_low; |
698 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; | |
699 | orion_xor0_shared_resources[1].start = mapbase_high; | |
700 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; | |
701 | ||
702 | orion_xor00_resources[0].start = irq_0; | |
703 | orion_xor00_resources[0].end = irq_0; | |
704 | orion_xor01_resources[0].start = irq_1; | |
705 | orion_xor01_resources[0].end = irq_1; | |
706 | ||
707 | platform_device_register(&orion_xor0_shared); | |
708 | ||
709 | orion_xor_init_channels(&orion_xor00_data, &orion_xor00_channel, | |
710 | &orion_xor01_data, &orion_xor01_channel); | |
711 | } | |
712 | ||
713 | /***************************************************************************** | |
714 | * XOR1 | |
715 | ****************************************************************************/ | |
716 | static struct resource orion_xor1_shared_resources[] = { | |
717 | { | |
718 | .name = "xor 1 low", | |
719 | .flags = IORESOURCE_MEM, | |
720 | }, { | |
721 | .name = "xor 1 high", | |
722 | .flags = IORESOURCE_MEM, | |
723 | }, | |
724 | }; | |
725 | ||
726 | static struct platform_device orion_xor1_shared = { | |
727 | .name = MV_XOR_SHARED_NAME, | |
728 | .id = 1, | |
ee962723 AL |
729 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), |
730 | .resource = orion_xor1_shared_resources, | |
731 | }; | |
732 | ||
733 | static struct resource orion_xor10_resources[] = { | |
734 | [0] = { | |
735 | .flags = IORESOURCE_IRQ, | |
736 | }, | |
737 | }; | |
738 | ||
739 | static struct mv_xor_platform_data orion_xor10_data = { | |
740 | .shared = &orion_xor1_shared, | |
741 | .hw_id = 0, | |
742 | .pool_size = PAGE_SIZE, | |
743 | }; | |
744 | ||
745 | static struct platform_device orion_xor10_channel = { | |
746 | .name = MV_XOR_NAME, | |
747 | .id = 2, | |
748 | .num_resources = ARRAY_SIZE(orion_xor10_resources), | |
749 | .resource = orion_xor10_resources, | |
750 | .dev = { | |
751 | .dma_mask = &orion_xor_dmamask, | |
752 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
753 | .platform_data = &orion_xor10_data, | |
754 | }, | |
755 | }; | |
756 | ||
757 | static struct resource orion_xor11_resources[] = { | |
758 | [0] = { | |
759 | .flags = IORESOURCE_IRQ, | |
760 | }, | |
761 | }; | |
762 | ||
763 | static struct mv_xor_platform_data orion_xor11_data = { | |
764 | .shared = &orion_xor1_shared, | |
765 | .hw_id = 1, | |
766 | .pool_size = PAGE_SIZE, | |
767 | }; | |
768 | ||
769 | static struct platform_device orion_xor11_channel = { | |
770 | .name = MV_XOR_NAME, | |
771 | .id = 3, | |
772 | .num_resources = ARRAY_SIZE(orion_xor11_resources), | |
773 | .resource = orion_xor11_resources, | |
774 | .dev = { | |
775 | .dma_mask = &orion_xor_dmamask, | |
776 | .coherent_dma_mask = DMA_BIT_MASK(64), | |
777 | .platform_data = &orion_xor11_data, | |
778 | }, | |
779 | }; | |
780 | ||
781 | void __init orion_xor1_init(unsigned long mapbase_low, | |
782 | unsigned long mapbase_high, | |
783 | unsigned long irq_0, | |
784 | unsigned long irq_1) | |
785 | { | |
786 | orion_xor1_shared_resources[0].start = mapbase_low; | |
787 | orion_xor1_shared_resources[0].end = mapbase_low + 0xff; | |
788 | orion_xor1_shared_resources[1].start = mapbase_high; | |
789 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; | |
790 | ||
791 | orion_xor10_resources[0].start = irq_0; | |
792 | orion_xor10_resources[0].end = irq_0; | |
793 | orion_xor11_resources[0].start = irq_1; | |
794 | orion_xor11_resources[0].end = irq_1; | |
795 | ||
796 | platform_device_register(&orion_xor1_shared); | |
797 | ||
798 | orion_xor_init_channels(&orion_xor10_data, &orion_xor10_channel, | |
799 | &orion_xor11_data, &orion_xor11_channel); | |
800 | } | |
4fcd3f37 AL |
801 | |
802 | /***************************************************************************** | |
803 | * EHCI | |
804 | ****************************************************************************/ | |
72053353 | 805 | static struct orion_ehci_data orion_ehci_data; |
4fcd3f37 AL |
806 | static u64 ehci_dmamask = DMA_BIT_MASK(32); |
807 | ||
808 | ||
809 | /***************************************************************************** | |
810 | * EHCI0 | |
811 | ****************************************************************************/ | |
812 | static struct resource orion_ehci_resources[2]; | |
813 | ||
814 | static struct platform_device orion_ehci = { | |
815 | .name = "orion-ehci", | |
816 | .id = 0, | |
817 | .dev = { | |
818 | .dma_mask = &ehci_dmamask, | |
819 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
820 | .platform_data = &orion_ehci_data, | |
821 | }, | |
822 | }; | |
823 | ||
db33f4de | 824 | void __init orion_ehci_init(unsigned long mapbase, |
72053353 AL |
825 | unsigned long irq, |
826 | enum orion_ehci_phy_ver phy_version) | |
4fcd3f37 | 827 | { |
72053353 | 828 | orion_ehci_data.phy_version = phy_version; |
4fcd3f37 AL |
829 | fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, |
830 | irq); | |
831 | ||
832 | platform_device_register(&orion_ehci); | |
833 | } | |
834 | ||
835 | /***************************************************************************** | |
836 | * EHCI1 | |
837 | ****************************************************************************/ | |
838 | static struct resource orion_ehci_1_resources[2]; | |
839 | ||
840 | static struct platform_device orion_ehci_1 = { | |
841 | .name = "orion-ehci", | |
842 | .id = 1, | |
843 | .dev = { | |
844 | .dma_mask = &ehci_dmamask, | |
845 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
846 | .platform_data = &orion_ehci_data, | |
847 | }, | |
848 | }; | |
849 | ||
db33f4de | 850 | void __init orion_ehci_1_init(unsigned long mapbase, |
4fcd3f37 AL |
851 | unsigned long irq) |
852 | { | |
4fcd3f37 AL |
853 | fill_resources(&orion_ehci_1, orion_ehci_1_resources, |
854 | mapbase, SZ_4K - 1, irq); | |
855 | ||
856 | platform_device_register(&orion_ehci_1); | |
857 | } | |
858 | ||
859 | /***************************************************************************** | |
860 | * EHCI2 | |
861 | ****************************************************************************/ | |
862 | static struct resource orion_ehci_2_resources[2]; | |
863 | ||
864 | static struct platform_device orion_ehci_2 = { | |
865 | .name = "orion-ehci", | |
866 | .id = 2, | |
867 | .dev = { | |
868 | .dma_mask = &ehci_dmamask, | |
869 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
870 | .platform_data = &orion_ehci_data, | |
871 | }, | |
872 | }; | |
873 | ||
db33f4de | 874 | void __init orion_ehci_2_init(unsigned long mapbase, |
4fcd3f37 AL |
875 | unsigned long irq) |
876 | { | |
4fcd3f37 AL |
877 | fill_resources(&orion_ehci_2, orion_ehci_2_resources, |
878 | mapbase, SZ_4K - 1, irq); | |
879 | ||
880 | platform_device_register(&orion_ehci_2); | |
881 | } | |
9e613f8a AL |
882 | |
883 | /***************************************************************************** | |
884 | * SATA | |
885 | ****************************************************************************/ | |
886 | static struct resource orion_sata_resources[2] = { | |
887 | { | |
888 | .name = "sata base", | |
889 | }, { | |
890 | .name = "sata irq", | |
891 | }, | |
892 | }; | |
893 | ||
894 | static struct platform_device orion_sata = { | |
895 | .name = "sata_mv", | |
896 | .id = 0, | |
897 | .dev = { | |
898 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
899 | }, | |
900 | }; | |
901 | ||
902 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, | |
9e613f8a AL |
903 | unsigned long mapbase, |
904 | unsigned long irq) | |
905 | { | |
9e613f8a AL |
906 | orion_sata.dev.platform_data = sata_data; |
907 | fill_resources(&orion_sata, orion_sata_resources, | |
908 | mapbase, 0x5000 - 1, irq); | |
909 | ||
910 | platform_device_register(&orion_sata); | |
911 | } | |
912 | ||
44350061 AL |
913 | /***************************************************************************** |
914 | * Cryptographic Engines and Security Accelerator (CESA) | |
915 | ****************************************************************************/ | |
916 | static struct resource orion_crypto_resources[] = { | |
917 | { | |
918 | .name = "regs", | |
919 | }, { | |
920 | .name = "crypto interrupt", | |
921 | }, { | |
922 | .name = "sram", | |
923 | .flags = IORESOURCE_MEM, | |
924 | }, | |
925 | }; | |
9e613f8a | 926 | |
44350061 AL |
927 | static struct platform_device orion_crypto = { |
928 | .name = "mv_crypto", | |
929 | .id = -1, | |
930 | }; | |
931 | ||
932 | void __init orion_crypto_init(unsigned long mapbase, | |
933 | unsigned long srambase, | |
934 | unsigned long sram_size, | |
935 | unsigned long irq) | |
936 | { | |
937 | fill_resources(&orion_crypto, orion_crypto_resources, | |
938 | mapbase, 0xffff, irq); | |
939 | orion_crypto.num_resources = 3; | |
940 | orion_crypto_resources[2].start = srambase; | |
941 | orion_crypto_resources[2].end = srambase + sram_size - 1; | |
942 | ||
943 | platform_device_register(&orion_crypto); | |
944 | } |