Merge branch 'kirkwood/cleanup' of git://git.infradead.org/users/jcooper/linux into...
[deliverable/linux.git] / arch / arm / plat-orion / common.c
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1/*
2 * arch/arm/plat-orion/common.c
3 *
4 * Marvell Orion SoC common setup code used by multiple mach-/common.c
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
7e3819d8 14#include <linux/dma-mapping.h>
28a2b450 15#include <linux/serial_8250.h>
9e613f8a 16#include <linux/ata_platform.h>
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17#include <linux/clk.h>
18#include <linux/clkdev.h>
7e3819d8 19#include <linux/mv643xx_eth.h>
aac7ffa3 20#include <linux/mv643xx_i2c.h>
7e3819d8 21#include <net/dsa.h>
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22#include <linux/platform_data/dma-mv_xor.h>
23#include <linux/platform_data/usb-ehci-orion.h>
a855a7ce 24#include <mach/bridge-regs.h>
28a2b450 25
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26/* Create a clkdev entry for a given device/clk */
27void __init orion_clkdev_add(const char *con_id, const char *dev_id,
28 struct clk *clk)
29{
30 struct clk_lookup *cl;
31
32 cl = clkdev_alloc(clk, con_id, dev_id);
33 if (cl)
34 clkdev_add(cl);
35}
36
37/* Create clkdev entries for all orion platforms except kirkwood.
38 Kirkwood has gated clocks for some of its peripherals, so creates
39 its own clkdev entries. For all the other orion devices, create
40 clkdev entries to the tclk. */
41void __init orion_clkdev_init(struct clk *tclk)
42{
43 orion_clkdev_add(NULL, "orion_spi.0", tclk);
44 orion_clkdev_add(NULL, "orion_spi.1", tclk);
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45 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk);
46 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk);
47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk);
48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk);
4f04be62 49 orion_clkdev_add(NULL, "orion_wdt", tclk);
e91cac0a 50 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk);
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51}
52
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53/* Fill in the resources structure and link it into the platform
54 device structure. There is always a memory region, and nearly
55 always an interrupt.*/
56static void fill_resources(struct platform_device *device,
57 struct resource *resources,
58 resource_size_t mapbase,
59 resource_size_t size,
60 unsigned int irq)
61{
62 device->resource = resources;
63 device->num_resources = 1;
64 resources[0].flags = IORESOURCE_MEM;
65 resources[0].start = mapbase;
66 resources[0].end = mapbase + size;
67
68 if (irq != NO_IRQ) {
69 device->num_resources++;
70 resources[1].flags = IORESOURCE_IRQ;
71 resources[1].start = irq;
72 resources[1].end = irq;
73 }
74}
75
76/*****************************************************************************
77 * UART
78 ****************************************************************************/
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79static unsigned long __init uart_get_clk_rate(struct clk *clk)
80{
81 clk_prepare_enable(clk);
82 return clk_get_rate(clk);
83}
84
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85static void __init uart_complete(
86 struct platform_device *orion_uart,
87 struct plat_serial8250_port *data,
88 struct resource *resources,
89 unsigned int membase,
90 resource_size_t mapbase,
91 unsigned int irq,
74c33576 92 struct clk *clk)
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93{
94 data->mapbase = mapbase;
95 data->membase = (void __iomem *)membase;
96 data->irq = irq;
74c33576 97 data->uartclk = uart_get_clk_rate(clk);
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98 orion_uart->dev.platform_data = data;
99
100 fill_resources(orion_uart, resources, mapbase, 0xff, irq);
101 platform_device_register(orion_uart);
102}
103
104/*****************************************************************************
105 * UART0
106 ****************************************************************************/
107static struct plat_serial8250_port orion_uart0_data[] = {
108 {
109 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
110 .iotype = UPIO_MEM,
111 .regshift = 2,
112 }, {
113 },
114};
115
116static struct resource orion_uart0_resources[2];
117
118static struct platform_device orion_uart0 = {
119 .name = "serial8250",
120 .id = PLAT8250_DEV_PLATFORM,
121};
122
123void __init orion_uart0_init(unsigned int membase,
124 resource_size_t mapbase,
125 unsigned int irq,
74c33576 126 struct clk *clk)
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127{
128 uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources,
74c33576 129 membase, mapbase, irq, clk);
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130}
131
132/*****************************************************************************
133 * UART1
134 ****************************************************************************/
135static struct plat_serial8250_port orion_uart1_data[] = {
136 {
137 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
138 .iotype = UPIO_MEM,
139 .regshift = 2,
140 }, {
141 },
142};
143
144static struct resource orion_uart1_resources[2];
145
146static struct platform_device orion_uart1 = {
147 .name = "serial8250",
148 .id = PLAT8250_DEV_PLATFORM1,
149};
150
151void __init orion_uart1_init(unsigned int membase,
152 resource_size_t mapbase,
153 unsigned int irq,
74c33576 154 struct clk *clk)
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155{
156 uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources,
74c33576 157 membase, mapbase, irq, clk);
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158}
159
160/*****************************************************************************
161 * UART2
162 ****************************************************************************/
163static struct plat_serial8250_port orion_uart2_data[] = {
164 {
165 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
166 .iotype = UPIO_MEM,
167 .regshift = 2,
168 }, {
169 },
170};
171
172static struct resource orion_uart2_resources[2];
173
174static struct platform_device orion_uart2 = {
175 .name = "serial8250",
176 .id = PLAT8250_DEV_PLATFORM2,
177};
178
179void __init orion_uart2_init(unsigned int membase,
180 resource_size_t mapbase,
181 unsigned int irq,
74c33576 182 struct clk *clk)
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183{
184 uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources,
74c33576 185 membase, mapbase, irq, clk);
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186}
187
188/*****************************************************************************
189 * UART3
190 ****************************************************************************/
191static struct plat_serial8250_port orion_uart3_data[] = {
192 {
193 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
194 .iotype = UPIO_MEM,
195 .regshift = 2,
196 }, {
197 },
198};
199
200static struct resource orion_uart3_resources[2];
201
202static struct platform_device orion_uart3 = {
203 .name = "serial8250",
204 .id = 3,
205};
206
207void __init orion_uart3_init(unsigned int membase,
208 resource_size_t mapbase,
209 unsigned int irq,
74c33576 210 struct clk *clk)
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211{
212 uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources,
74c33576 213 membase, mapbase, irq, clk);
28a2b450 214}
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215
216/*****************************************************************************
217 * SoC RTC
218 ****************************************************************************/
219static struct resource orion_rtc_resource[2];
220
221void __init orion_rtc_init(unsigned long mapbase,
222 unsigned long irq)
223{
224 orion_rtc_resource[0].start = mapbase;
225 orion_rtc_resource[0].end = mapbase + SZ_32 - 1;
226 orion_rtc_resource[0].flags = IORESOURCE_MEM;
227 orion_rtc_resource[1].start = irq;
228 orion_rtc_resource[1].end = irq;
229 orion_rtc_resource[1].flags = IORESOURCE_IRQ;
230
231 platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2);
232}
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233
234/*****************************************************************************
235 * GE
236 ****************************************************************************/
237static __init void ge_complete(
238 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
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239 struct resource *orion_ge_resource, unsigned long irq,
240 struct platform_device *orion_ge_shared,
241 struct mv643xx_eth_platform_data *eth_data,
242 struct platform_device *orion_ge)
243{
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244 orion_ge_resource->start = irq;
245 orion_ge_resource->end = irq;
246 eth_data->shared = orion_ge_shared;
247 orion_ge->dev.platform_data = eth_data;
248
249 platform_device_register(orion_ge_shared);
250 platform_device_register(orion_ge);
251}
252
253/*****************************************************************************
254 * GE00
255 ****************************************************************************/
256struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
257
258static struct resource orion_ge00_shared_resources[] = {
259 {
260 .name = "ge00 base",
261 }, {
262 .name = "ge00 err irq",
263 },
264};
265
266static struct platform_device orion_ge00_shared = {
267 .name = MV643XX_ETH_SHARED_NAME,
268 .id = 0,
269 .dev = {
270 .platform_data = &orion_ge00_shared_data,
271 },
272};
273
274static struct resource orion_ge00_resources[] = {
275 {
276 .name = "ge00 irq",
277 .flags = IORESOURCE_IRQ,
278 },
279};
280
281static struct platform_device orion_ge00 = {
282 .name = MV643XX_ETH_NAME,
283 .id = 0,
284 .num_resources = 1,
285 .resource = orion_ge00_resources,
286 .dev = {
287 .coherent_dma_mask = DMA_BIT_MASK(32),
288 },
289};
290
291void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
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292 unsigned long mapbase,
293 unsigned long irq,
58569aee
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294 unsigned long irq_err,
295 unsigned int tx_csum_limit)
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296{
297 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
298 mapbase + 0x2000, SZ_16K - 1, irq_err);
58569aee 299 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
452503eb 300 ge_complete(&orion_ge00_shared_data,
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301 orion_ge00_resources, irq, &orion_ge00_shared,
302 eth_data, &orion_ge00);
303}
304
305/*****************************************************************************
306 * GE01
307 ****************************************************************************/
308struct mv643xx_eth_shared_platform_data orion_ge01_shared_data = {
309 .shared_smi = &orion_ge00_shared,
310};
311
312static struct resource orion_ge01_shared_resources[] = {
313 {
314 .name = "ge01 base",
315 }, {
316 .name = "ge01 err irq",
317 },
318};
319
320static struct platform_device orion_ge01_shared = {
321 .name = MV643XX_ETH_SHARED_NAME,
322 .id = 1,
323 .dev = {
324 .platform_data = &orion_ge01_shared_data,
325 },
326};
327
328static struct resource orion_ge01_resources[] = {
329 {
330 .name = "ge01 irq",
331 .flags = IORESOURCE_IRQ,
332 },
333};
334
335static struct platform_device orion_ge01 = {
336 .name = MV643XX_ETH_NAME,
337 .id = 1,
338 .num_resources = 1,
339 .resource = orion_ge01_resources,
340 .dev = {
341 .coherent_dma_mask = DMA_BIT_MASK(32),
342 },
343};
344
345void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
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346 unsigned long mapbase,
347 unsigned long irq,
58569aee
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348 unsigned long irq_err,
349 unsigned int tx_csum_limit)
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350{
351 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
352 mapbase + 0x2000, SZ_16K - 1, irq_err);
58569aee 353 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
452503eb 354 ge_complete(&orion_ge01_shared_data,
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355 orion_ge01_resources, irq, &orion_ge01_shared,
356 eth_data, &orion_ge01);
357}
358
359/*****************************************************************************
360 * GE10
361 ****************************************************************************/
362struct mv643xx_eth_shared_platform_data orion_ge10_shared_data = {
363 .shared_smi = &orion_ge00_shared,
364};
365
366static struct resource orion_ge10_shared_resources[] = {
367 {
368 .name = "ge10 base",
369 }, {
370 .name = "ge10 err irq",
371 },
372};
373
374static struct platform_device orion_ge10_shared = {
375 .name = MV643XX_ETH_SHARED_NAME,
376 .id = 1,
377 .dev = {
378 .platform_data = &orion_ge10_shared_data,
379 },
380};
381
382static struct resource orion_ge10_resources[] = {
383 {
384 .name = "ge10 irq",
385 .flags = IORESOURCE_IRQ,
386 },
387};
388
389static struct platform_device orion_ge10 = {
390 .name = MV643XX_ETH_NAME,
391 .id = 1,
392 .num_resources = 2,
393 .resource = orion_ge10_resources,
394 .dev = {
395 .coherent_dma_mask = DMA_BIT_MASK(32),
396 },
397};
398
399void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
7e3819d8
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400 unsigned long mapbase,
401 unsigned long irq,
452503eb 402 unsigned long irq_err)
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403{
404 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
405 mapbase + 0x2000, SZ_16K - 1, irq_err);
452503eb 406 ge_complete(&orion_ge10_shared_data,
7e3819d8
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407 orion_ge10_resources, irq, &orion_ge10_shared,
408 eth_data, &orion_ge10);
409}
410
411/*****************************************************************************
412 * GE11
413 ****************************************************************************/
414struct mv643xx_eth_shared_platform_data orion_ge11_shared_data = {
415 .shared_smi = &orion_ge00_shared,
416};
417
418static struct resource orion_ge11_shared_resources[] = {
419 {
420 .name = "ge11 base",
421 }, {
422 .name = "ge11 err irq",
423 },
424};
425
426static struct platform_device orion_ge11_shared = {
427 .name = MV643XX_ETH_SHARED_NAME,
428 .id = 1,
429 .dev = {
430 .platform_data = &orion_ge11_shared_data,
431 },
432};
433
434static struct resource orion_ge11_resources[] = {
435 {
436 .name = "ge11 irq",
437 .flags = IORESOURCE_IRQ,
438 },
439};
440
441static struct platform_device orion_ge11 = {
442 .name = MV643XX_ETH_NAME,
443 .id = 1,
444 .num_resources = 2,
445 .resource = orion_ge11_resources,
446 .dev = {
447 .coherent_dma_mask = DMA_BIT_MASK(32),
448 },
449};
450
451void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
7e3819d8
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452 unsigned long mapbase,
453 unsigned long irq,
452503eb 454 unsigned long irq_err)
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455{
456 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
457 mapbase + 0x2000, SZ_16K - 1, irq_err);
452503eb 458 ge_complete(&orion_ge11_shared_data,
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459 orion_ge11_resources, irq, &orion_ge11_shared,
460 eth_data, &orion_ge11);
461}
462
463/*****************************************************************************
464 * Ethernet switch
465 ****************************************************************************/
466static struct resource orion_switch_resources[] = {
467 {
468 .start = 0,
469 .end = 0,
470 .flags = IORESOURCE_IRQ,
471 },
472};
473
474static struct platform_device orion_switch_device = {
475 .name = "dsa",
476 .id = 0,
477 .num_resources = 0,
478 .resource = orion_switch_resources,
479};
480
481void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq)
482{
483 int i;
484
485 if (irq != NO_IRQ) {
486 orion_switch_resources[0].start = irq;
487 orion_switch_resources[0].end = irq;
488 orion_switch_device.num_resources = 1;
489 }
490
491 d->netdev = &orion_ge00.dev;
492 for (i = 0; i < d->nr_chips; i++)
493 d->chip[i].mii_bus = &orion_ge00_shared.dev;
494 orion_switch_device.dev.platform_data = d;
495
496 platform_device_register(&orion_switch_device);
497}
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498
499/*****************************************************************************
500 * I2C
501 ****************************************************************************/
502static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
503 .freq_n = 3,
504 .timeout = 1000, /* Default timeout of 1 second */
505};
506
507static struct resource orion_i2c_resources[2];
508
509static struct platform_device orion_i2c = {
510 .name = MV64XXX_I2C_CTLR_NAME,
511 .id = 0,
512 .dev = {
513 .platform_data = &orion_i2c_pdata,
514 },
515};
516
517static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = {
518 .freq_n = 3,
519 .timeout = 1000, /* Default timeout of 1 second */
520};
521
522static struct resource orion_i2c_1_resources[2];
523
524static struct platform_device orion_i2c_1 = {
525 .name = MV64XXX_I2C_CTLR_NAME,
526 .id = 1,
527 .dev = {
528 .platform_data = &orion_i2c_1_pdata,
529 },
530};
531
532void __init orion_i2c_init(unsigned long mapbase,
533 unsigned long irq,
534 unsigned long freq_m)
535{
536 orion_i2c_pdata.freq_m = freq_m;
537 fill_resources(&orion_i2c, orion_i2c_resources, mapbase,
538 SZ_32 - 1, irq);
539 platform_device_register(&orion_i2c);
540}
541
542void __init orion_i2c_1_init(unsigned long mapbase,
543 unsigned long irq,
544 unsigned long freq_m)
545{
546 orion_i2c_1_pdata.freq_m = freq_m;
547 fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase,
548 SZ_32 - 1, irq);
549 platform_device_register(&orion_i2c_1);
550}
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551
552/*****************************************************************************
553 * SPI
554 ****************************************************************************/
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555static struct resource orion_spi_resources;
556
557static struct platform_device orion_spi = {
558 .name = "orion_spi",
559 .id = 0,
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560};
561
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562static struct resource orion_spi_1_resources;
563
564static struct platform_device orion_spi_1 = {
565 .name = "orion_spi",
566 .id = 1,
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567};
568
569/* Note: The SPI silicon core does have interrupts. However the
570 * current Linux software driver does not use interrupts. */
571
4574b886 572void __init orion_spi_init(unsigned long mapbase)
980f9f60 573{
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574 fill_resources(&orion_spi, &orion_spi_resources,
575 mapbase, SZ_512 - 1, NO_IRQ);
576 platform_device_register(&orion_spi);
577}
578
4574b886 579void __init orion_spi_1_init(unsigned long mapbase)
980f9f60 580{
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581 fill_resources(&orion_spi_1, &orion_spi_1_resources,
582 mapbase, SZ_512 - 1, NO_IRQ);
583 platform_device_register(&orion_spi_1);
584}
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585
586/*****************************************************************************
587 * Watchdog
588 ****************************************************************************/
a855a7ce 589static struct resource orion_wdt_resource =
0fa1f060 590 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
a855a7ce 591
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592static struct platform_device orion_wdt_device = {
593 .name = "orion_wdt",
594 .id = -1,
a855a7ce 595 .num_resources = 1,
4f04be62 596 .resource = &orion_wdt_resource,
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597};
598
4f04be62 599void __init orion_wdt_init(void)
5e00d378 600{
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601 platform_device_register(&orion_wdt_device);
602}
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603
604/*****************************************************************************
605 * XOR
606 ****************************************************************************/
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607static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
608
609void __init orion_xor_init_channels(
610 struct mv_xor_platform_data *orion_xor0_data,
611 struct platform_device *orion_xor0_channel,
612 struct mv_xor_platform_data *orion_xor1_data,
613 struct platform_device *orion_xor1_channel)
614{
615 /*
616 * two engines can't do memset simultaneously, this limitation
617 * satisfied by removing memset support from one of the engines.
618 */
619 dma_cap_set(DMA_MEMCPY, orion_xor0_data->cap_mask);
620 dma_cap_set(DMA_XOR, orion_xor0_data->cap_mask);
621 platform_device_register(orion_xor0_channel);
622
623 dma_cap_set(DMA_MEMCPY, orion_xor1_data->cap_mask);
624 dma_cap_set(DMA_MEMSET, orion_xor1_data->cap_mask);
625 dma_cap_set(DMA_XOR, orion_xor1_data->cap_mask);
626 platform_device_register(orion_xor1_channel);
627}
628
629/*****************************************************************************
630 * XOR0
631 ****************************************************************************/
632static struct resource orion_xor0_shared_resources[] = {
633 {
634 .name = "xor 0 low",
635 .flags = IORESOURCE_MEM,
636 }, {
637 .name = "xor 0 high",
638 .flags = IORESOURCE_MEM,
639 },
640};
641
642static struct platform_device orion_xor0_shared = {
643 .name = MV_XOR_SHARED_NAME,
644 .id = 0,
ee962723
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645 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
646 .resource = orion_xor0_shared_resources,
647};
648
649static struct resource orion_xor00_resources[] = {
650 [0] = {
651 .flags = IORESOURCE_IRQ,
652 },
653};
654
655static struct mv_xor_platform_data orion_xor00_data = {
656 .shared = &orion_xor0_shared,
657 .hw_id = 0,
658 .pool_size = PAGE_SIZE,
659};
660
661static struct platform_device orion_xor00_channel = {
662 .name = MV_XOR_NAME,
663 .id = 0,
664 .num_resources = ARRAY_SIZE(orion_xor00_resources),
665 .resource = orion_xor00_resources,
666 .dev = {
667 .dma_mask = &orion_xor_dmamask,
668 .coherent_dma_mask = DMA_BIT_MASK(64),
669 .platform_data = &orion_xor00_data,
670 },
671};
672
673static struct resource orion_xor01_resources[] = {
674 [0] = {
675 .flags = IORESOURCE_IRQ,
676 },
677};
678
679static struct mv_xor_platform_data orion_xor01_data = {
680 .shared = &orion_xor0_shared,
681 .hw_id = 1,
682 .pool_size = PAGE_SIZE,
683};
684
685static struct platform_device orion_xor01_channel = {
686 .name = MV_XOR_NAME,
687 .id = 1,
688 .num_resources = ARRAY_SIZE(orion_xor01_resources),
689 .resource = orion_xor01_resources,
690 .dev = {
691 .dma_mask = &orion_xor_dmamask,
692 .coherent_dma_mask = DMA_BIT_MASK(64),
693 .platform_data = &orion_xor01_data,
694 },
695};
696
db33f4de 697void __init orion_xor0_init(unsigned long mapbase_low,
ee962723
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698 unsigned long mapbase_high,
699 unsigned long irq_0,
700 unsigned long irq_1)
701{
ee962723
AL
702 orion_xor0_shared_resources[0].start = mapbase_low;
703 orion_xor0_shared_resources[0].end = mapbase_low + 0xff;
704 orion_xor0_shared_resources[1].start = mapbase_high;
705 orion_xor0_shared_resources[1].end = mapbase_high + 0xff;
706
707 orion_xor00_resources[0].start = irq_0;
708 orion_xor00_resources[0].end = irq_0;
709 orion_xor01_resources[0].start = irq_1;
710 orion_xor01_resources[0].end = irq_1;
711
712 platform_device_register(&orion_xor0_shared);
713
714 orion_xor_init_channels(&orion_xor00_data, &orion_xor00_channel,
715 &orion_xor01_data, &orion_xor01_channel);
716}
717
718/*****************************************************************************
719 * XOR1
720 ****************************************************************************/
721static struct resource orion_xor1_shared_resources[] = {
722 {
723 .name = "xor 1 low",
724 .flags = IORESOURCE_MEM,
725 }, {
726 .name = "xor 1 high",
727 .flags = IORESOURCE_MEM,
728 },
729};
730
731static struct platform_device orion_xor1_shared = {
732 .name = MV_XOR_SHARED_NAME,
733 .id = 1,
ee962723
AL
734 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
735 .resource = orion_xor1_shared_resources,
736};
737
738static struct resource orion_xor10_resources[] = {
739 [0] = {
740 .flags = IORESOURCE_IRQ,
741 },
742};
743
744static struct mv_xor_platform_data orion_xor10_data = {
745 .shared = &orion_xor1_shared,
746 .hw_id = 0,
747 .pool_size = PAGE_SIZE,
748};
749
750static struct platform_device orion_xor10_channel = {
751 .name = MV_XOR_NAME,
752 .id = 2,
753 .num_resources = ARRAY_SIZE(orion_xor10_resources),
754 .resource = orion_xor10_resources,
755 .dev = {
756 .dma_mask = &orion_xor_dmamask,
757 .coherent_dma_mask = DMA_BIT_MASK(64),
758 .platform_data = &orion_xor10_data,
759 },
760};
761
762static struct resource orion_xor11_resources[] = {
763 [0] = {
764 .flags = IORESOURCE_IRQ,
765 },
766};
767
768static struct mv_xor_platform_data orion_xor11_data = {
769 .shared = &orion_xor1_shared,
770 .hw_id = 1,
771 .pool_size = PAGE_SIZE,
772};
773
774static struct platform_device orion_xor11_channel = {
775 .name = MV_XOR_NAME,
776 .id = 3,
777 .num_resources = ARRAY_SIZE(orion_xor11_resources),
778 .resource = orion_xor11_resources,
779 .dev = {
780 .dma_mask = &orion_xor_dmamask,
781 .coherent_dma_mask = DMA_BIT_MASK(64),
782 .platform_data = &orion_xor11_data,
783 },
784};
785
786void __init orion_xor1_init(unsigned long mapbase_low,
787 unsigned long mapbase_high,
788 unsigned long irq_0,
789 unsigned long irq_1)
790{
791 orion_xor1_shared_resources[0].start = mapbase_low;
792 orion_xor1_shared_resources[0].end = mapbase_low + 0xff;
793 orion_xor1_shared_resources[1].start = mapbase_high;
794 orion_xor1_shared_resources[1].end = mapbase_high + 0xff;
795
796 orion_xor10_resources[0].start = irq_0;
797 orion_xor10_resources[0].end = irq_0;
798 orion_xor11_resources[0].start = irq_1;
799 orion_xor11_resources[0].end = irq_1;
800
801 platform_device_register(&orion_xor1_shared);
802
803 orion_xor_init_channels(&orion_xor10_data, &orion_xor10_channel,
804 &orion_xor11_data, &orion_xor11_channel);
805}
4fcd3f37
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806
807/*****************************************************************************
808 * EHCI
809 ****************************************************************************/
72053353 810static struct orion_ehci_data orion_ehci_data;
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811static u64 ehci_dmamask = DMA_BIT_MASK(32);
812
813
814/*****************************************************************************
815 * EHCI0
816 ****************************************************************************/
817static struct resource orion_ehci_resources[2];
818
819static struct platform_device orion_ehci = {
820 .name = "orion-ehci",
821 .id = 0,
822 .dev = {
823 .dma_mask = &ehci_dmamask,
824 .coherent_dma_mask = DMA_BIT_MASK(32),
825 .platform_data = &orion_ehci_data,
826 },
827};
828
db33f4de 829void __init orion_ehci_init(unsigned long mapbase,
72053353
AL
830 unsigned long irq,
831 enum orion_ehci_phy_ver phy_version)
4fcd3f37 832{
72053353 833 orion_ehci_data.phy_version = phy_version;
4fcd3f37
AL
834 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
835 irq);
836
837 platform_device_register(&orion_ehci);
838}
839
840/*****************************************************************************
841 * EHCI1
842 ****************************************************************************/
843static struct resource orion_ehci_1_resources[2];
844
845static struct platform_device orion_ehci_1 = {
846 .name = "orion-ehci",
847 .id = 1,
848 .dev = {
849 .dma_mask = &ehci_dmamask,
850 .coherent_dma_mask = DMA_BIT_MASK(32),
851 .platform_data = &orion_ehci_data,
852 },
853};
854
db33f4de 855void __init orion_ehci_1_init(unsigned long mapbase,
4fcd3f37
AL
856 unsigned long irq)
857{
4fcd3f37
AL
858 fill_resources(&orion_ehci_1, orion_ehci_1_resources,
859 mapbase, SZ_4K - 1, irq);
860
861 platform_device_register(&orion_ehci_1);
862}
863
864/*****************************************************************************
865 * EHCI2
866 ****************************************************************************/
867static struct resource orion_ehci_2_resources[2];
868
869static struct platform_device orion_ehci_2 = {
870 .name = "orion-ehci",
871 .id = 2,
872 .dev = {
873 .dma_mask = &ehci_dmamask,
874 .coherent_dma_mask = DMA_BIT_MASK(32),
875 .platform_data = &orion_ehci_data,
876 },
877};
878
db33f4de 879void __init orion_ehci_2_init(unsigned long mapbase,
4fcd3f37
AL
880 unsigned long irq)
881{
4fcd3f37
AL
882 fill_resources(&orion_ehci_2, orion_ehci_2_resources,
883 mapbase, SZ_4K - 1, irq);
884
885 platform_device_register(&orion_ehci_2);
886}
9e613f8a
AL
887
888/*****************************************************************************
889 * SATA
890 ****************************************************************************/
891static struct resource orion_sata_resources[2] = {
892 {
893 .name = "sata base",
894 }, {
895 .name = "sata irq",
896 },
897};
898
899static struct platform_device orion_sata = {
900 .name = "sata_mv",
901 .id = 0,
902 .dev = {
903 .coherent_dma_mask = DMA_BIT_MASK(32),
904 },
905};
906
907void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
9e613f8a
AL
908 unsigned long mapbase,
909 unsigned long irq)
910{
9e613f8a
AL
911 orion_sata.dev.platform_data = sata_data;
912 fill_resources(&orion_sata, orion_sata_resources,
913 mapbase, 0x5000 - 1, irq);
914
915 platform_device_register(&orion_sata);
916}
917
44350061
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918/*****************************************************************************
919 * Cryptographic Engines and Security Accelerator (CESA)
920 ****************************************************************************/
921static struct resource orion_crypto_resources[] = {
922 {
923 .name = "regs",
924 }, {
925 .name = "crypto interrupt",
926 }, {
927 .name = "sram",
928 .flags = IORESOURCE_MEM,
929 },
930};
9e613f8a 931
44350061
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932static struct platform_device orion_crypto = {
933 .name = "mv_crypto",
934 .id = -1,
935};
936
937void __init orion_crypto_init(unsigned long mapbase,
938 unsigned long srambase,
939 unsigned long sram_size,
940 unsigned long irq)
941{
942 fill_resources(&orion_crypto, orion_crypto_resources,
943 mapbase, 0xffff, irq);
944 orion_crypto.num_resources = 3;
945 orion_crypto_resources[2].start = srambase;
946 orion_crypto_resources[2].end = srambase + sram_size - 1;
947
948 platform_device_register(&orion_crypto);
949}
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