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a21765a7 | 1 | /* linux/include/asm-arm/plat-s3c24xx/pm.h |
1da177e4 LT |
2 | * |
3 | * Copyright (c) 2004 Simtec Electronics | |
6419711a | 4 | * http://armlinux.simtec.co.uk/ |
1da177e4 LT |
5 | * Written by Ben Dooks, <ben@simtec.co.uk> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
4e59c25d | 12 | /* s3c_pm_init |
1da177e4 LT |
13 | * |
14 | * called from board at initialisation time to setup the power | |
15 | * management | |
16 | */ | |
17 | ||
18 | #ifdef CONFIG_PM | |
19 | ||
4e59c25d | 20 | extern __init int s3c_pm_init(void); |
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21 | |
22 | #else | |
23 | ||
4e59c25d | 24 | static inline int s3c_pm_init(void) |
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25 | { |
26 | return 0; | |
27 | } | |
28 | #endif | |
29 | ||
30 | /* configuration for the IRQ mask over sleep */ | |
31 | extern unsigned long s3c_irqwake_intmask; | |
32 | extern unsigned long s3c_irqwake_eintmask; | |
33 | ||
34 | /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ | |
35 | extern unsigned long s3c_irqwake_intallow; | |
36 | extern unsigned long s3c_irqwake_eintallow; | |
37 | ||
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38 | /* per-cpu sleep functions */ |
39 | ||
40 | extern void (*pm_cpu_prep)(void); | |
41 | extern void (*pm_cpu_sleep)(void); | |
42 | ||
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43 | /* Flags for PM Control */ |
44 | ||
45 | extern unsigned long s3c_pm_flags; | |
46 | ||
4b637dc2 BD |
47 | extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */ |
48 | ||
1da177e4 LT |
49 | /* from sleep.S */ |
50 | ||
ef30e144 BD |
51 | extern int s3c_cpu_save(unsigned long *saveblk); |
52 | extern void s3c_cpu_resume(void); | |
53 | ||
58095d7f | 54 | extern void s3c2410_cpu_suspend(void); |
1da177e4 | 55 | |
6419711a | 56 | extern unsigned long s3c_sleep_save_phys; |
1da177e4 LT |
57 | |
58 | /* sleep save info */ | |
59 | ||
6419711a BD |
60 | /** |
61 | * struct sleep_save - save information for shared peripherals. | |
62 | * @reg: Pointer to the register to save. | |
63 | * @val: Holder for the value saved from reg. | |
64 | * | |
65 | * This describes a list of registers which is used by the pm core and | |
66 | * other subsystem to save and restore register values over suspend. | |
67 | */ | |
1da177e4 LT |
68 | struct sleep_save { |
69 | void __iomem *reg; | |
70 | unsigned long val; | |
71 | }; | |
72 | ||
73 | #define SAVE_ITEM(x) \ | |
74 | { .reg = (x) } | |
75 | ||
d2b07fe2 BD |
76 | /** |
77 | * struct pm_uart_save - save block for core UART | |
78 | * @ulcon: Save value for S3C2410_ULCON | |
79 | * @ucon: Save value for S3C2410_UCON | |
80 | * @ufcon: Save value for S3C2410_UFCON | |
81 | * @umcon: Save value for S3C2410_UMCON | |
82 | * @ubrdiv: Save value for S3C2410_UBRDIV | |
83 | * | |
84 | * Save block for UART registers to be held over sleep and restored if they | |
85 | * are needed (say by debug). | |
86 | */ | |
87 | struct pm_uart_save { | |
88 | u32 ulcon; | |
89 | u32 ucon; | |
90 | u32 ufcon; | |
91 | u32 umcon; | |
92 | u32 ubrdiv; | |
4b637dc2 | 93 | u32 udivslot; |
d2b07fe2 BD |
94 | }; |
95 | ||
6419711a BD |
96 | /* helper functions to save/restore lists of registers. */ |
97 | ||
98 | extern void s3c_pm_do_save(struct sleep_save *ptr, int count); | |
99 | extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); | |
100 | extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); | |
1e582fc7 BD |
101 | |
102 | #ifdef CONFIG_PM | |
56b34426 | 103 | extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); |
1e582fc7 BD |
104 | extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); |
105 | extern int s3c24xx_irq_resume(struct sys_device *dev); | |
106 | #else | |
56b34426 | 107 | #define s3c_irqext_wake NULL |
1e582fc7 BD |
108 | #define s3c24xx_irq_suspend NULL |
109 | #define s3c24xx_irq_resume NULL | |
110 | #endif | |
6419711a BD |
111 | |
112 | /* PM debug functions */ | |
113 | ||
114 | #ifdef CONFIG_S3C2410_PM_DEBUG | |
115 | /** | |
116 | * s3c_pm_dbg() - low level debug function for use in suspend/resume. | |
117 | * @msg: The message to print. | |
118 | * | |
119 | * This function is used mainly to debug the resume process before the system | |
120 | * can rely on printk/console output. It uses the low-level debugging output | |
121 | * routine printascii() to do its work. | |
122 | */ | |
123 | extern void s3c_pm_dbg(const char *msg, ...); | |
124 | ||
125 | #define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) | |
126 | #else | |
127 | #define S3C_PMDBG(fmt...) printk(KERN_DEBUG fmt) | |
128 | #endif | |
549c7e33 | 129 | |
bd117bd1 BD |
130 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK |
131 | /** | |
132 | * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs | |
133 | * @set: set bits for the state of the LEDs | |
134 | * @clear: clear bits for the state of the LEDs. | |
135 | */ | |
136 | extern void s3c_pm_debug_smdkled(u32 set, u32 clear); | |
137 | ||
138 | #else | |
139 | static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { } | |
140 | #endif /* CONFIG_S3C_PM_DEBUG_LED_SMDK */ | |
141 | ||
549c7e33 BD |
142 | /* suspend memory checking */ |
143 | ||
144 | #ifdef CONFIG_S3C2410_PM_CHECK | |
145 | extern void s3c_pm_check_prepare(void); | |
146 | extern void s3c_pm_check_restore(void); | |
aa8aba69 | 147 | extern void s3c_pm_check_cleanup(void); |
549c7e33 BD |
148 | extern void s3c_pm_check_store(void); |
149 | #else | |
150 | #define s3c_pm_check_prepare() do { } while(0) | |
151 | #define s3c_pm_check_restore() do { } while(0) | |
aa8aba69 | 152 | #define s3c_pm_check_cleanup() do { } while(0) |
549c7e33 BD |
153 | #define s3c_pm_check_store() do { } while(0) |
154 | #endif | |
2261e0e6 BD |
155 | |
156 | /** | |
157 | * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ | |
158 | * | |
159 | * Setup all the necessary GPIO pins for waking the system on external | |
160 | * interrupt. | |
161 | */ | |
162 | extern void s3c_pm_configure_extint(void); | |
163 | ||
164 | /** | |
165 | * s3c_pm_restore_gpios() - restore the state of the gpios after sleep. | |
166 | * | |
167 | * Restore the state of the GPIO pins after sleep, which may involve ensuring | |
168 | * that we do not glitch the state of the pins from that the bootloader's | |
169 | * resume code has done. | |
170 | */ | |
171 | extern void s3c_pm_restore_gpios(void); | |
172 | ||
173 | /** | |
174 | * s3c_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. | |
175 | * | |
176 | * Save the GPIO states for resotration on resume. See s3c_pm_restore_gpios(). | |
177 | */ | |
178 | extern void s3c_pm_save_gpios(void); | |
179 | ||
fff94cd9 BD |
180 | /** |
181 | * s3c_pm_cb_flushcache - callback for assembly code | |
182 | * | |
183 | * Callback to issue flush_cache_all() as this call is | |
184 | * not a directly callable object. | |
185 | */ | |
186 | extern void s3c_pm_cb_flushcache(void); | |
187 | ||
2261e0e6 BD |
188 | extern void s3c_pm_save_core(void); |
189 | extern void s3c_pm_restore_core(void); |