projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a21765a7 | 1 | /* linux/include/asm-arm/plat-s3c24xx/pm.h |
| 1da177e4 LT |
2 | * |
| 3 | * Copyright (c) 2004 Simtec Electronics | |
| 6419711a | 4 | * http://armlinux.simtec.co.uk/ |
| 1da177e4 LT |
5 | * Written by Ben Dooks, <ben@simtec.co.uk> |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | ||
| 12 | /* s3c2410_pm_init | |
| 13 | * | |
| 14 | * called from board at initialisation time to setup the power | |
| 15 | * management | |
| 16 | */ | |
| 17 | ||
| 18 | #ifdef CONFIG_PM | |
| 19 | ||
| 20 | extern __init int s3c2410_pm_init(void); | |
| 21 | ||
| 22 | #else | |
| 23 | ||
| 24 | static inline int s3c2410_pm_init(void) | |
| 25 | { | |
| 26 | return 0; | |
| 27 | } | |
| 28 | #endif | |
| 29 | ||
| 30 | /* configuration for the IRQ mask over sleep */ | |
| 31 | extern unsigned long s3c_irqwake_intmask; | |
| 32 | extern unsigned long s3c_irqwake_eintmask; | |
| 33 | ||
| 34 | /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ | |
| 35 | extern unsigned long s3c_irqwake_intallow; | |
| 36 | extern unsigned long s3c_irqwake_eintallow; | |
| 37 | ||
| 0033a2f0 BD |
38 | /* per-cpu sleep functions */ |
| 39 | ||
| 40 | extern void (*pm_cpu_prep)(void); | |
| 41 | extern void (*pm_cpu_sleep)(void); | |
| 42 | ||
| 1da177e4 LT |
43 | /* Flags for PM Control */ |
| 44 | ||
| 45 | extern unsigned long s3c_pm_flags; | |
| 46 | ||
| 47 | /* from sleep.S */ | |
| 48 | ||
| 58095d7f BD |
49 | extern int s3c2410_cpu_save(unsigned long *saveblk); |
| 50 | extern void s3c2410_cpu_suspend(void); | |
| 1da177e4 LT |
51 | extern void s3c2410_cpu_resume(void); |
| 52 | ||
| 6419711a | 53 | extern unsigned long s3c_sleep_save_phys; |
| 1da177e4 LT |
54 | |
| 55 | /* sleep save info */ | |
| 56 | ||
| 6419711a BD |
57 | /** |
| 58 | * struct sleep_save - save information for shared peripherals. | |
| 59 | * @reg: Pointer to the register to save. | |
| 60 | * @val: Holder for the value saved from reg. | |
| 61 | * | |
| 62 | * This describes a list of registers which is used by the pm core and | |
| 63 | * other subsystem to save and restore register values over suspend. | |
| 64 | */ | |
| 1da177e4 LT |
65 | struct sleep_save { |
| 66 | void __iomem *reg; | |
| 67 | unsigned long val; | |
| 68 | }; | |
| 69 | ||
| 70 | #define SAVE_ITEM(x) \ | |
| 71 | { .reg = (x) } | |
| 72 | ||
| 6419711a BD |
73 | /* helper functions to save/restore lists of registers. */ |
| 74 | ||
| 75 | extern void s3c_pm_do_save(struct sleep_save *ptr, int count); | |
| 76 | extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); | |
| 77 | extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); | |
| 1e582fc7 BD |
78 | |
| 79 | #ifdef CONFIG_PM | |
| 56b34426 | 80 | extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); |
| 1e582fc7 BD |
81 | extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); |
| 82 | extern int s3c24xx_irq_resume(struct sys_device *dev); | |
| 83 | #else | |
| 56b34426 | 84 | #define s3c_irqext_wake NULL |
| 1e582fc7 BD |
85 | #define s3c24xx_irq_suspend NULL |
| 86 | #define s3c24xx_irq_resume NULL | |
| 87 | #endif | |
| 6419711a BD |
88 | |
| 89 | /* PM debug functions */ | |
| 90 | ||
| 91 | #ifdef CONFIG_S3C2410_PM_DEBUG | |
| 92 | /** | |
| 93 | * s3c_pm_dbg() - low level debug function for use in suspend/resume. | |
| 94 | * @msg: The message to print. | |
| 95 | * | |
| 96 | * This function is used mainly to debug the resume process before the system | |
| 97 | * can rely on printk/console output. It uses the low-level debugging output | |
| 98 | * routine printascii() to do its work. | |
| 99 | */ | |
| 100 | extern void s3c_pm_dbg(const char *msg, ...); | |
| 101 | ||
| 102 | #define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) | |
| 103 | #else | |
| 104 | #define S3C_PMDBG(fmt...) printk(KERN_DEBUG fmt) | |
| 105 | #endif | |
| 549c7e33 BD |
106 | |
| 107 | /* suspend memory checking */ | |
| 108 | ||
| 109 | #ifdef CONFIG_S3C2410_PM_CHECK | |
| 110 | extern void s3c_pm_check_prepare(void); | |
| 111 | extern void s3c_pm_check_restore(void); | |
| 112 | extern void s3c_pm_check_store(void); | |
| 113 | #else | |
| 114 | #define s3c_pm_check_prepare() do { } while(0) | |
| 115 | #define s3c_pm_check_restore() do { } while(0) | |
| 116 | #define s3c_pm_check_store() do { } while(0) | |
| 117 | #endif | |
| 2261e0e6 BD |
118 | |
| 119 | /** | |
| 120 | * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ | |
| 121 | * | |
| 122 | * Setup all the necessary GPIO pins for waking the system on external | |
| 123 | * interrupt. | |
| 124 | */ | |
| 125 | extern void s3c_pm_configure_extint(void); | |
| 126 | ||
| 127 | /** | |
| 128 | * s3c_pm_restore_gpios() - restore the state of the gpios after sleep. | |
| 129 | * | |
| 130 | * Restore the state of the GPIO pins after sleep, which may involve ensuring | |
| 131 | * that we do not glitch the state of the pins from that the bootloader's | |
| 132 | * resume code has done. | |
| 133 | */ | |
| 134 | extern void s3c_pm_restore_gpios(void); | |
| 135 | ||
| 136 | /** | |
| 137 | * s3c_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. | |
| 138 | * | |
| 139 | * Save the GPIO states for resotration on resume. See s3c_pm_restore_gpios(). | |
| 140 | */ | |
| 141 | extern void s3c_pm_save_gpios(void); | |
| 142 | ||
| 143 | extern void s3c_pm_save_core(void); | |
| 144 | extern void s3c_pm_restore_core(void); |