[deliverable/linux.git] / arch / arm / plat-s3c / pm.c

/* linux/arch/arm/plat-s3c/pm.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2004,2006,2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * S3C common power management (suspend to ram) support.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/init.h>
#include <linux/suspend.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
#include <linux/io.h>

#include <asm/cacheflush.h>
#include <mach/hardware.h>

#include <plat/regs-serial.h>
#include <mach/regs-clock.h>
#include <mach/regs-gpio.h>
#include <mach/regs-mem.h>
#include <mach/regs-irq.h>
#include <asm/irq.h>

#include <plat/pm.h>
#include <plat/pm-core.h>

/* for external use */

unsigned long s3c_pm_flags;

/* Debug code:
 *
 * This code supports debug output to the low level UARTs for use on
 * resume before the console layer is available.
*/

#ifdef CONFIG_S3C2410_PM_DEBUG
extern void printascii(const char *);

void s3c_pm_dbg(const char *fmt, ...)
{
	va_list va;
	char buff[256];

	va_start(va, fmt);
	vsprintf(buff, fmt, va);
	va_end(va);

	printascii(buff);
}

static inline void s3c_pm_debug_init(void)
{
	/* restart uart clocks so we can use them to output */
	s3c_pm_debug_init_uart();
}

#else
#define s3c_pm_debug_init() do { } while(0)

#endif /* CONFIG_S3C2410_PM_DEBUG */

/* Save the UART configurations if we are configured for debug. */

#ifdef CONFIG_S3C2410_PM_DEBUG

struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];

static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
{
	void __iomem *regs = S3C_VA_UARTx(uart);

	save->ulcon = __raw_readl(regs + S3C2410_ULCON);
	save->ucon = __raw_readl(regs + S3C2410_UCON);
	save->ufcon = __raw_readl(regs + S3C2410_UFCON);
	save->umcon = __raw_readl(regs + S3C2410_UMCON);
	save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
}

static void s3c_pm_save_uarts(void)
{
	struct pm_uart_save *save = uart_save;
	unsigned int uart;

	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
		s3c_pm_save_uart(uart, save);
}

static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
{
	void __iomem *regs = S3C_VA_UARTx(uart);

	__raw_writel(save->ulcon, regs + S3C2410_ULCON);
	__raw_writel(save->ucon,  regs + S3C2410_UCON);
	__raw_writel(save->ufcon, regs + S3C2410_UFCON);
	__raw_writel(save->umcon, regs + S3C2410_UMCON);
	__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
}

static void s3c_pm_restore_uarts(void)
{
	struct pm_uart_save *save = uart_save;
	unsigned int uart;

	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
		s3c_pm_restore_uart(uart, save);
}
#else
static void s3c_pm_save_uarts(void) { }
static void s3c_pm_restore_uarts(void) { }
#endif

/* The IRQ ext-int code goes here, it is too small to currently bother
 * with its own file. */

unsigned long s3c_irqwake_intmask	= 0xffffffffL;
unsigned long s3c_irqwake_eintmask	= 0xffffffffL;

int s3c_irqext_wake(unsigned int irqno, unsigned int state)
{
	unsigned long bit = 1L << IRQ_EINT_BIT(irqno);

	if (!(s3c_irqwake_eintallow & bit))
		return -ENOENT;

	printk(KERN_INFO "wake %s for irq %d\n",
	       state ? "enabled" : "disabled", irqno);

	if (!state)
		s3c_irqwake_eintmask |= bit;
	else
		s3c_irqwake_eintmask &= ~bit;

	return 0;
}

/* helper functions to save and restore register state */

/**
 * s3c_pm_do_save() - save a set of registers for restoration on resume.
 * @ptr: Pointer to an array of registers.
 * @count: Size of the ptr array.
 *
 * Run through the list of registers given, saving their contents in the
 * array for later restoration when we wakeup.
 */
void s3c_pm_do_save(struct sleep_save *ptr, int count)
{
	for (; count > 0; count--, ptr++) {
		ptr->val = __raw_readl(ptr->reg);
		S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
	}
}

/**
 * s3c_pm_do_restore() - restore register values from the save list.
 * @ptr: Pointer to an array of registers.
 * @count: Size of the ptr array.
 *
 * Restore the register values saved from s3c_pm_do_save().
 *
 * Note, we do not use S3C_PMDBG() in here, as the system may not have
 * restore the UARTs state yet
*/

void s3c_pm_do_restore(struct sleep_save *ptr, int count)
{
	for (; count > 0; count--, ptr++) {
		printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
		       ptr->reg, ptr->val, __raw_readl(ptr->reg));

		__raw_writel(ptr->val, ptr->reg);
	}
}

/**
 * s3c_pm_do_restore_core() - early restore register values from save list.
 *
 * This is similar to s3c_pm_do_restore() except we try and minimise the
 * side effects of the function in case registers that hardware might need
 * to work has been restored.
 *
 * WARNING: Do not put any debug in here that may effect memory or use
 * peripherals, as things may be changing!
*/

void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
{
	for (; count > 0; count--, ptr++)
		__raw_writel(ptr->val, ptr->reg);
}

/* s3c2410_pm_show_resume_irqs
 *
 * print any IRQs asserted at resume time (ie, we woke from)
*/
static void s3c_pm_show_resume_irqs(int start, unsigned long which,
				    unsigned long mask)
{
	int i;

	which &= ~mask;

	for (i = 0; i <= 31; i++) {
		if (which & (1L<<i)) {
			S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
		}
	}
}


void (*pm_cpu_prep)(void);
void (*pm_cpu_sleep)(void);

#define any_allowed(mask, allow) (((mask) & (allow)) != (allow))

/* s3c_pm_enter
 *
 * central control for sleep/resume process
*/

static int s3c_pm_enter(suspend_state_t state)
{
	unsigned long regs_save[16];

	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* prepare check area if configured */

	s3c_pm_check_prepare();

	/* store the physical address of the register recovery block */

	s3c_sleep_save_phys = virt_to_phys(regs_save);

	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);

	/* save all necessary core registers not covered by the drivers */

	s3c_pm_save_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* s3c2410_cpu_save will also act as our return point from when
	 * we resume as it saves its own register state, so use the return
	 * code to differentiate return from save and return from sleep */

	if (s3c_cpu_save(regs_save) == 0) {
		flush_cache_all();
		S3C_PMDBG("preparing to sleep\n");
		pm_cpu_sleep();
	}

	/* restore the cpu state using the kernel's cpu init code. */

	cpu_init();

	/* restore the system state */

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	s3c_pm_restore_gpios();

	s3c_pm_debug_init();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}

static struct platform_suspend_ops s3c_pm_ops = {
	.enter		= s3c_pm_enter,
	.valid		= suspend_valid_only_mem,
};

/* s3c_pm_init
 *
 * Attach the power management functions. This should be called
 * from the board specific initialisation if the board supports
 * it.
*/

int __init s3c_pm_init(void)
{
	printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");

	suspend_set_ops(&s3c_pm_ops);
	return 0;
}
Commit	Line	Data
6419711a BD	1	/* linux/arch/arm/plat-s3c/pm.c
	2	*
	3	* Copyright 2008 Openmoko, Inc.
	4	* Copyright 2004,2006,2008 Simtec Electronics
	5	* Ben Dooks <ben@simtec.co.uk>
	6	* http://armlinux.simtec.co.uk/
	7	*
	8	* S3C common power management (suspend to ram) support.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/init.h>
	16	#include <linux/suspend.h>
	17	#include <linux/errno.h>
2261e0e6 BD	18	#include <linux/delay.h>
2261e0e6 BD	19	#include <linux/serial_core.h>
6419711a BD	20	#include <linux/io.h>
6419711a BD	21
2261e0e6 BD	22	#include <asm/cacheflush.h>
	23	#include <mach/hardware.h>
	24
	25	#include <plat/regs-serial.h>
	26	#include <mach/regs-clock.h>
	27	#include <mach/regs-gpio.h>
	28	#include <mach/regs-mem.h>
	29	#include <mach/regs-irq.h>
56b34426	30	#include <asm/irq.h>
2261e0e6	31
6419711a	32	#include <plat/pm.h>
2261e0e6	33	#include <plat/pm-core.h>
6419711a BD	34
	35	/* for external use */
	36
	37	unsigned long s3c_pm_flags;
	38
2261e0e6 BD	39	/* Debug code:
	40	*
	41	* This code supports debug output to the low level UARTs for use on
	42	* resume before the console layer is available.
	43	*/
	44
6419711a BD	45	#ifdef CONFIG_S3C2410_PM_DEBUG
	46	extern void printascii(const char *);
	47
	48	void s3c_pm_dbg(const char *fmt, ...)
	49	{
	50	va_list va;
	51	char buff[256];
	52
	53	va_start(va, fmt);
	54	vsprintf(buff, fmt, va);
	55	va_end(va);
	56
	57	printascii(buff);
	58	}
2261e0e6 BD	59
	60	static inline void s3c_pm_debug_init(void)
	61	{
	62	/* restart uart clocks so we can use them to output */
	63	s3c_pm_debug_init_uart();
	64	}
	65
	66	#else
	67	#define s3c_pm_debug_init() do { } while(0)
	68
6419711a BD	69	#endif /* CONFIG_S3C2410_PM_DEBUG */
6419711a BD	70
2261e0e6 BD	71	/* Save the UART configurations if we are configured for debug. */
	72
	73	#ifdef CONFIG_S3C2410_PM_DEBUG
	74
d2b07fe2 BD	75	struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
	76
	77	static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
	78	{
	79	void __iomem *regs = S3C_VA_UARTx(uart);
	80
	81	save->ulcon = __raw_readl(regs + S3C2410_ULCON);
	82	save->ucon = __raw_readl(regs + S3C2410_UCON);
	83	save->ufcon = __raw_readl(regs + S3C2410_UFCON);
	84	save->umcon = __raw_readl(regs + S3C2410_UMCON);
	85	save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
	86	}
2261e0e6	87
d2b07fe2	88	static void s3c_pm_save_uarts(void)
2261e0e6	89	{
d2b07fe2 BD	90	struct pm_uart_save *save = uart_save;
	91	unsigned int uart;
	92
	93	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
	94	s3c_pm_save_uart(uart, save);
	95	}
	96
	97	static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
	98	{
	99	void __iomem *regs = S3C_VA_UARTx(uart);
	100
	101	__raw_writel(save->ulcon, regs + S3C2410_ULCON);
	102	__raw_writel(save->ucon, regs + S3C2410_UCON);
	103	__raw_writel(save->ufcon, regs + S3C2410_UFCON);
	104	__raw_writel(save->umcon, regs + S3C2410_UMCON);
	105	__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
2261e0e6 BD	106	}
2261e0e6 BD	107
d2b07fe2	108	static void s3c_pm_restore_uarts(void)
2261e0e6	109	{
d2b07fe2 BD	110	struct pm_uart_save *save = uart_save;
	111	unsigned int uart;
	112
	113	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
	114	s3c_pm_restore_uart(uart, save);
2261e0e6 BD	115	}
2261e0e6 BD	116	#else
d2b07fe2 BD	117	static void s3c_pm_save_uarts(void) { }
d2b07fe2 BD	118	static void s3c_pm_restore_uarts(void) { }
2261e0e6 BD	119	#endif
2261e0e6 BD	120
56b34426 BD	121	/* The IRQ ext-int code goes here, it is too small to currently bother
	122	* with its own file. */
	123
	124	unsigned long s3c_irqwake_intmask = 0xffffffffL;
	125	unsigned long s3c_irqwake_eintmask = 0xffffffffL;
	126
	127	int s3c_irqext_wake(unsigned int irqno, unsigned int state)
	128	{
	129	unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
	130
	131	if (!(s3c_irqwake_eintallow & bit))
	132	return -ENOENT;
	133
	134	printk(KERN_INFO "wake %s for irq %d\n",
	135	state ? "enabled" : "disabled", irqno);
	136
	137	if (!state)
	138	s3c_irqwake_eintmask \|= bit;
	139	else
	140	s3c_irqwake_eintmask &= ~bit;
	141
	142	return 0;
	143	}
6419711a BD	144
	145	/* helper functions to save and restore register state */
	146
	147	/**
	148	* s3c_pm_do_save() - save a set of registers for restoration on resume.
	149	* @ptr: Pointer to an array of registers.
	150	* @count: Size of the ptr array.
	151	*
	152	* Run through the list of registers given, saving their contents in the
	153	* array for later restoration when we wakeup.
	154	*/
	155	void s3c_pm_do_save(struct sleep_save *ptr, int count)
	156	{
	157	for (; count > 0; count--, ptr++) {
	158	ptr->val = __raw_readl(ptr->reg);
	159	S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
	160	}
	161	}
	162
	163	/**
	164	* s3c_pm_do_restore() - restore register values from the save list.
	165	* @ptr: Pointer to an array of registers.
	166	* @count: Size of the ptr array.
	167	*
	168	* Restore the register values saved from s3c_pm_do_save().
	169	*
	170	* Note, we do not use S3C_PMDBG() in here, as the system may not have
	171	* restore the UARTs state yet
	172	*/
	173
	174	void s3c_pm_do_restore(struct sleep_save *ptr, int count)
	175	{
	176	for (; count > 0; count--, ptr++) {
	177	printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
	178	ptr->reg, ptr->val, __raw_readl(ptr->reg));
	179
	180	__raw_writel(ptr->val, ptr->reg);
	181	}
	182	}
	183
	184	/**
	185	* s3c_pm_do_restore_core() - early restore register values from save list.
	186	*
	187	* This is similar to s3c_pm_do_restore() except we try and minimise the
	188	* side effects of the function in case registers that hardware might need
	189	* to work has been restored.
	190	*
	191	* WARNING: Do not put any debug in here that may effect memory or use
	192	* peripherals, as things may be changing!
	193	*/
	194
	195	void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
	196	{
	197	for (; count > 0; count--, ptr++)
	198	__raw_writel(ptr->val, ptr->reg);
	199	}
2261e0e6 BD	200
	201	/* s3c2410_pm_show_resume_irqs
	202	*
	203	* print any IRQs asserted at resume time (ie, we woke from)
	204	*/
	205	static void s3c_pm_show_resume_irqs(int start, unsigned long which,
	206	unsigned long mask)
	207	{
	208	int i;
	209
	210	which &= ~mask;
	211
	212	for (i = 0; i <= 31; i++) {
	213	if (which & (1L<<i)) {
	214	S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
	215	}
	216	}
	217	}
	218
	219
	220	void (*pm_cpu_prep)(void);
	221	void (*pm_cpu_sleep)(void);
	222
	223	#define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
	224
	225	/* s3c_pm_enter
	226	*
	227	* central control for sleep/resume process
	228	*/
	229
	230	static int s3c_pm_enter(suspend_state_t state)
	231	{
	232	unsigned long regs_save[16];
	233
	234	/* ensure the debug is initialised (if enabled) */
	235
	236	s3c_pm_debug_init();
	237
	238	S3C_PMDBG("%s(%d)\n", __func__, state);
	239
	240	if (pm_cpu_prep == NULL \|\| pm_cpu_sleep == NULL) {
	241	printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
	242	return -EINVAL;
	243	}
	244
	245	/* check if we have anything to wake-up with... bad things seem
	246	* to happen if you suspend with no wakeup (system will often
	247	* require a full power-cycle)
	248	*/
	249
	250	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	251	!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
	252	printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
	253	printk(KERN_ERR "%s: Aborting sleep\n", __func__);
	254	return -EINVAL;
	255	}
	256
	257	/* prepare check area if configured */
	258
	259	s3c_pm_check_prepare();
	260
	261	/* store the physical address of the register recovery block */
	262
	263	s3c_sleep_save_phys = virt_to_phys(regs_save);
264
265	S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);
266
267	/* save all necessary core registers not covered by the drivers */
268
269	s3c_pm_save_gpios();
d2b07fe2	270	s3c_pm_save_uarts();
2261e0e6 BD	271	s3c_pm_save_core();
	272
	273	/* set the irq configuration for wake */
	274
	275	s3c_pm_configure_extint();
	276
	277	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	278	s3c_irqwake_intmask, s3c_irqwake_eintmask);
	279
	280	s3c_pm_arch_prepare_irqs();
	281
	282	/* call cpu specific preparation */
	283
	284	pm_cpu_prep();
	285
	286	/* flush cache back to ram */
	287
	288	flush_cache_all();
	289
	290	s3c_pm_check_store();
	291
	292	/* send the cpu to sleep... */
	293
	294	s3c_pm_arch_stop_clocks();
	295
	296	/* s3c2410_cpu_save will also act as our return point from when
	297	* we resume as it saves its own register state, so use the return
	298	* code to differentiate return from save and return from sleep */
	299
ef30e144	300	if (s3c_cpu_save(regs_save) == 0) {
2261e0e6	301	flush_cache_all();
ef30e144	302	S3C_PMDBG("preparing to sleep\n");
2261e0e6 BD	303	pm_cpu_sleep();
	304	}
	305
	306	/* restore the cpu state using the kernel's cpu init code. */
	307
	308	cpu_init();
	309
	310	/* restore the system state */
	311
	312	s3c_pm_restore_core();
d2b07fe2	313	s3c_pm_restore_uarts();
2261e0e6 BD	314	s3c_pm_restore_gpios();
	315
	316	s3c_pm_debug_init();
	317
	318	/* check what irq (if any) restored the system */
	319
	320	s3c_pm_arch_show_resume_irqs();
	321
	322	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
	323
	324	s3c_pm_check_restore();
	325
	326	/* ok, let's return from sleep */
	327
	328	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	329	return 0;
	330	}
	331
	332	static struct platform_suspend_ops s3c_pm_ops = {
	333	.enter = s3c_pm_enter,
	334	.valid = suspend_valid_only_mem,
	335	};
	336
4e59c25d	337	/* s3c_pm_init
2261e0e6 BD	338	*
	339	* Attach the power management functions. This should be called
	340	* from the board specific initialisation if the board supports
	341	* it.
	342	*/
	343
4e59c25d	344	int __init s3c_pm_init(void)
2261e0e6 BD	345	{
	346	printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
	347
	348	suspend_set_ops(&s3c_pm_ops);
	349	return 0;
	350	}