projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 65fa22b7 BD |
1 | /* linux/arch/arm/plat-s3c24xx/irq-om.c |
| 2 | * | |
| e02f8664 | 3 | * Copyright (c) 2003-2004 Simtec Electronics |
| 65fa22b7 BD |
4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ | |
| 6 | * | |
| 7 | * S3C24XX - IRQ PM code | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or modify | |
| 10 | * it under the terms of the GNU General Public License version 2 as | |
| 11 | * published by the Free Software Foundation. | |
| 12 | */ | |
| 13 | ||
| 14 | #include <linux/init.h> | |
| 15 | #include <linux/module.h> | |
| 16 | #include <linux/interrupt.h> | |
| 57436c2d | 17 | #include <linux/irq.h> |
| 65fa22b7 BD |
18 | |
| 19 | #include <plat/cpu.h> | |
| 20 | #include <plat/pm.h> | |
| 21 | #include <plat/irq.h> | |
| 22 | ||
| 57436c2d LB |
23 | #include <asm/irq.h> |
| 24 | ||
| 65fa22b7 BD |
25 | /* state for IRQs over sleep */ |
| 26 | ||
| 27 | /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources | |
| 28 | * | |
| 29 | * set bit to 1 in allow bitfield to enable the wakeup settings on it | |
| 30 | */ | |
| 31 | ||
| 32 | unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; | |
| 65fa22b7 | 33 | unsigned long s3c_irqwake_eintallow = 0x0000fff0L; |
| 65fa22b7 | 34 | |
| 57436c2d | 35 | int s3c_irq_wake(struct irq_data *data, unsigned int state) |
| 65fa22b7 | 36 | { |
| 57436c2d | 37 | unsigned long irqbit = 1 << (data->irq - IRQ_EINT0); |
| 65fa22b7 BD |
38 | |
| 39 | if (!(s3c_irqwake_intallow & irqbit)) | |
| 40 | return -ENOENT; | |
| 41 | ||
| 42 | printk(KERN_INFO "wake %s for irq %d\n", | |
| 57436c2d | 43 | state ? "enabled" : "disabled", data->irq); |
| 65fa22b7 BD |
44 | |
| 45 | if (!state) | |
| 46 | s3c_irqwake_intmask |= irqbit; | |
| 47 | else | |
| 48 | s3c_irqwake_intmask &= ~irqbit; | |
| 49 | ||
| 50 | return 0; | |
| 51 | } | |
| 52 | ||
| 65fa22b7 BD |
53 | static struct sleep_save irq_save[] = { |
| 54 | SAVE_ITEM(S3C2410_INTMSK), | |
| 55 | SAVE_ITEM(S3C2410_INTSUBMSK), | |
| 56 | }; | |
| 57 | ||
| 58 | /* the extint values move between the s3c2410/s3c2440 and the s3c2412 | |
| 59 | * so we use an array to hold them, and to calculate the address of | |
| 60 | * the register at run-time | |
| 61 | */ | |
| 62 | ||
| 63 | static unsigned long save_extint[3]; | |
| 64 | static unsigned long save_eintflt[4]; | |
| 65 | static unsigned long save_eintmask; | |
| 66 | ||
| bb072c3c | 67 | int s3c24xx_irq_suspend(void) |
| 65fa22b7 BD |
68 | { |
| 69 | unsigned int i; | |
| 70 | ||
| 71 | for (i = 0; i < ARRAY_SIZE(save_extint); i++) | |
| 72 | save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); | |
| 73 | ||
| 74 | for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) | |
| 75 | save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); | |
| 76 | ||
| 77 | s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); | |
| 78 | save_eintmask = __raw_readl(S3C24XX_EINTMASK); | |
| 79 | ||
| 80 | return 0; | |
| 81 | } | |
| 82 | ||
| bb072c3c | 83 | void s3c24xx_irq_resume(void) |
| 65fa22b7 BD |
84 | { |
| 85 | unsigned int i; | |
| 86 | ||
| 87 | for (i = 0; i < ARRAY_SIZE(save_extint); i++) | |
| 88 | __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); | |
| 89 | ||
| 90 | for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) | |
| 91 | __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); | |
| 92 | ||
| 93 | s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); | |
| 94 | __raw_writel(save_eintmask, S3C24XX_EINTMASK); | |
| 65fa22b7 | 95 | } |