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a21765a7 | 1 | /* linux/arch/arm/plat-s3c24xx/s3c244x.c |
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2 | * |
3 | * Copyright (c) 2004-2006 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
e4d06e39 | 6 | * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443) |
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7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
b6d1f542 | 19 | #include <linux/serial_core.h> |
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20 | #include <linux/platform_device.h> |
21 | #include <linux/sysdev.h> | |
22 | #include <linux/clk.h> | |
23 | ||
24 | #include <asm/mach/arch.h> | |
25 | #include <asm/mach/map.h> | |
26 | #include <asm/mach/irq.h> | |
27 | ||
28 | #include <asm/hardware.h> | |
29 | #include <asm/io.h> | |
30 | #include <asm/irq.h> | |
31 | ||
32 | #include <asm/arch/regs-clock.h> | |
531b617c | 33 | #include <asm/plat-s3c/regs-serial.h> |
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34 | #include <asm/arch/regs-gpio.h> |
35 | #include <asm/arch/regs-gpioj.h> | |
36 | #include <asm/arch/regs-dsc.h> | |
37 | ||
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38 | #include <asm/plat-s3c24xx/s3c2410.h> |
39 | #include <asm/plat-s3c24xx/s3c2440.h> | |
96ce2385 | 40 | #include "s3c244x.h" |
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41 | #include <asm/plat-s3c24xx/clock.h> |
42 | #include <asm/plat-s3c24xx/devs.h> | |
43 | #include <asm/plat-s3c24xx/cpu.h> | |
44 | #include <asm/plat-s3c24xx/pm.h> | |
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45 | |
46 | static struct map_desc s3c244x_iodesc[] __initdata = { | |
47 | IODESC_ENT(CLKPWR), | |
48 | IODESC_ENT(TIMER), | |
49 | IODESC_ENT(WATCHDOG), | |
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50 | }; |
51 | ||
52 | /* uart initialisation */ | |
53 | ||
54 | void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
55 | { | |
56 | s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); | |
57 | } | |
58 | ||
59 | void __init s3c244x_map_io(struct map_desc *mach_desc, int size) | |
60 | { | |
61 | /* register our io-tables */ | |
62 | ||
63 | iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc)); | |
64 | iotable_init(mach_desc, size); | |
65 | ||
66 | /* rename any peripherals used differing from the s3c2410 */ | |
67 | ||
68 | s3c_device_i2c.name = "s3c2440-i2c"; | |
69 | s3c_device_nand.name = "s3c2440-nand"; | |
b8ccca4a | 70 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; |
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71 | } |
72 | ||
73 | void __init s3c244x_init_clocks(int xtal) | |
74 | { | |
75 | unsigned long clkdiv; | |
76 | unsigned long camdiv; | |
77 | unsigned long hclk, fclk, pclk; | |
78 | int hdiv = 1; | |
79 | ||
80 | /* now we've got our machine bits initialised, work out what | |
81 | * clocks we've got */ | |
82 | ||
83 | fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; | |
84 | ||
85 | clkdiv = __raw_readl(S3C2410_CLKDIVN); | |
86 | camdiv = __raw_readl(S3C2440_CAMDIVN); | |
87 | ||
88 | /* work out clock scalings */ | |
89 | ||
90 | switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) { | |
91 | case S3C2440_CLKDIVN_HDIVN_1: | |
92 | hdiv = 1; | |
93 | break; | |
94 | ||
95 | case S3C2440_CLKDIVN_HDIVN_2: | |
96 | hdiv = 2; | |
97 | break; | |
98 | ||
99 | case S3C2440_CLKDIVN_HDIVN_4_8: | |
100 | hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4; | |
101 | break; | |
102 | ||
103 | case S3C2440_CLKDIVN_HDIVN_3_6: | |
104 | hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3; | |
105 | break; | |
106 | } | |
107 | ||
108 | hclk = fclk / hdiv; | |
109 | pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); | |
110 | ||
111 | /* print brief summary of clocks, etc */ | |
112 | ||
113 | printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", | |
114 | print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); | |
115 | ||
116 | /* initialise the clocks here, to allow other things like the | |
117 | * console to use them, and to add new ones after the initialisation | |
118 | */ | |
119 | ||
120 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); | |
99c13853 | 121 | s3c2410_baseclk_add(); |
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122 | } |
123 | ||
124 | #ifdef CONFIG_PM | |
125 | ||
126 | static struct sleep_save s3c244x_sleep[] = { | |
127 | SAVE_ITEM(S3C2440_DSC0), | |
128 | SAVE_ITEM(S3C2440_DSC1), | |
129 | SAVE_ITEM(S3C2440_GPJDAT), | |
130 | SAVE_ITEM(S3C2440_GPJCON), | |
131 | SAVE_ITEM(S3C2440_GPJUP) | |
132 | }; | |
133 | ||
134 | static int s3c244x_suspend(struct sys_device *dev, pm_message_t state) | |
135 | { | |
136 | s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); | |
137 | return 0; | |
138 | } | |
139 | ||
140 | static int s3c244x_resume(struct sys_device *dev) | |
141 | { | |
142 | s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); | |
143 | return 0; | |
144 | } | |
145 | ||
146 | #else | |
147 | #define s3c244x_suspend NULL | |
148 | #define s3c244x_resume NULL | |
149 | #endif | |
150 | ||
151 | /* Since the S3C2442 and S3C2440 share items, put both sysclasses here */ | |
152 | ||
153 | struct sysdev_class s3c2440_sysclass = { | |
af5ca3f4 | 154 | .name = "s3c2440-core", |
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155 | .suspend = s3c244x_suspend, |
156 | .resume = s3c244x_resume | |
157 | }; | |
158 | ||
159 | struct sysdev_class s3c2442_sysclass = { | |
af5ca3f4 | 160 | .name = "s3c2442-core", |
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161 | .suspend = s3c244x_suspend, |
162 | .resume = s3c244x_resume | |
163 | }; | |
164 | ||
165 | /* need to register class before we actually register the device, and | |
166 | * we also need to ensure that it has been initialised before any of the | |
167 | * drivers even try to use it (even if not on an s3c2440 based system) | |
168 | * as a driver which may support both 2410 and 2440 may try and use it. | |
169 | */ | |
170 | ||
171 | static int __init s3c2440_core_init(void) | |
172 | { | |
173 | return sysdev_class_register(&s3c2440_sysclass); | |
174 | } | |
175 | ||
176 | core_initcall(s3c2440_core_init); | |
177 | ||
178 | static int __init s3c2442_core_init(void) | |
179 | { | |
180 | return sysdev_class_register(&s3c2442_sysclass); | |
181 | } | |
182 | ||
183 | core_initcall(s3c2442_core_init); |