[deliverable/linux.git] / arch / arm / plat-s5p / irq-gpioint.c

/* linux/arch/arm/plat-s5p/irq-gpioint.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 * Author: Kyungmin Park <kyungmin.park@samsung.com>
 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
 * Author: Marek Szyprowski <m.szyprowski@samsung.com>
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 */

#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/gpio.h>

#include <mach/map.h>
#include <plat/gpio-core.h>
#include <plat/gpio-cfg.h>

#define S5P_GPIOREG(x)			(S5P_VA_GPIO + (x))

#define GPIOINT_CON_OFFSET		0x700
#define GPIOINT_MASK_OFFSET		0x900
#define GPIOINT_PEND_OFFSET		0xA00

#define GPIOINT_LEVEL_LOW		0x0
#define GPIOINT_LEVEL_HIGH		0x1
#define GPIOINT_EDGE_FALLING		0x2
#define GPIOINT_EDGE_RISING		0x3
#define GPIOINT_EDGE_BOTH		0x4

static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR];

static int s5p_gpioint_get_group(unsigned int irq)
{
	struct gpio_chip *chip = get_irq_data(irq);
	struct s3c_gpio_chip *s3c_chip = container_of(chip,
			struct s3c_gpio_chip, chip);
	int group;

	for (group = 0; group < S5P_GPIOINT_GROUP_MAXNR; group++)
		if (s3c_chip == irq_chips[group])
			break;

	return group;
}

static int s5p_gpioint_get_offset(unsigned int irq)
{
	struct gpio_chip *chip = get_irq_data(irq);
	struct s3c_gpio_chip *s3c_chip = container_of(chip,
			struct s3c_gpio_chip, chip);

	return irq - s3c_chip->irq_base;
}

static void s5p_gpioint_ack(unsigned int irq)
{
	int group, offset, pend_offset;
	unsigned int value;

	group = s5p_gpioint_get_group(irq);
	offset = s5p_gpioint_get_offset(irq);
	pend_offset = group << 2;

	value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
	value |= 1 << offset;
	__raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
}

static void s5p_gpioint_mask(unsigned int irq)
{
	int group, offset, mask_offset;
	unsigned int value;

	group = s5p_gpioint_get_group(irq);
	offset = s5p_gpioint_get_offset(irq);
	mask_offset = group << 2;

	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
	value |= 1 << offset;
	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
}

static void s5p_gpioint_unmask(unsigned int irq)
{
	int group, offset, mask_offset;
	unsigned int value;

	group = s5p_gpioint_get_group(irq);
	offset = s5p_gpioint_get_offset(irq);
	mask_offset = group << 2;

	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
	value &= ~(1 << offset);
	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
}

static void s5p_gpioint_mask_ack(unsigned int irq)
{
	s5p_gpioint_mask(irq);
	s5p_gpioint_ack(irq);
}

static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
{
	int group, offset, con_offset;
	unsigned int value;

	group = s5p_gpioint_get_group(irq);
	offset = s5p_gpioint_get_offset(irq);
	con_offset = group << 2;

	switch (type) {
	case IRQ_TYPE_EDGE_RISING:
		type = GPIOINT_EDGE_RISING;
		break;
	case IRQ_TYPE_EDGE_FALLING:
		type = GPIOINT_EDGE_FALLING;
		break;
	case IRQ_TYPE_EDGE_BOTH:
		type = GPIOINT_EDGE_BOTH;
		break;
	case IRQ_TYPE_LEVEL_HIGH:
		type = GPIOINT_LEVEL_HIGH;
		break;
	case IRQ_TYPE_LEVEL_LOW:
		type = GPIOINT_LEVEL_LOW;
		break;
	case IRQ_TYPE_NONE:
	default:
		printk(KERN_WARNING "No irq type\n");
		return -EINVAL;
	}

	value = __raw_readl(S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
	value &= ~(0x7 << (offset * 0x4));
	value |= (type << (offset * 0x4));
	__raw_writel(value, S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);

	return 0;
}

struct irq_chip s5p_gpioint = {
	.name		= "s5p_gpioint",
	.ack		= s5p_gpioint_ack,
	.mask		= s5p_gpioint_mask,
	.mask_ack	= s5p_gpioint_mask_ack,
	.unmask		= s5p_gpioint_unmask,
	.set_type	= s5p_gpioint_set_type,
};

static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
{
	int group, offset, pend_offset, mask_offset;
	int real_irq;
	unsigned int pend, mask;

	for (group = 0; group < S5P_GPIOINT_GROUP_MAXNR; group++) {
		pend_offset = group << 2;
		pend = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) +
				pend_offset);
		if (!pend)
			continue;

		mask_offset = group << 2;
		mask = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) +
				mask_offset);
		pend &= ~mask;

		for (offset = 0; offset < 8; offset++) {
			if (pend & (1 << offset)) {
				struct s3c_gpio_chip *chip = irq_chips[group];
				if (chip) {
					real_irq = chip->irq_base + offset;
					generic_handle_irq(real_irq);
				}
			}
		}
	}
}

static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
{
	static int used_gpioint_groups = 0;
	static bool handler_registered = 0;
	int irq, group = chip->group;
	int i;

	if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
		return -ENOMEM;

	chip->irq_base = S5P_GPIOINT_BASE +
			 used_gpioint_groups * S5P_GPIOINT_GROUP_SIZE;
	used_gpioint_groups++;

	if (!handler_registered) {
		set_irq_chained_handler(IRQ_GPIOINT, s5p_gpioint_handler);
		handler_registered = 1;
	}

	irq_chips[group] = chip;
	for (i = 0; i < chip->chip.ngpio; i++) {
		irq = chip->irq_base + i;
		set_irq_chip(irq, &s5p_gpioint);
		set_irq_data(irq, &chip->chip);
		set_irq_handler(irq, handle_level_irq);
		set_irq_flags(irq, IRQF_VALID);
	}
	return 0;
}

int __init s5p_register_gpio_interrupt(int pin)
{
	struct s3c_gpio_chip *my_chip = s3c_gpiolib_getchip(pin);
	int offset, group;
	int ret;

	if (!my_chip)
		return -EINVAL;

	offset = pin - my_chip->chip.base;
	group = my_chip->group;

	/* check if the group has been already registered */
	if (my_chip->irq_base)
		return my_chip->irq_base + offset;

	/* register gpio group */
	ret = s5p_gpioint_add(my_chip);
	if (ret == 0) {
		my_chip->chip.to_irq = samsung_gpiolib_to_irq;
		printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",
		       group);
		return my_chip->irq_base + offset;
	}
	return ret;
}
Commit	Line	Data
170a4617 MS	1	/* linux/arch/arm/plat-s5p/irq-gpioint.c
	2	*
	3	* Copyright (c) 2010 Samsung Electronics Co., Ltd.
	4	* Author: Kyungmin Park <kyungmin.park@samsung.com>
	5	* Author: Joonyoung Shim <jy0922.shim@samsung.com>
	6	* Author: Marek Szyprowski <m.szyprowski@samsung.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/interrupt.h>
	17	#include <linux/irq.h>
	18	#include <linux/io.h>
	19	#include <linux/gpio.h>
	20
	21	#include <mach/map.h>
	22	#include <plat/gpio-core.h>
	23	#include <plat/gpio-cfg.h>
	24
	25	#define S5P_GPIOREG(x) (S5P_VA_GPIO + (x))
	26
	27	#define GPIOINT_CON_OFFSET 0x700
	28	#define GPIOINT_MASK_OFFSET 0x900
	29	#define GPIOINT_PEND_OFFSET 0xA00
	30
	31	#define GPIOINT_LEVEL_LOW 0x0
	32	#define GPIOINT_LEVEL_HIGH 0x1
	33	#define GPIOINT_EDGE_FALLING 0x2
	34	#define GPIOINT_EDGE_RISING 0x3
	35	#define GPIOINT_EDGE_BOTH 0x4
	36
	37	static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR];
	38
	39	static int s5p_gpioint_get_group(unsigned int irq)
	40	{
	41	struct gpio_chip *chip = get_irq_data(irq);
	42	struct s3c_gpio_chip *s3c_chip = container_of(chip,
	43	struct s3c_gpio_chip, chip);
	44	int group;
	45
	46	for (group = 0; group < S5P_GPIOINT_GROUP_MAXNR; group++)
	47	if (s3c_chip == irq_chips[group])
	48	break;
	49
	50	return group;
	51	}
	52
	53	static int s5p_gpioint_get_offset(unsigned int irq)
	54	{
	55	struct gpio_chip *chip = get_irq_data(irq);
	56	struct s3c_gpio_chip *s3c_chip = container_of(chip,
	57	struct s3c_gpio_chip, chip);
	58
	59	return irq - s3c_chip->irq_base;
	60	}
	61
	62	static void s5p_gpioint_ack(unsigned int irq)
	63	{
	64	int group, offset, pend_offset;
65	unsigned int value;
66
67	group = s5p_gpioint_get_group(irq);
68	offset = s5p_gpioint_get_offset(irq);
69	pend_offset = group << 2;
70
71	value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
72	value \|= 1 << offset;
73	__raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
74	}
75
76	static void s5p_gpioint_mask(unsigned int irq)
77	{
78	int group, offset, mask_offset;
79	unsigned int value;
80
81	group = s5p_gpioint_get_group(irq);
82	offset = s5p_gpioint_get_offset(irq);
83	mask_offset = group << 2;
84
85	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
86	value \|= 1 << offset;
87	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
88	}
89
90	static void s5p_gpioint_unmask(unsigned int irq)
91	{
92	int group, offset, mask_offset;
93	unsigned int value;
94
95	group = s5p_gpioint_get_group(irq);
96	offset = s5p_gpioint_get_offset(irq);
97	mask_offset = group << 2;
98
99	value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
100	value &= ~(1 << offset);
101	__raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
102	}
103
104	static void s5p_gpioint_mask_ack(unsigned int irq)
105	{
106	s5p_gpioint_mask(irq);
107	s5p_gpioint_ack(irq);
108	}
109
110	static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
111	{
112	int group, offset, con_offset;
113	unsigned int value;
114
115	group = s5p_gpioint_get_group(irq);
116	offset = s5p_gpioint_get_offset(irq);
117	con_offset = group << 2;
118
119	switch (type) {
120	case IRQ_TYPE_EDGE_RISING:
121	type = GPIOINT_EDGE_RISING;
122	break;
123	case IRQ_TYPE_EDGE_FALLING:
124	type = GPIOINT_EDGE_FALLING;
125	break;
126	case IRQ_TYPE_EDGE_BOTH:
127	type = GPIOINT_EDGE_BOTH;
128	break;
129	case IRQ_TYPE_LEVEL_HIGH:
130	type = GPIOINT_LEVEL_HIGH;
131	break;
132	case IRQ_TYPE_LEVEL_LOW:
133	type = GPIOINT_LEVEL_LOW;
134	break;
135	case IRQ_TYPE_NONE:
136	default:
137	printk(KERN_WARNING "No irq type\n");
138	return -EINVAL;
139	}
140
141	value = __raw_readl(S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
142	value &= ~(0x7 << (offset * 0x4));
143	value \|= (type << (offset * 0x4));
144	__raw_writel(value, S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
145
146	return 0;
147	}
148
149	struct irq_chip s5p_gpioint = {
150	.name = "s5p_gpioint",
151	.ack = s5p_gpioint_ack,
152	.mask = s5p_gpioint_mask,
153	.mask_ack = s5p_gpioint_mask_ack,
154	.unmask = s5p_gpioint_unmask,
155	.set_type = s5p_gpioint_set_type,
156	};
157
158	static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
159	{
160	int group, offset, pend_offset, mask_offset;
161	int real_irq;
162	unsigned int pend, mask;
163
164	for (group = 0; group < S5P_GPIOINT_GROUP_MAXNR; group++) {
165	pend_offset = group << 2;
166	pend = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) +
167	pend_offset);
168	if (!pend)
169	continue;
170
171	mask_offset = group << 2;
172	mask = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) +
173	mask_offset);
174	pend &= ~mask;
175
176	for (offset = 0; offset < 8; offset++) {
177	if (pend & (1 << offset)) {
178	struct s3c_gpio_chip *chip = irq_chips[group];
179	if (chip) {
180	real_irq = chip->irq_base + offset;
181	generic_handle_irq(real_irq);
182	}
183	}
184	}
185	}
186	}
187
188	static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
189	{
190	static int used_gpioint_groups = 0;
191	static bool handler_registered = 0;
192	int irq, group = chip->group;
193	int i;
194
195	if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
196	return -ENOMEM;
197
198	chip->irq_base = S5P_GPIOINT_BASE +
199	used_gpioint_groups * S5P_GPIOINT_GROUP_SIZE;
200	used_gpioint_groups++;
201
202	if (!handler_registered) {
203	set_irq_chained_handler(IRQ_GPIOINT, s5p_gpioint_handler);
204	handler_registered = 1;
205	}
206
207	irq_chips[group] = chip;
208	for (i = 0; i < chip->chip.ngpio; i++) {
209	irq = chip->irq_base + i;
210	set_irq_chip(irq, &s5p_gpioint);
211	set_irq_data(irq, &chip->chip);
212	set_irq_handler(irq, handle_level_irq);
213	set_irq_flags(irq, IRQF_VALID);
214	}
215	return 0;
216	}
217
218	int __init s5p_register_gpio_interrupt(int pin)
219	{
220	struct s3c_gpio_chip *my_chip = s3c_gpiolib_getchip(pin);
221	int offset, group;
222	int ret;
223
224	if (!my_chip)
225	return -EINVAL;
226
227	offset = pin - my_chip->chip.base;
228	group = my_chip->group;
229
230	/* check if the group has been already registered */
231	if (my_chip->irq_base)
232	return my_chip->irq_base + offset;
233
234	/* register gpio group */
235	ret = s5p_gpioint_add(my_chip);
236	if (ret == 0) {
8ce14a22	237	my_chip->chip.to_irq = samsung_gpiolib_to_irq;
170a4617 MS	238	printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",
	239	group);
	240	return my_chip->irq_base + offset;
	241	}
	242	return ret;
	243	}