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ea31fd43 JL |
1 | /* linux/arch/arm/plat-s5p/irq-pm.c |
2 | * | |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Based on arch/arm/plat-s3c24xx/irq-pm.c, | |
7 | * Copyright (c) 2003,2004 Simtec Electronics | |
8 | * Ben Dooks <ben@simtec.co.uk> | |
9 | * http://armlinux.simtec.co.uk/ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/sysdev.h> | |
20 | ||
21 | #include <plat/cpu.h> | |
22 | #include <plat/irqs.h> | |
23 | #include <plat/pm.h> | |
24 | #include <mach/map.h> | |
25 | ||
26 | #include <mach/regs-gpio.h> | |
27 | #include <mach/regs-irq.h> | |
28 | ||
29 | /* state for IRQs over sleep */ | |
30 | ||
31 | /* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM, | |
32 | * as wakeup sources | |
33 | * | |
34 | * set bit to 1 in allow bitfield to enable the wakeup settings on it | |
35 | */ | |
36 | ||
37 | unsigned long s3c_irqwake_intallow = 0x00000006L; | |
38 | unsigned long s3c_irqwake_eintallow = 0xffffffffL; | |
39 | ||
bb0b2374 | 40 | int s3c_irq_wake(struct irq_data *data, unsigned int state) |
ea31fd43 JL |
41 | { |
42 | unsigned long irqbit; | |
43 | ||
bb0b2374 | 44 | switch (data->irq) { |
ea31fd43 JL |
45 | case IRQ_RTC_TIC: |
46 | case IRQ_RTC_ALARM: | |
bb0b2374 | 47 | irqbit = 1 << (data->irq + 1 - IRQ_RTC_ALARM); |
ea31fd43 JL |
48 | if (!state) |
49 | s3c_irqwake_intmask |= irqbit; | |
50 | else | |
51 | s3c_irqwake_intmask &= ~irqbit; | |
52 | break; | |
53 | default: | |
54 | return -ENOENT; | |
55 | } | |
56 | return 0; | |
57 | } | |
58 | ||
59 | static struct sleep_save eint_save[] = { | |
60 | SAVE_ITEM(S5P_EINT_CON(0)), | |
61 | SAVE_ITEM(S5P_EINT_CON(1)), | |
62 | SAVE_ITEM(S5P_EINT_CON(2)), | |
63 | SAVE_ITEM(S5P_EINT_CON(3)), | |
64 | ||
65 | SAVE_ITEM(S5P_EINT_FLTCON(0)), | |
66 | SAVE_ITEM(S5P_EINT_FLTCON(1)), | |
67 | SAVE_ITEM(S5P_EINT_FLTCON(2)), | |
68 | SAVE_ITEM(S5P_EINT_FLTCON(3)), | |
69 | SAVE_ITEM(S5P_EINT_FLTCON(4)), | |
70 | SAVE_ITEM(S5P_EINT_FLTCON(5)), | |
71 | SAVE_ITEM(S5P_EINT_FLTCON(6)), | |
72 | SAVE_ITEM(S5P_EINT_FLTCON(7)), | |
73 | ||
74 | SAVE_ITEM(S5P_EINT_MASK(0)), | |
75 | SAVE_ITEM(S5P_EINT_MASK(1)), | |
76 | SAVE_ITEM(S5P_EINT_MASK(2)), | |
77 | SAVE_ITEM(S5P_EINT_MASK(3)), | |
78 | }; | |
79 | ||
80 | int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) | |
81 | { | |
82 | s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save)); | |
83 | ||
84 | return 0; | |
85 | } | |
86 | ||
87 | int s3c24xx_irq_resume(struct sys_device *dev) | |
88 | { | |
89 | s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save)); | |
90 | ||
91 | return 0; | |
92 | } | |
93 |