Merge branch 'for-linus' of git://dev.laptop.org/users/cjb/mmc
[deliverable/linux.git] / arch / arm / plat-s5p / sysmmu.c
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1/* linux/arch/arm/plat-s5p/sysmmu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/io.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14
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15#include <asm/pgtable.h>
16
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17#include <mach/map.h>
18#include <mach/regs-sysmmu.h>
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19#include <plat/sysmmu.h>
20
21#define CTRL_ENABLE 0x5
22#define CTRL_BLOCK 0x7
23#define CTRL_DISABLE 0x0
24
25static struct device *dev;
26
27static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {
28 S5P_PAGE_FAULT_ADDR,
29 S5P_AR_FAULT_ADDR,
30 S5P_AW_FAULT_ADDR,
31 S5P_DEFAULT_SLAVE_ADDR,
32 S5P_AR_FAULT_ADDR,
33 S5P_AR_FAULT_ADDR,
34 S5P_AW_FAULT_ADDR,
35 S5P_AW_FAULT_ADDR
36};
b55f685e 37
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38static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
39 "PAGE FAULT",
40 "AR MULTI-HIT FAULT",
41 "AW MULTI-HIT FAULT",
42 "BUS ERROR",
43 "AR SECURITY PROTECTION FAULT",
44 "AR ACCESS PROTECTION FAULT",
45 "AW SECURITY PROTECTION FAULT",
46 "AW ACCESS PROTECTION FAULT"
47};
b55f685e 48
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49static int (*fault_handlers[S5P_SYSMMU_TOTAL_IPNUM])(
50 enum S5P_SYSMMU_INTERRUPT_TYPE itype,
51 unsigned long pgtable_base,
52 unsigned long fault_addr);
53
54/*
55 * If adjacent 2 bits are true, the system MMU is enabled.
56 * The system MMU is disabled, otherwise.
57 */
58static unsigned long sysmmu_states;
59
60static inline void set_sysmmu_active(sysmmu_ips ips)
b55f685e 61{
b34f003f 62 sysmmu_states |= 3 << (ips * 2);
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63}
64
b34f003f 65static inline void set_sysmmu_inactive(sysmmu_ips ips)
b55f685e 66{
b34f003f 67 sysmmu_states &= ~(3 << (ips * 2));
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68}
69
b34f003f 70static inline int is_sysmmu_active(sysmmu_ips ips)
b55f685e 71{
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72 return sysmmu_states & (3 << (ips * 2));
73}
b55f685e 74
b34f003f 75static void __iomem *sysmmusfrs[S5P_SYSMMU_TOTAL_IPNUM];
b55f685e 76
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77static inline void sysmmu_block(sysmmu_ips ips)
78{
79 __raw_writel(CTRL_BLOCK, sysmmusfrs[ips] + S5P_MMU_CTRL);
80 dev_dbg(dev, "%s is blocked.\n", sysmmu_ips_name[ips]);
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81}
82
b34f003f 83static inline void sysmmu_unblock(sysmmu_ips ips)
b55f685e 84{
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85 __raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
86 dev_dbg(dev, "%s is unblocked.\n", sysmmu_ips_name[ips]);
87}
b55f685e 88
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89static inline void __sysmmu_tlb_invalidate(sysmmu_ips ips)
90{
91 __raw_writel(0x1, sysmmusfrs[ips] + S5P_MMU_FLUSH);
92 dev_dbg(dev, "TLB of %s is invalidated.\n", sysmmu_ips_name[ips]);
93}
b55f685e 94
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95static inline void __sysmmu_set_ptbase(sysmmu_ips ips, unsigned long pgd)
96{
97 if (unlikely(pgd == 0)) {
98 pgd = (unsigned long)ZERO_PAGE(0);
99 __raw_writel(0x20, sysmmusfrs[ips] + S5P_MMU_CFG); /* 4KB LV1 */
100 } else {
101 __raw_writel(0x0, sysmmusfrs[ips] + S5P_MMU_CFG); /* 16KB LV1 */
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102 }
103
b34f003f 104 __raw_writel(pgd, sysmmusfrs[ips] + S5P_PT_BASE_ADDR);
b55f685e 105
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106 dev_dbg(dev, "Page table base of %s is initialized with 0x%08lX.\n",
107 sysmmu_ips_name[ips], pgd);
108 __sysmmu_tlb_invalidate(ips);
109}
b55f685e 110
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111void sysmmu_set_fault_handler(sysmmu_ips ips,
112 int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
113 unsigned long pgtable_base,
114 unsigned long fault_addr))
115{
116 BUG_ON(!((ips >= SYSMMU_MDMA) && (ips < S5P_SYSMMU_TOTAL_IPNUM)));
117 fault_handlers[ips] = handler;
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118}
119
b34f003f 120static irqreturn_t s5p_sysmmu_irq(int irq, void *dev_id)
b55f685e 121{
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122 /* SYSMMU is in blocked when interrupt occurred. */
123 unsigned long base = 0;
124 sysmmu_ips ips = (sysmmu_ips)dev_id;
125 enum S5P_SYSMMU_INTERRUPT_TYPE itype;
b55f685e 126
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127 itype = (enum S5P_SYSMMU_INTERRUPT_TYPE)
128 __ffs(__raw_readl(sysmmusfrs[ips] + S5P_INT_STATUS));
b55f685e 129
b34f003f 130 BUG_ON(!((itype >= 0) && (itype < 8)));
b55f685e 131
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132 dev_alert(dev, "%s occurred by %s.\n", sysmmu_fault_name[itype],
133 sysmmu_ips_name[ips]);
b55f685e 134
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135 if (fault_handlers[ips]) {
136 unsigned long addr;
b55f685e 137
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138 base = __raw_readl(sysmmusfrs[ips] + S5P_PT_BASE_ADDR);
139 addr = __raw_readl(sysmmusfrs[ips] + fault_reg_offset[itype]);
b55f685e 140
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141 if (fault_handlers[ips](itype, base, addr)) {
142 __raw_writel(1 << itype,
143 sysmmusfrs[ips] + S5P_INT_CLEAR);
144 dev_notice(dev, "%s from %s is resolved."
145 " Retrying translation.\n",
146 sysmmu_fault_name[itype], sysmmu_ips_name[ips]);
147 } else {
148 base = 0;
149 }
150 }
b55f685e 151
b34f003f 152 sysmmu_unblock(ips);
b55f685e 153
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154 if (!base)
155 dev_notice(dev, "%s from %s is not handled.\n",
156 sysmmu_fault_name[itype], sysmmu_ips_name[ips]);
b55f685e 157
b34f003f 158 return IRQ_HANDLED;
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159}
160
b34f003f 161void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd)
b55f685e 162{
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163 if (is_sysmmu_active(ips)) {
164 sysmmu_block(ips);
165 __sysmmu_set_ptbase(ips, pgd);
166 sysmmu_unblock(ips);
167 } else {
168 dev_dbg(dev, "%s is disabled. "
169 "Skipping initializing page table base.\n",
170 sysmmu_ips_name[ips]);
b55f685e 171 }
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172}
173
b34f003f 174void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd)
b55f685e 175{
b34f003f 176 if (!is_sysmmu_active(ips)) {
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177 sysmmu_clk_enable(ips);
178
b34f003f 179 __sysmmu_set_ptbase(ips, pgd);
b55f685e 180
b34f003f 181 __raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
b55f685e 182
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183 set_sysmmu_active(ips);
184 dev_dbg(dev, "%s is enabled.\n", sysmmu_ips_name[ips]);
185 } else {
186 dev_dbg(dev, "%s is already enabled.\n", sysmmu_ips_name[ips]);
b55f685e 187 }
b34f003f 188}
b55f685e 189
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190void s5p_sysmmu_disable(sysmmu_ips ips)
191{
192 if (is_sysmmu_active(ips)) {
193 __raw_writel(CTRL_DISABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
194 set_sysmmu_inactive(ips);
b0b6ff0b 195 sysmmu_clk_disable(ips);
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196 dev_dbg(dev, "%s is disabled.\n", sysmmu_ips_name[ips]);
197 } else {
198 dev_dbg(dev, "%s is already disabled.\n", sysmmu_ips_name[ips]);
199 }
200}
b55f685e 201
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202void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips)
203{
204 if (is_sysmmu_active(ips)) {
205 sysmmu_block(ips);
206 __sysmmu_tlb_invalidate(ips);
207 sysmmu_unblock(ips);
208 } else {
209 dev_dbg(dev, "%s is disabled. "
210 "Skipping invalidating TLB.\n", sysmmu_ips_name[ips]);
211 }
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212}
213
214static int s5p_sysmmu_probe(struct platform_device *pdev)
215{
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216 int i, ret;
217 struct resource *res, *mem;
b55f685e 218
b34f003f 219 dev = &pdev->dev;
b55f685e 220
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221 for (i = 0; i < S5P_SYSMMU_TOTAL_IPNUM; i++) {
222 int irq;
b55f685e 223
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224 sysmmu_clk_init(dev, i);
225 sysmmu_clk_disable(i);
226
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227 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
228 if (!res) {
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229 dev_err(dev, "Failed to get the resource of %s.\n",
230 sysmmu_ips_name[i]);
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231 ret = -ENODEV;
232 goto err_res;
233 }
234
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235 mem = request_mem_region(res->start, resource_size(res),
236 pdev->name);
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237 if (!mem) {
238 dev_err(dev, "Failed to request the memory region of %s.\n",
239 sysmmu_ips_name[i]);
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240 ret = -EBUSY;
241 goto err_res;
242 }
243
28f65c11 244 sysmmusfrs[i] = ioremap(res->start, resource_size(res));
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245 if (!sysmmusfrs[i]) {
246 dev_err(dev, "Failed to ioremap() for %s.\n",
247 sysmmu_ips_name[i]);
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248 ret = -ENXIO;
249 goto err_reg;
250 }
251
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252 irq = platform_get_irq(pdev, i);
253 if (irq <= 0) {
254 dev_err(dev, "Failed to get the IRQ resource of %s.\n",
255 sysmmu_ips_name[i]);
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256 ret = -ENOENT;
257 goto err_map;
258 }
259
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260 if (request_irq(irq, s5p_sysmmu_irq, IRQF_DISABLED,
261 pdev->name, (void *)i)) {
262 dev_err(dev, "Failed to request IRQ for %s.\n",
263 sysmmu_ips_name[i]);
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264 ret = -ENOENT;
265 goto err_map;
266 }
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267 }
268
269 return 0;
270
b55f685e 271err_map:
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272 iounmap(sysmmusfrs[i]);
273err_reg:
274 release_mem_region(mem->start, resource_size(mem));
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275err_res:
276 return ret;
277}
278
279static int s5p_sysmmu_remove(struct platform_device *pdev)
280{
281 return 0;
282}
283int s5p_sysmmu_runtime_suspend(struct device *dev)
284{
285 return 0;
286}
287
288int s5p_sysmmu_runtime_resume(struct device *dev)
289{
290 return 0;
291}
292
293const struct dev_pm_ops s5p_sysmmu_pm_ops = {
294 .runtime_suspend = s5p_sysmmu_runtime_suspend,
295 .runtime_resume = s5p_sysmmu_runtime_resume,
296};
297
298static struct platform_driver s5p_sysmmu_driver = {
299 .probe = s5p_sysmmu_probe,
300 .remove = s5p_sysmmu_remove,
301 .driver = {
302 .owner = THIS_MODULE,
303 .name = "s5p-sysmmu",
304 .pm = &s5p_sysmmu_pm_ops,
305 }
306};
307
308static int __init s5p_sysmmu_init(void)
309{
310 return platform_driver_register(&s5p_sysmmu_driver);
311}
312arch_initcall(s5p_sysmmu_init);
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