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cf383678 BD |
1 | # arch/arm/plat-samsung/Kconfig |
2 | # | |
3 | # Copyright 2009 Simtec Electronics | |
4 | # | |
5 | # Licensed under GPLv2 | |
6 | ||
7 | config PLAT_SAMSUNG | |
8 | bool | |
2d4a3b76 | 9 | depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P |
ae5fa355 | 10 | select NO_IOPORT |
878ccdc1 | 11 | select GENERIC_IRQ_CHIP |
cf383678 BD |
12 | default y |
13 | help | |
14 | Base platform code for all Samsung SoC based systems | |
15 | ||
16 | if PLAT_SAMSUNG | |
17 | ||
89f1fa08 BD |
18 | # boot configurations |
19 | ||
20 | comment "Boot options" | |
21 | ||
22 | config S3C_BOOT_WATCHDOG | |
23 | bool "S3C Initialisation watchdog" | |
24 | depends on S3C2410_WATCHDOG | |
25 | help | |
26 | Say y to enable the watchdog during the kernel decompression | |
27 | stage. If the kernel fails to uncompress, then the watchdog | |
28 | will trigger a reset and the system should restart. | |
29 | ||
30 | config S3C_BOOT_ERROR_RESET | |
31 | bool "S3C Reboot on decompression error" | |
32 | help | |
33 | Say y here to use the watchdog to reset the system if the | |
34 | kernel decompressor detects an error during decompression. | |
35 | ||
36 | config S3C_BOOT_UART_FORCE_FIFO | |
37 | bool "Force UART FIFO on during boot process" | |
38 | default y | |
39 | help | |
40 | Say Y here to force the UART FIFOs on during the kernel | |
41 | uncompressor | |
42 | ||
43 | ||
44 | config S3C_LOWLEVEL_UART_PORT | |
45 | int "S3C UART to use for low-level messages" | |
46 | default 0 | |
47 | help | |
48 | Choice of which UART port to use for the low-level messages, | |
49 | such as the `Uncompressing...` at start time. The value of | |
50 | this configuration should be between zero and two. The port | |
51 | must have been initialised by the boot-loader before use. | |
52 | ||
33bf3327 KK |
53 | # timer options |
54 | ||
55 | config S5P_HRT | |
56 | bool | |
57 | select SAMSUNG_DEV_PWM | |
58 | help | |
59 | Use the High Resolution timer support | |
60 | ||
89f1fa08 BD |
61 | # clock options |
62 | ||
aa9ad6ad HW |
63 | config SAMSUNG_CLKSRC |
64 | bool | |
65 | help | |
66 | Select the clock code for the clksrc implementation | |
67 | used by newer systems such as the S3C64XX. | |
cf383678 | 68 | |
bf46aaea KK |
69 | config S5P_CLOCK |
70 | def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) | |
71 | help | |
72 | Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs | |
73 | ||
7162ba03 BD |
74 | # options for IRQ support |
75 | ||
76 | config SAMSUNG_IRQ_VIC_TIMER | |
77 | bool | |
78 | help | |
79 | Internal configuration to build the VIC timer interrupt code. | |
80 | ||
68ae8998 KK |
81 | config S5P_IRQ |
82 | def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) | |
83 | help | |
84 | Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs | |
85 | ||
86 | config S5P_EXT_INT | |
87 | bool | |
88 | help | |
89 | Use the external interrupts (other than GPIO interrupts.) | |
90 | Note: Do not choose this for S5P6440 and S5P6450. | |
91 | ||
92 | config S5P_GPIO_INT | |
93 | bool | |
94 | help | |
95 | Common code for the GPIO interrupts (other than external interrupts.) | |
96 | ||
4f830db9 BD |
97 | # options for gpio configuration support |
98 | ||
1f323cfd KK |
99 | config SAMSUNG_GPIOLIB_4BIT |
100 | bool | |
101 | help | |
102 | GPIOlib file contains the 4 bit modification functions for gpio | |
103 | configuration. GPIOlib shall be compiled only for S3C64XX and S5P | |
104 | series of processors. | |
105 | ||
4f830db9 BD |
106 | config S3C_GPIO_CFG_S3C64XX |
107 | bool | |
108 | help | |
109 | Internal configuration to enable S3C64XX style GPIO configuration | |
110 | functions. | |
111 | ||
838c6d49 MS |
112 | config S5P_GPIO_DRVSTR |
113 | bool | |
114 | help | |
115 | Internal configuration to get and set correct GPIO driver strength | |
116 | helper | |
117 | ||
85841bce KK |
118 | config SAMSUNG_GPIO_EXTRA |
119 | int "Number of additional GPIO pins" | |
4ff13995 MB |
120 | default 128 if SAMSUNG_GPIO_EXTRA128 |
121 | default 64 if SAMSUNG_GPIO_EXTRA64 | |
85841bce KK |
122 | default 0 |
123 | help | |
124 | Use additional GPIO space in addition to the GPIO's the SOC | |
125 | provides. This allows expanding the GPIO space for use with | |
126 | GPIO expanders. | |
127 | ||
4ff13995 MB |
128 | config SAMSUNG_GPIO_EXTRA64 |
129 | bool | |
130 | ||
131 | config SAMSUNG_GPIO_EXTRA128 | |
132 | bool | |
133 | ||
89f1fa08 BD |
134 | config S3C_GPIO_SPACE |
135 | int "Space between gpio banks" | |
136 | default 0 | |
137 | help | |
138 | Add a number of spare GPIO entries between each bank for debugging | |
139 | purposes. This allows any problems where an counter overflows from | |
140 | one bank to another to be caught, at the expense of using a little | |
141 | more memory. | |
142 | ||
143 | config S3C_GPIO_TRACK | |
144 | bool | |
145 | help | |
146 | Internal configuration option to enable the s3c specific gpio | |
147 | chip tracking if the platform requires it. | |
148 | ||
3929e1e7 MC |
149 | # ADC driver |
150 | ||
151 | config S3C_ADC | |
152 | bool "ADC common driver support" | |
153 | help | |
154 | Core support for the ADC block found in the Samsung SoC systems | |
155 | for drivers such as the touchscreen and hwmon to use to share | |
156 | this resource. | |
157 | ||
b6a60413 BD |
158 | # device definitions to compile in |
159 | ||
160 | config S3C_DEV_HSMMC | |
161 | bool | |
162 | help | |
163 | Compile in platform device definitions for HSMMC code | |
164 | ||
165 | config S3C_DEV_HSMMC1 | |
166 | bool | |
167 | help | |
168 | Compile in platform device definitions for HSMMC channel 1 | |
169 | ||
170 | config S3C_DEV_HSMMC2 | |
171 | bool | |
172 | help | |
173 | Compile in platform device definitions for HSMMC channel 2 | |
174 | ||
b3c674bc HL |
175 | config S3C_DEV_HSMMC3 |
176 | bool | |
177 | help | |
178 | Compile in platform device definitions for HSMMC channel 3 | |
179 | ||
6cd82ffe MC |
180 | config S3C_DEV_HWMON |
181 | bool | |
182 | help | |
183 | Compile in platform device definitions for HWMON | |
184 | ||
b6a60413 BD |
185 | config S3C_DEV_I2C1 |
186 | bool | |
187 | help | |
188 | Compile in platform device definitions for I2C channel 1 | |
189 | ||
c8d833bf MS |
190 | config S3C_DEV_I2C2 |
191 | bool | |
192 | help | |
193 | Compile in platform device definitions for I2C channel 2 | |
194 | ||
b7a98255 KP |
195 | config S3C_DEV_I2C3 |
196 | bool | |
197 | help | |
198 | Compile in platform device definition for I2C controller 3 | |
199 | ||
200 | config S3C_DEV_I2C4 | |
201 | bool | |
202 | help | |
203 | Compile in platform device definition for I2C controller 4 | |
204 | ||
205 | config S3C_DEV_I2C5 | |
206 | bool | |
207 | help | |
208 | Compile in platform device definition for I2C controller 5 | |
209 | ||
210 | config S3C_DEV_I2C6 | |
211 | bool | |
212 | help | |
213 | Compile in platform device definition for I2C controller 6 | |
214 | ||
215 | config S3C_DEV_I2C7 | |
216 | bool | |
217 | help | |
218 | Compile in platform device definition for I2C controller 7 | |
219 | ||
b6a60413 BD |
220 | config S3C_DEV_FB |
221 | bool | |
222 | help | |
223 | Compile in platform device definition for framebuffer | |
224 | ||
225 | config S3C_DEV_USB_HOST | |
226 | bool | |
227 | help | |
228 | Compile in platform device definition for USB host. | |
229 | ||
230 | config S3C_DEV_USB_HSOTG | |
231 | bool | |
232 | help | |
233 | Compile in platform device definition for USB high-speed OtG | |
234 | ||
e1d5c93e BG |
235 | config S3C_DEV_WDT |
236 | bool | |
b130d5c2 | 237 | default y if ARCH_S3C24XX |
e1d5c93e BG |
238 | help |
239 | Complie in platform device definition for Watchdog Timer | |
240 | ||
b6a60413 BD |
241 | config S3C_DEV_NAND |
242 | bool | |
243 | help | |
244 | Compile in platform device definition for NAND controller | |
245 | ||
999304be MS |
246 | config S3C_DEV_ONENAND |
247 | bool | |
248 | help | |
249 | Compile in platform device definition for OneNAND controller | |
250 | ||
adc0950c AD |
251 | config S3C_DEV_RTC |
252 | bool | |
253 | help | |
254 | Complie in platform device definition for RTC | |
255 | ||
4f7cdc38 NK |
256 | config SAMSUNG_DEV_ADC |
257 | bool | |
258 | help | |
259 | Compile in platform device definition for ADC controller | |
260 | ||
db90005b AK |
261 | config SAMSUNG_DEV_IDE |
262 | bool | |
263 | help | |
264 | Compile in platform device definitions for IDE | |
265 | ||
875a5937 | 266 | config S3C64XX_DEV_SPI0 |
4b4c6625 JB |
267 | bool |
268 | help | |
269 | Compile in platform device definitions for S3C64XX's type | |
875a5937 PV |
270 | SPI controller 0 |
271 | ||
272 | config S3C64XX_DEV_SPI1 | |
273 | bool | |
274 | help | |
275 | Compile in platform device definitions for S3C64XX's type | |
276 | SPI controller 1 | |
277 | ||
278 | config S3C64XX_DEV_SPI2 | |
279 | bool | |
280 | help | |
281 | Compile in platform device definitions for S3C64XX's type | |
282 | SPI controller 2 | |
4b4c6625 | 283 | |
2b6c02ab | 284 | config SAMSUNG_DEV_TS |
909de0d6 MC |
285 | bool |
286 | help | |
2b6c02ab | 287 | Common in platform device definitions for touchscreen device |
909de0d6 | 288 | |
995c48ad JS |
289 | config SAMSUNG_DEV_KEYPAD |
290 | bool | |
291 | help | |
292 | Compile in platform device definitions for keypad | |
293 | ||
2ce30137 BG |
294 | config SAMSUNG_DEV_PWM |
295 | bool | |
b130d5c2 | 296 | default y if ARCH_S3C24XX |
2ce30137 BG |
297 | help |
298 | Compile in platform device definition for PWM Timer | |
299 | ||
f00207b2 BG |
300 | config SAMSUNG_DEV_BACKLIGHT |
301 | bool | |
302 | depends on SAMSUNG_DEV_PWM | |
303 | help | |
304 | Compile in platform device definition LCD backlight with PWM Timer | |
305 | ||
2ce30137 BG |
306 | config S3C24XX_PWM |
307 | bool "PWM device support" | |
308 | select HAVE_PWM | |
309 | help | |
310 | Support for exporting the PWM timer blocks via the pwm device | |
311 | system | |
312 | ||
89f1fa08 BD |
313 | # DMA |
314 | ||
315 | config S3C_DMA | |
316 | bool | |
317 | help | |
318 | Internal configuration for S3C DMA core | |
319 | ||
aa0de00e | 320 | config SAMSUNG_DMADEV |
d800edeb | 321 | bool |
aa0de00e BK |
322 | select DMADEVICES |
323 | select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \ | |
324 | CPU_S5P6450 || CPU_S5P6440) | |
325 | select ARM_AMBA | |
d800edeb | 326 | help |
aa0de00e | 327 | Use DMA device engine for PL330 DMAC. |
d800edeb | 328 | |
8005745d BD |
329 | comment "Power management" |
330 | ||
331 | config SAMSUNG_PM_DEBUG | |
332 | bool "S3C2410 PM Suspend debug" | |
333 | depends on PM | |
334 | help | |
335 | Say Y here if you want verbose debugging from the PM Suspend and | |
336 | Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
337 | for more information. | |
338 | ||
339 | config S3C_PM_DEBUG_LED_SMDK | |
340 | bool "SMDK LED suspend/resume debugging" | |
341 | depends on PM && (MACH_SMDK6410) | |
342 | help | |
343 | Say Y here to enable the use of the SMDK LEDs on the baseboard | |
344 | for debugging of the state of the suspend and resume process. | |
345 | ||
346 | Note, this currently only works for S3C64XX based SMDK boards. | |
347 | ||
348 | config SAMSUNG_PM_CHECK | |
349 | bool "S3C2410 PM Suspend Memory CRC" | |
350 | depends on PM && CRC32 | |
351 | help | |
352 | Enable the PM code's memory area checksum over sleep. This option | |
353 | will generate CRCs of all blocks of memory, and store them before | |
354 | going to sleep. The blocks are then checked on resume for any | |
355 | errors. | |
356 | ||
357 | Note, this can take several seconds depending on memory size | |
358 | and CPU speed. | |
359 | ||
360 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
361 | ||
362 | config SAMSUNG_PM_CHECK_CHUNKSIZE | |
363 | int "S3C2410 PM Suspend CRC Chunksize (KiB)" | |
364 | depends on PM && SAMSUNG_PM_CHECK | |
365 | default 64 | |
366 | help | |
367 | Set the chunksize in Kilobytes of the CRC for checking memory | |
368 | corruption over suspend and resume. A smaller value will mean that | |
369 | the CRC data block will take more memory, but wil identify any | |
370 | faults with better precision. | |
371 | ||
372 | See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> | |
373 | ||
0317e52e BD |
374 | config SAMSUNG_WAKEMASK |
375 | bool | |
376 | depends on PM | |
377 | help | |
378 | Compile support for wakeup-mask controls found on the S3C6400 | |
379 | and above. This code allows a set of interrupt to wakeup-mask | |
380 | mappings. See <plat/wakeup-mask.h> | |
381 | ||
8eadcf74 KK |
382 | config S5P_PM |
383 | bool | |
384 | help | |
385 | Common code for power management support on S5P and newer SoCs | |
386 | Note: Do not select this for S5P6440 and S5P6450. | |
387 | ||
388 | config S5P_SLEEP | |
389 | bool | |
390 | help | |
391 | Internal config node to apply common S5P sleep management code. | |
392 | Can be selected by S5P and newer SoCs with similar sleep procedure. | |
393 | ||
d930596a CY |
394 | comment "Power Domain" |
395 | ||
396 | config SAMSUNG_PD | |
397 | bool "Samsung Power Domain" | |
398 | depends on PM_RUNTIME | |
399 | help | |
400 | Say Y here if you want to control Power Domain by Runtime PM. | |
401 | ||
952aeeb2 WD |
402 | config DEBUG_S3C_UART |
403 | depends on PLAT_SAMSUNG | |
404 | int | |
405 | default "0" if DEBUG_S3C_UART0 | |
406 | default "1" if DEBUG_S3C_UART1 | |
407 | default "2" if DEBUG_S3C_UART2 | |
408 | ||
cf383678 | 409 | endif |