Commit | Line | Data |
---|---|---|
3929e1e7 | 1 | /* arch/arm/plat-samsung/adc.c |
28ab44c5 BD |
2 | * |
3 | * Copyright (c) 2008 Simtec Electronics | |
4 | * http://armlinux.simtec.co.uk/ | |
5 | * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> | |
6 | * | |
3929e1e7 | 7 | * Samsung ADC device core |
28ab44c5 BD |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/platform_device.h> | |
d43c36dc | 17 | #include <linux/sched.h> |
28ab44c5 | 18 | #include <linux/list.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
28ab44c5 BD |
20 | #include <linux/err.h> |
21 | #include <linux/clk.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/io.h> | |
24 | ||
25 | #include <plat/regs-adc.h> | |
26 | #include <plat/adc.h> | |
27 | ||
28 | /* This driver is designed to control the usage of the ADC block between | |
29 | * the touchscreen and any other drivers that may need to use it, such as | |
30 | * the hwmon driver. | |
31 | * | |
32 | * Priority will be given to the touchscreen driver, but as this itself is | |
33 | * rate limited it should not starve other requests which are processed in | |
34 | * order that they are received. | |
35 | * | |
36 | * Each user registers to get a client block which uniquely identifies it | |
37 | * and stores information such as the necessary functions to callback when | |
38 | * action is required. | |
39 | */ | |
40 | ||
bcedfa98 MC |
41 | enum s3c_cpu_type { |
42 | TYPE_S3C24XX, | |
43 | TYPE_S3C64XX | |
44 | }; | |
45 | ||
28ab44c5 BD |
46 | struct s3c_adc_client { |
47 | struct platform_device *pdev; | |
48 | struct list_head pend; | |
e170adcb | 49 | wait_queue_head_t *wait; |
28ab44c5 BD |
50 | |
51 | unsigned int nr_samples; | |
e170adcb | 52 | int result; |
28ab44c5 BD |
53 | unsigned char is_ts; |
54 | unsigned char channel; | |
55 | ||
e170adcb BD |
56 | void (*select_cb)(struct s3c_adc_client *c, unsigned selected); |
57 | void (*convert_cb)(struct s3c_adc_client *c, | |
58 | unsigned val1, unsigned val2, | |
3f7ea467 | 59 | unsigned *samples_left); |
28ab44c5 BD |
60 | }; |
61 | ||
62 | struct adc_device { | |
63 | struct platform_device *pdev; | |
64 | struct platform_device *owner; | |
65 | struct clk *clk; | |
66 | struct s3c_adc_client *cur; | |
67 | struct s3c_adc_client *ts_pend; | |
68 | void __iomem *regs; | |
1f1f584c | 69 | spinlock_t lock; |
28ab44c5 BD |
70 | |
71 | unsigned int prescale; | |
72 | ||
73 | int irq; | |
74 | }; | |
75 | ||
76 | static struct adc_device *adc_dev; | |
77 | ||
1f1f584c | 78 | static LIST_HEAD(adc_pending); /* protected by adc_device.lock */ |
28ab44c5 BD |
79 | |
80 | #define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) | |
81 | ||
82 | static inline void s3c_adc_convert(struct adc_device *adc) | |
83 | { | |
84 | unsigned con = readl(adc->regs + S3C2410_ADCCON); | |
85 | ||
86 | con |= S3C2410_ADCCON_ENABLE_START; | |
87 | writel(con, adc->regs + S3C2410_ADCCON); | |
88 | } | |
89 | ||
90 | static inline void s3c_adc_select(struct adc_device *adc, | |
91 | struct s3c_adc_client *client) | |
92 | { | |
93 | unsigned con = readl(adc->regs + S3C2410_ADCCON); | |
94 | ||
e170adcb | 95 | client->select_cb(client, 1); |
28ab44c5 BD |
96 | |
97 | con &= ~S3C2410_ADCCON_MUXMASK; | |
98 | con &= ~S3C2410_ADCCON_STDBM; | |
99 | con &= ~S3C2410_ADCCON_STARTMASK; | |
100 | ||
101 | if (!client->is_ts) | |
102 | con |= S3C2410_ADCCON_SELMUX(client->channel); | |
103 | ||
104 | writel(con, adc->regs + S3C2410_ADCCON); | |
105 | } | |
106 | ||
107 | static void s3c_adc_dbgshow(struct adc_device *adc) | |
108 | { | |
109 | adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n", | |
110 | readl(adc->regs + S3C2410_ADCCON), | |
111 | readl(adc->regs + S3C2410_ADCTSC), | |
112 | readl(adc->regs + S3C2410_ADCDLY)); | |
113 | } | |
114 | ||
f8c8ac81 | 115 | static void s3c_adc_try(struct adc_device *adc) |
28ab44c5 BD |
116 | { |
117 | struct s3c_adc_client *next = adc->ts_pend; | |
118 | ||
119 | if (!next && !list_empty(&adc_pending)) { | |
120 | next = list_first_entry(&adc_pending, | |
121 | struct s3c_adc_client, pend); | |
122 | list_del(&next->pend); | |
123 | } else | |
124 | adc->ts_pend = NULL; | |
125 | ||
126 | if (next) { | |
127 | adc_dbg(adc, "new client is %p\n", next); | |
128 | adc->cur = next; | |
129 | s3c_adc_select(adc, next); | |
130 | s3c_adc_convert(adc); | |
131 | s3c_adc_dbgshow(adc); | |
132 | } | |
133 | } | |
134 | ||
135 | int s3c_adc_start(struct s3c_adc_client *client, | |
136 | unsigned int channel, unsigned int nr_samples) | |
137 | { | |
138 | struct adc_device *adc = adc_dev; | |
139 | unsigned long flags; | |
140 | ||
141 | if (!adc) { | |
142 | printk(KERN_ERR "%s: failed to find adc\n", __func__); | |
143 | return -EINVAL; | |
144 | } | |
145 | ||
146 | if (client->is_ts && adc->ts_pend) | |
147 | return -EAGAIN; | |
148 | ||
1f1f584c | 149 | spin_lock_irqsave(&adc->lock, flags); |
28ab44c5 BD |
150 | |
151 | client->channel = channel; | |
152 | client->nr_samples = nr_samples; | |
153 | ||
154 | if (client->is_ts) | |
155 | adc->ts_pend = client; | |
156 | else | |
157 | list_add_tail(&client->pend, &adc_pending); | |
158 | ||
159 | if (!adc->cur) | |
160 | s3c_adc_try(adc); | |
1f1f584c BD |
161 | |
162 | spin_unlock_irqrestore(&adc->lock, flags); | |
28ab44c5 BD |
163 | |
164 | return 0; | |
165 | } | |
166 | EXPORT_SYMBOL_GPL(s3c_adc_start); | |
167 | ||
e170adcb BD |
168 | static void s3c_convert_done(struct s3c_adc_client *client, |
169 | unsigned v, unsigned u, unsigned *left) | |
170 | { | |
171 | client->result = v; | |
172 | wake_up(client->wait); | |
173 | } | |
174 | ||
175 | int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch) | |
176 | { | |
177 | DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake); | |
178 | int ret; | |
179 | ||
180 | client->convert_cb = s3c_convert_done; | |
181 | client->wait = &wake; | |
182 | client->result = -1; | |
183 | ||
184 | ret = s3c_adc_start(client, ch, 1); | |
185 | if (ret < 0) | |
186 | goto err; | |
187 | ||
188 | ret = wait_event_timeout(wake, client->result >= 0, HZ / 2); | |
189 | if (client->result < 0) { | |
190 | ret = -ETIMEDOUT; | |
191 | goto err; | |
192 | } | |
193 | ||
194 | client->convert_cb = NULL; | |
195 | return client->result; | |
196 | ||
197 | err: | |
198 | return ret; | |
199 | } | |
d3bf3956 | 200 | EXPORT_SYMBOL_GPL(s3c_adc_read); |
e170adcb BD |
201 | |
202 | static void s3c_adc_default_select(struct s3c_adc_client *client, | |
203 | unsigned select) | |
28ab44c5 BD |
204 | { |
205 | } | |
206 | ||
207 | struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev, | |
e170adcb BD |
208 | void (*select)(struct s3c_adc_client *client, |
209 | unsigned int selected), | |
210 | void (*conv)(struct s3c_adc_client *client, | |
211 | unsigned d0, unsigned d1, | |
3f7ea467 | 212 | unsigned *samples_left), |
28ab44c5 BD |
213 | unsigned int is_ts) |
214 | { | |
215 | struct s3c_adc_client *client; | |
216 | ||
217 | WARN_ON(!pdev); | |
28ab44c5 BD |
218 | |
219 | if (!select) | |
220 | select = s3c_adc_default_select; | |
221 | ||
e170adcb | 222 | if (!pdev) |
28ab44c5 BD |
223 | return ERR_PTR(-EINVAL); |
224 | ||
225 | client = kzalloc(sizeof(struct s3c_adc_client), GFP_KERNEL); | |
226 | if (!client) { | |
227 | dev_err(&pdev->dev, "no memory for adc client\n"); | |
228 | return ERR_PTR(-ENOMEM); | |
229 | } | |
230 | ||
231 | client->pdev = pdev; | |
232 | client->is_ts = is_ts; | |
233 | client->select_cb = select; | |
234 | client->convert_cb = conv; | |
235 | ||
236 | return client; | |
237 | } | |
238 | EXPORT_SYMBOL_GPL(s3c_adc_register); | |
239 | ||
240 | void s3c_adc_release(struct s3c_adc_client *client) | |
241 | { | |
1f1f584c BD |
242 | unsigned long flags; |
243 | ||
244 | spin_lock_irqsave(&adc_dev->lock, flags); | |
245 | ||
28ab44c5 | 246 | /* We should really check that nothing is in progress. */ |
0c3ee078 RL |
247 | if (adc_dev->cur == client) |
248 | adc_dev->cur = NULL; | |
249 | if (adc_dev->ts_pend == client) | |
250 | adc_dev->ts_pend = NULL; | |
251 | else { | |
252 | struct list_head *p, *n; | |
253 | struct s3c_adc_client *tmp; | |
254 | ||
255 | list_for_each_safe(p, n, &adc_pending) { | |
256 | tmp = list_entry(p, struct s3c_adc_client, pend); | |
257 | if (tmp == client) | |
258 | list_del(&tmp->pend); | |
259 | } | |
260 | } | |
261 | ||
262 | if (adc_dev->cur == NULL) | |
263 | s3c_adc_try(adc_dev); | |
1f1f584c BD |
264 | |
265 | spin_unlock_irqrestore(&adc_dev->lock, flags); | |
28ab44c5 BD |
266 | kfree(client); |
267 | } | |
268 | EXPORT_SYMBOL_GPL(s3c_adc_release); | |
269 | ||
270 | static irqreturn_t s3c_adc_irq(int irq, void *pw) | |
271 | { | |
272 | struct adc_device *adc = pw; | |
273 | struct s3c_adc_client *client = adc->cur; | |
91492b4a | 274 | enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; |
28ab44c5 BD |
275 | unsigned data0, data1; |
276 | ||
277 | if (!client) { | |
278 | dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__); | |
bcedfa98 | 279 | goto exit; |
28ab44c5 BD |
280 | } |
281 | ||
282 | data0 = readl(adc->regs + S3C2410_ADCDAT0); | |
283 | data1 = readl(adc->regs + S3C2410_ADCDAT1); | |
284 | adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1); | |
285 | ||
3f7ea467 | 286 | client->nr_samples--; |
e170adcb | 287 | |
91492b4a MC |
288 | if (cpu == TYPE_S3C64XX) { |
289 | /* S3C64XX ADC resolution is 12-bit */ | |
290 | data0 &= 0xfff; | |
291 | data1 &= 0xfff; | |
292 | } else { | |
293 | data0 &= 0x3ff; | |
294 | data1 &= 0x3ff; | |
295 | } | |
296 | ||
e170adcb | 297 | if (client->convert_cb) |
91492b4a | 298 | (client->convert_cb)(client, data0, data1, &client->nr_samples); |
28ab44c5 | 299 | |
3f7ea467 | 300 | if (client->nr_samples > 0) { |
28ab44c5 BD |
301 | /* fire another conversion for this */ |
302 | ||
e170adcb | 303 | client->select_cb(client, 1); |
28ab44c5 BD |
304 | s3c_adc_convert(adc); |
305 | } else { | |
1f1f584c | 306 | spin_lock(&adc->lock); |
e170adcb | 307 | (client->select_cb)(client, 0); |
28ab44c5 BD |
308 | adc->cur = NULL; |
309 | ||
310 | s3c_adc_try(adc); | |
1f1f584c | 311 | spin_unlock(&adc->lock); |
28ab44c5 BD |
312 | } |
313 | ||
bcedfa98 | 314 | exit: |
91492b4a | 315 | if (cpu == TYPE_S3C64XX) { |
bcedfa98 MC |
316 | /* Clear ADC interrupt */ |
317 | writel(0, adc->regs + S3C64XX_ADCCLRINT); | |
318 | } | |
28ab44c5 BD |
319 | return IRQ_HANDLED; |
320 | } | |
321 | ||
322 | static int s3c_adc_probe(struct platform_device *pdev) | |
323 | { | |
324 | struct device *dev = &pdev->dev; | |
325 | struct adc_device *adc; | |
326 | struct resource *regs; | |
327 | int ret; | |
91492b4a | 328 | unsigned tmp; |
28ab44c5 BD |
329 | |
330 | adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL); | |
331 | if (adc == NULL) { | |
332 | dev_err(dev, "failed to allocate adc_device\n"); | |
333 | return -ENOMEM; | |
334 | } | |
335 | ||
1f1f584c BD |
336 | spin_lock_init(&adc->lock); |
337 | ||
28ab44c5 BD |
338 | adc->pdev = pdev; |
339 | adc->prescale = S3C2410_ADCCON_PRSCVL(49); | |
340 | ||
341 | adc->irq = platform_get_irq(pdev, 1); | |
342 | if (adc->irq <= 0) { | |
343 | dev_err(dev, "failed to get adc irq\n"); | |
344 | ret = -ENOENT; | |
345 | goto err_alloc; | |
346 | } | |
347 | ||
348 | ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc); | |
349 | if (ret < 0) { | |
350 | dev_err(dev, "failed to attach adc irq\n"); | |
351 | goto err_alloc; | |
352 | } | |
353 | ||
354 | adc->clk = clk_get(dev, "adc"); | |
355 | if (IS_ERR(adc->clk)) { | |
356 | dev_err(dev, "failed to get adc clock\n"); | |
357 | ret = PTR_ERR(adc->clk); | |
358 | goto err_irq; | |
359 | } | |
360 | ||
361 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
362 | if (!regs) { | |
363 | dev_err(dev, "failed to find registers\n"); | |
364 | ret = -ENXIO; | |
365 | goto err_clk; | |
366 | } | |
367 | ||
368 | adc->regs = ioremap(regs->start, resource_size(regs)); | |
369 | if (!adc->regs) { | |
370 | dev_err(dev, "failed to map registers\n"); | |
371 | ret = -ENXIO; | |
372 | goto err_clk; | |
373 | } | |
374 | ||
375 | clk_enable(adc->clk); | |
376 | ||
91492b4a MC |
377 | tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; |
378 | if (platform_get_device_id(pdev)->driver_data == TYPE_S3C64XX) { | |
379 | /* Enable 12-bit ADC resolution */ | |
380 | tmp |= S3C64XX_ADCCON_RESSEL; | |
381 | } | |
382 | writel(tmp, adc->regs + S3C2410_ADCCON); | |
28ab44c5 BD |
383 | |
384 | dev_info(dev, "attached adc driver\n"); | |
385 | ||
386 | platform_set_drvdata(pdev, adc); | |
387 | adc_dev = adc; | |
388 | ||
389 | return 0; | |
390 | ||
391 | err_clk: | |
392 | clk_put(adc->clk); | |
393 | ||
394 | err_irq: | |
395 | free_irq(adc->irq, adc); | |
396 | ||
397 | err_alloc: | |
398 | kfree(adc); | |
399 | return ret; | |
400 | } | |
401 | ||
ad4e22fa | 402 | static int __devexit s3c_adc_remove(struct platform_device *pdev) |
28ab44c5 BD |
403 | { |
404 | struct adc_device *adc = platform_get_drvdata(pdev); | |
405 | ||
406 | iounmap(adc->regs); | |
407 | free_irq(adc->irq, adc); | |
408 | clk_disable(adc->clk); | |
409 | clk_put(adc->clk); | |
410 | kfree(adc); | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
415 | #ifdef CONFIG_PM | |
416 | static int s3c_adc_suspend(struct platform_device *pdev, pm_message_t state) | |
417 | { | |
418 | struct adc_device *adc = platform_get_drvdata(pdev); | |
1f1f584c | 419 | unsigned long flags; |
28ab44c5 BD |
420 | u32 con; |
421 | ||
1f1f584c BD |
422 | spin_lock_irqsave(&adc->lock, flags); |
423 | ||
28ab44c5 BD |
424 | con = readl(adc->regs + S3C2410_ADCCON); |
425 | con |= S3C2410_ADCCON_STDBM; | |
426 | writel(con, adc->regs + S3C2410_ADCCON); | |
427 | ||
a0af8b3c | 428 | disable_irq(adc->irq); |
1f1f584c | 429 | spin_unlock_irqrestore(&adc->lock, flags); |
28ab44c5 BD |
430 | clk_disable(adc->clk); |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
435 | static int s3c_adc_resume(struct platform_device *pdev) | |
436 | { | |
437 | struct adc_device *adc = platform_get_drvdata(pdev); | |
438 | ||
439 | clk_enable(adc->clk); | |
a0af8b3c | 440 | enable_irq(adc->irq); |
28ab44c5 BD |
441 | |
442 | writel(adc->prescale | S3C2410_ADCCON_PRSCEN, | |
443 | adc->regs + S3C2410_ADCCON); | |
444 | ||
445 | return 0; | |
446 | } | |
447 | ||
448 | #else | |
449 | #define s3c_adc_suspend NULL | |
450 | #define s3c_adc_resume NULL | |
451 | #endif | |
452 | ||
bcedfa98 MC |
453 | static struct platform_device_id s3c_adc_driver_ids[] = { |
454 | { | |
455 | .name = "s3c24xx-adc", | |
456 | .driver_data = TYPE_S3C24XX, | |
457 | }, { | |
458 | .name = "s3c64xx-adc", | |
459 | .driver_data = TYPE_S3C64XX, | |
460 | }, | |
461 | { } | |
462 | }; | |
463 | MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids); | |
464 | ||
28ab44c5 | 465 | static struct platform_driver s3c_adc_driver = { |
bcedfa98 | 466 | .id_table = s3c_adc_driver_ids, |
28ab44c5 | 467 | .driver = { |
bcedfa98 | 468 | .name = "s3c-adc", |
28ab44c5 BD |
469 | .owner = THIS_MODULE, |
470 | }, | |
471 | .probe = s3c_adc_probe, | |
472 | .remove = __devexit_p(s3c_adc_remove), | |
473 | .suspend = s3c_adc_suspend, | |
474 | .resume = s3c_adc_resume, | |
475 | }; | |
476 | ||
477 | static int __init adc_init(void) | |
478 | { | |
479 | int ret; | |
480 | ||
481 | ret = platform_driver_register(&s3c_adc_driver); | |
482 | if (ret) | |
483 | printk(KERN_ERR "%s: failed to add adc driver\n", __func__); | |
484 | ||
485 | return ret; | |
486 | } | |
487 | ||
488 | arch_initcall(adc_init); |