[deliverable/linux.git] / arch / arm / plat-samsung / adc.c

/* arch/arm/plat-samsung/adc.c
 *
 * Copyright (c) 2008 Simtec Electronics
 *	http://armlinux.simtec.co.uk/
 *	Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
 *
 * Samsung ADC device core
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
*/

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/regulator/consumer.h>

#include <plat/regs-adc.h>
#include <plat/adc.h>

/* This driver is designed to control the usage of the ADC block between
 * the touchscreen and any other drivers that may need to use it, such as
 * the hwmon driver.
 *
 * Priority will be given to the touchscreen driver, but as this itself is
 * rate limited it should not starve other requests which are processed in
 * order that they are received.
 *
 * Each user registers to get a client block which uniquely identifies it
 * and stores information such as the necessary functions to callback when
 * action is required.
 */

enum s3c_cpu_type {
	TYPE_ADCV1, /* S3C24XX */
	TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
	TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
};

struct s3c_adc_client {
	struct platform_device	*pdev;
	struct list_head	 pend;
	wait_queue_head_t	*wait;

	unsigned int		 nr_samples;
	int			 result;
	unsigned char		 is_ts;
	unsigned char		 channel;

	void	(*select_cb)(struct s3c_adc_client *c, unsigned selected);
	void	(*convert_cb)(struct s3c_adc_client *c,
			      unsigned val1, unsigned val2,
			      unsigned *samples_left);
};

struct adc_device {
	struct platform_device	*pdev;
	struct platform_device	*owner;
	struct clk		*clk;
	struct s3c_adc_client	*cur;
	struct s3c_adc_client	*ts_pend;
	void __iomem		*regs;
	spinlock_t		 lock;

	unsigned int		 prescale;

	int			 irq;
	struct regulator	*vdd;
};

static struct adc_device *adc_dev;

static LIST_HEAD(adc_pending);	/* protected by adc_device.lock */

#define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg)

static inline void s3c_adc_convert(struct adc_device *adc)
{
	unsigned con = readl(adc->regs + S3C2410_ADCCON);

	con |= S3C2410_ADCCON_ENABLE_START;
	writel(con, adc->regs + S3C2410_ADCCON);
}

static inline void s3c_adc_select(struct adc_device *adc,
				  struct s3c_adc_client *client)
{
	unsigned con = readl(adc->regs + S3C2410_ADCCON);
	enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;

	client->select_cb(client, 1);

	con &= ~S3C2410_ADCCON_MUXMASK;
	con &= ~S3C2410_ADCCON_STDBM;
	con &= ~S3C2410_ADCCON_STARTMASK;

	if (!client->is_ts) {
		if (cpu == TYPE_ADCV3)
			writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
		else
			con |= S3C2410_ADCCON_SELMUX(client->channel);
	}

	writel(con, adc->regs + S3C2410_ADCCON);
}

static void s3c_adc_dbgshow(struct adc_device *adc)
{
	adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n",
		readl(adc->regs + S3C2410_ADCCON),
		readl(adc->regs + S3C2410_ADCTSC),
		readl(adc->regs + S3C2410_ADCDLY));
}

static void s3c_adc_try(struct adc_device *adc)
{
	struct s3c_adc_client *next = adc->ts_pend;

	if (!next && !list_empty(&adc_pending)) {
		next = list_first_entry(&adc_pending,
					struct s3c_adc_client, pend);
		list_del(&next->pend);
	} else
		adc->ts_pend = NULL;

	if (next) {
		adc_dbg(adc, "new client is %p\n", next);
		adc->cur = next;
		s3c_adc_select(adc, next);
		s3c_adc_convert(adc);
		s3c_adc_dbgshow(adc);
	}
}

int s3c_adc_start(struct s3c_adc_client *client,
		  unsigned int channel, unsigned int nr_samples)
{
	struct adc_device *adc = adc_dev;
	unsigned long flags;

	if (!adc) {
		printk(KERN_ERR "%s: failed to find adc\n", __func__);
		return -EINVAL;
	}

	if (client->is_ts && adc->ts_pend)
		return -EAGAIN;

	spin_lock_irqsave(&adc->lock, flags);

	client->channel = channel;
	client->nr_samples = nr_samples;

	if (client->is_ts)
		adc->ts_pend = client;
	else
		list_add_tail(&client->pend, &adc_pending);

	if (!adc->cur)
		s3c_adc_try(adc);

	spin_unlock_irqrestore(&adc->lock, flags);

	return 0;
}
EXPORT_SYMBOL_GPL(s3c_adc_start);

static void s3c_convert_done(struct s3c_adc_client *client,
			     unsigned v, unsigned u, unsigned *left)
{
	client->result = v;
	wake_up(client->wait);
}

int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch)
{
	DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake);
	int ret;

	client->convert_cb = s3c_convert_done;
	client->wait = &wake;
	client->result = -1;

	ret = s3c_adc_start(client, ch, 1);
	if (ret < 0)
		goto err;

	ret = wait_event_timeout(wake, client->result >= 0, HZ / 2);
	if (client->result < 0) {
		ret = -ETIMEDOUT;
		goto err;
	}

	client->convert_cb = NULL;
	return client->result;

err:
	return ret;
}
EXPORT_SYMBOL_GPL(s3c_adc_read);

static void s3c_adc_default_select(struct s3c_adc_client *client,
				   unsigned select)
{
}

struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev,
					void (*select)(struct s3c_adc_client *client,
						       unsigned int selected),
					void (*conv)(struct s3c_adc_client *client,
						     unsigned d0, unsigned d1,
						     unsigned *samples_left),
					unsigned int is_ts)
{
	struct s3c_adc_client *client;

	WARN_ON(!pdev);

	if (!select)
		select = s3c_adc_default_select;

	if (!pdev)
		return ERR_PTR(-EINVAL);

	client = kzalloc(sizeof(struct s3c_adc_client), GFP_KERNEL);
	if (!client) {
		dev_err(&pdev->dev, "no memory for adc client\n");
		return ERR_PTR(-ENOMEM);
	}

	client->pdev = pdev;
	client->is_ts = is_ts;
	client->select_cb = select;
	client->convert_cb = conv;

	return client;
}
EXPORT_SYMBOL_GPL(s3c_adc_register);

void s3c_adc_release(struct s3c_adc_client *client)
{
	unsigned long flags;

	spin_lock_irqsave(&adc_dev->lock, flags);

	/* We should really check that nothing is in progress. */
	if (adc_dev->cur == client)
		adc_dev->cur = NULL;
	if (adc_dev->ts_pend == client)
		adc_dev->ts_pend = NULL;
	else {
		struct list_head *p, *n;
		struct s3c_adc_client *tmp;

		list_for_each_safe(p, n, &adc_pending) {
			tmp = list_entry(p, struct s3c_adc_client, pend);
			if (tmp == client)
				list_del(&tmp->pend);
		}
	}

	if (adc_dev->cur == NULL)
		s3c_adc_try(adc_dev);

	spin_unlock_irqrestore(&adc_dev->lock, flags);
	kfree(client);
}
EXPORT_SYMBOL_GPL(s3c_adc_release);

static irqreturn_t s3c_adc_irq(int irq, void *pw)
{
	struct adc_device *adc = pw;
	struct s3c_adc_client *client = adc->cur;
	enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
	unsigned data0, data1;

	if (!client) {
		dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
		goto exit;
	}

	data0 = readl(adc->regs + S3C2410_ADCDAT0);
	data1 = readl(adc->regs + S3C2410_ADCDAT1);
	adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1);

	client->nr_samples--;

	if (cpu != TYPE_ADCV1) {
		/* S3C64XX/S5P ADC resolution is 12-bit */
		data0 &= 0xfff;
		data1 &= 0xfff;
	} else {
		data0 &= 0x3ff;
		data1 &= 0x3ff;
	}

	if (client->convert_cb)
		(client->convert_cb)(client, data0, data1, &client->nr_samples);

	if (client->nr_samples > 0) {
		/* fire another conversion for this */

		client->select_cb(client, 1);
		s3c_adc_convert(adc);
	} else {
		spin_lock(&adc->lock);
		(client->select_cb)(client, 0);
		adc->cur = NULL;

		s3c_adc_try(adc);
		spin_unlock(&adc->lock);
	}

exit:
	if (cpu != TYPE_ADCV1) {
		/* Clear ADC interrupt */
		writel(0, adc->regs + S3C64XX_ADCCLRINT);
	}
	return IRQ_HANDLED;
}

static int s3c_adc_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct adc_device *adc;
	struct resource *regs;
	int ret;
	unsigned tmp;

	adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
	if (adc == NULL) {
		dev_err(dev, "failed to allocate adc_device\n");
		return -ENOMEM;
	}

	spin_lock_init(&adc->lock);

	adc->pdev = pdev;
	adc->prescale = S3C2410_ADCCON_PRSCVL(49);

	adc->vdd = regulator_get(dev, "vdd");
	if (IS_ERR(adc->vdd)) {
		dev_err(dev, "operating without regulator \"vdd\" .\n");
		ret = PTR_ERR(adc->vdd);
		goto err_alloc;
	}

	adc->irq = platform_get_irq(pdev, 1);
	if (adc->irq <= 0) {
		dev_err(dev, "failed to get adc irq\n");
		ret = -ENOENT;
		goto err_reg;
	}

	ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
	if (ret < 0) {
		dev_err(dev, "failed to attach adc irq\n");
		goto err_reg;
	}

	adc->clk = clk_get(dev, "adc");
	if (IS_ERR(adc->clk)) {
		dev_err(dev, "failed to get adc clock\n");
		ret = PTR_ERR(adc->clk);
		goto err_irq;
	}

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_err(dev, "failed to find registers\n");
		ret = -ENXIO;
		goto err_clk;
	}

	adc->regs = ioremap(regs->start, resource_size(regs));
	if (!adc->regs) {
		dev_err(dev, "failed to map registers\n");
		ret = -ENXIO;
		goto err_clk;
	}

	ret = regulator_enable(adc->vdd);
	if (ret)
		goto err_ioremap;

	clk_enable(adc->clk);

	tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
	if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) {
		/* Enable 12-bit ADC resolution */
		tmp |= S3C64XX_ADCCON_RESSEL;
	}
	writel(tmp, adc->regs + S3C2410_ADCCON);

	dev_info(dev, "attached adc driver\n");

	platform_set_drvdata(pdev, adc);
	adc_dev = adc;

	return 0;

 err_ioremap:
	iounmap(adc->regs);
 err_clk:
	clk_put(adc->clk);

 err_irq:
	free_irq(adc->irq, adc);
 err_reg:
	regulator_put(adc->vdd);
 err_alloc:
	kfree(adc);
	return ret;
}

static int __devexit s3c_adc_remove(struct platform_device *pdev)
{
	struct adc_device *adc = platform_get_drvdata(pdev);

	iounmap(adc->regs);
	free_irq(adc->irq, adc);
	clk_disable(adc->clk);
	regulator_disable(adc->vdd);
	regulator_put(adc->vdd);
	clk_put(adc->clk);
	kfree(adc);

	return 0;
}

#ifdef CONFIG_PM
static int s3c_adc_suspend(struct device *dev)
{
	struct platform_device *pdev = container_of(dev,
			struct platform_device, dev);
	struct adc_device *adc = platform_get_drvdata(pdev);
	unsigned long flags;
	u32 con;

	spin_lock_irqsave(&adc->lock, flags);

	con = readl(adc->regs + S3C2410_ADCCON);
	con |= S3C2410_ADCCON_STDBM;
	writel(con, adc->regs + S3C2410_ADCCON);

	disable_irq(adc->irq);
	spin_unlock_irqrestore(&adc->lock, flags);
	clk_disable(adc->clk);
	regulator_disable(adc->vdd);

	return 0;
}

static int s3c_adc_resume(struct device *dev)
{
	struct platform_device *pdev = container_of(dev,
			struct platform_device, dev);
	struct adc_device *adc = platform_get_drvdata(pdev);
	int ret;
	unsigned long tmp;

	ret = regulator_enable(adc->vdd);
	if (ret)
		return ret;
	clk_enable(adc->clk);
	enable_irq(adc->irq);

	tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
	/* Enable 12-bit ADC resolution */
	if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1)
		tmp |= S3C64XX_ADCCON_RESSEL;
	writel(tmp, adc->regs + S3C2410_ADCCON);

	return 0;
}

#else
#define s3c_adc_suspend NULL
#define s3c_adc_resume NULL
#endif

static struct platform_device_id s3c_adc_driver_ids[] = {
	{
		.name           = "s3c24xx-adc",
		.driver_data    = TYPE_ADCV1,
	}, {
		.name           = "s3c64xx-adc",
		.driver_data    = TYPE_ADCV2,
	}, {
		.name		= "samsung-adc-v3",
		.driver_data	= TYPE_ADCV3,
	},
	{ }
};
MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);

static const struct dev_pm_ops adc_pm_ops = {
	.suspend	= s3c_adc_suspend,
	.resume		= s3c_adc_resume,
};

static struct platform_driver s3c_adc_driver = {
	.id_table	= s3c_adc_driver_ids,
	.driver		= {
		.name	= "s3c-adc",
		.owner	= THIS_MODULE,
		.pm	= &adc_pm_ops,
	},
	.probe		= s3c_adc_probe,
	.remove		= __devexit_p(s3c_adc_remove),
};

static int __init adc_init(void)
{
	int ret;

	ret = platform_driver_register(&s3c_adc_driver);
	if (ret)
		printk(KERN_ERR "%s: failed to add adc driver\n", __func__);

	return ret;
}

module_init(adc_init);
Commit	Line	Data
3929e1e7	1	/* arch/arm/plat-samsung/adc.c
28ab44c5 BD	2	*
	3	* Copyright (c) 2008 Simtec Electronics
	4	* http://armlinux.simtec.co.uk/
	5	* Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
	6	*
3929e1e7	7	* Samsung ADC device core
28ab44c5 BD	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License.
	12	*/
	13
	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/platform_device.h>
d43c36dc	17	#include <linux/sched.h>
28ab44c5	18	#include <linux/list.h>
5a0e3ad6	19	#include <linux/slab.h>
28ab44c5 BD	20	#include <linux/err.h>
	21	#include <linux/clk.h>
	22	#include <linux/interrupt.h>
	23	#include <linux/io.h>
f462904e	24	#include <linux/regulator/consumer.h>
28ab44c5 BD	25
	26	#include <plat/regs-adc.h>
	27	#include <plat/adc.h>
	28
	29	/* This driver is designed to control the usage of the ADC block between
	30	* the touchscreen and any other drivers that may need to use it, such as
	31	* the hwmon driver.
	32	*
	33	* Priority will be given to the touchscreen driver, but as this itself is
	34	* rate limited it should not starve other requests which are processed in
	35	* order that they are received.
	36	*
	37	* Each user registers to get a client block which uniquely identifies it
	38	* and stores information such as the necessary functions to callback when
	39	* action is required.
	40	*/
	41
bcedfa98	42	enum s3c_cpu_type {
64df92ea MH	43	TYPE_ADCV1, /* S3C24XX */
	44	TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
	45	TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
bcedfa98 MC	46	};
bcedfa98 MC	47
28ab44c5 BD	48	struct s3c_adc_client {
	49	struct platform_device *pdev;
	50	struct list_head pend;
e170adcb	51	wait_queue_head_t *wait;
28ab44c5 BD	52
28ab44c5 BD	53	unsigned int nr_samples;
e170adcb	54	int result;
28ab44c5 BD	55	unsigned char is_ts;
	56	unsigned char channel;
	57
e170adcb BD	58	void (select_cb)(struct s3c_adc_client c, unsigned selected);
	59	void (convert_cb)(struct s3c_adc_client c,
	60	unsigned val1, unsigned val2,
3f7ea467	61	unsigned *samples_left);
28ab44c5 BD	62	};
	63
	64	struct adc_device {
	65	struct platform_device *pdev;
	66	struct platform_device *owner;
	67	struct clk *clk;
	68	struct s3c_adc_client *cur;
	69	struct s3c_adc_client *ts_pend;
	70	void __iomem *regs;
1f1f584c	71	spinlock_t lock;
28ab44c5 BD	72
	73	unsigned int prescale;
	74
	75	int irq;
f462904e	76	struct regulator *vdd;
28ab44c5 BD	77	};
	78
	79	static struct adc_device *adc_dev;
	80
1f1f584c	81	static LIST_HEAD(adc_pending); /* protected by adc_device.lock */
28ab44c5 BD	82
	83	#define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg)
	84
	85	static inline void s3c_adc_convert(struct adc_device *adc)
	86	{
	87	unsigned con = readl(adc->regs + S3C2410_ADCCON);
	88
	89	con \|= S3C2410_ADCCON_ENABLE_START;
	90	writel(con, adc->regs + S3C2410_ADCCON);
	91	}
	92
	93	static inline void s3c_adc_select(struct adc_device *adc,
	94	struct s3c_adc_client *client)
	95	{
	96	unsigned con = readl(adc->regs + S3C2410_ADCCON);
64df92ea	97	enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
28ab44c5	98
e170adcb	99	client->select_cb(client, 1);
28ab44c5 BD	100
	101	con &= ~S3C2410_ADCCON_MUXMASK;
	102	con &= ~S3C2410_ADCCON_STDBM;
	103	con &= ~S3C2410_ADCCON_STARTMASK;
	104
64df92ea MH	105	if (!client->is_ts) {
	106	if (cpu == TYPE_ADCV3)
	107	writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
	108	else
	109	con \|= S3C2410_ADCCON_SELMUX(client->channel);
	110	}
28ab44c5 BD	111
	112	writel(con, adc->regs + S3C2410_ADCCON);
	113	}
	114
	115	static void s3c_adc_dbgshow(struct adc_device *adc)
	116	{
	117	adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n",
	118	readl(adc->regs + S3C2410_ADCCON),
	119	readl(adc->regs + S3C2410_ADCTSC),
	120	readl(adc->regs + S3C2410_ADCDLY));
	121	}
	122
f8c8ac81	123	static void s3c_adc_try(struct adc_device *adc)
28ab44c5 BD	124	{
	125	struct s3c_adc_client *next = adc->ts_pend;
	126
	127	if (!next && !list_empty(&adc_pending)) {
	128	next = list_first_entry(&adc_pending,
	129	struct s3c_adc_client, pend);
	130	list_del(&next->pend);
	131	} else
	132	adc->ts_pend = NULL;
	133
	134	if (next) {
	135	adc_dbg(adc, "new client is %p\n", next);
	136	adc->cur = next;
	137	s3c_adc_select(adc, next);
	138	s3c_adc_convert(adc);
	139	s3c_adc_dbgshow(adc);
	140	}
	141	}
	142
	143	int s3c_adc_start(struct s3c_adc_client *client,
	144	unsigned int channel, unsigned int nr_samples)
	145	{
	146	struct adc_device *adc = adc_dev;
	147	unsigned long flags;
	148
	149	if (!adc) {
	150	printk(KERN_ERR "%s: failed to find adc\n", __func__);
	151	return -EINVAL;
	152	}
	153
	154	if (client->is_ts && adc->ts_pend)
	155	return -EAGAIN;
	156
1f1f584c	157	spin_lock_irqsave(&adc->lock, flags);
28ab44c5 BD	158
	159	client->channel = channel;
	160	client->nr_samples = nr_samples;
	161
	162	if (client->is_ts)
	163	adc->ts_pend = client;
	164	else
	165	list_add_tail(&client->pend, &adc_pending);
	166
	167	if (!adc->cur)
	168	s3c_adc_try(adc);
1f1f584c BD	169
1f1f584c BD	170	spin_unlock_irqrestore(&adc->lock, flags);
28ab44c5 BD	171
	172	return 0;
	173	}
	174	EXPORT_SYMBOL_GPL(s3c_adc_start);
	175
e170adcb BD	176	static void s3c_convert_done(struct s3c_adc_client *client,
	177	unsigned v, unsigned u, unsigned *left)
	178	{
	179	client->result = v;
	180	wake_up(client->wait);
	181	}
	182
	183	int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch)
	184	{
	185	DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake);
	186	int ret;
	187
	188	client->convert_cb = s3c_convert_done;
	189	client->wait = &wake;
	190	client->result = -1;
	191
	192	ret = s3c_adc_start(client, ch, 1);
	193	if (ret < 0)
	194	goto err;
	195
	196	ret = wait_event_timeout(wake, client->result >= 0, HZ / 2);
	197	if (client->result < 0) {
	198	ret = -ETIMEDOUT;
	199	goto err;
	200	}
	201
	202	client->convert_cb = NULL;
	203	return client->result;
	204
	205	err:
	206	return ret;
	207	}
d3bf3956	208	EXPORT_SYMBOL_GPL(s3c_adc_read);
e170adcb BD	209
	210	static void s3c_adc_default_select(struct s3c_adc_client *client,
	211	unsigned select)
28ab44c5 BD	212	{
	213	}
	214
	215	struct s3c_adc_client s3c_adc_register(struct platform_device pdev,
e170adcb BD	216	void (select)(struct s3c_adc_client client,
	217	unsigned int selected),
	218	void (conv)(struct s3c_adc_client client,
	219	unsigned d0, unsigned d1,
3f7ea467	220	unsigned *samples_left),
28ab44c5 BD	221	unsigned int is_ts)
	222	{
	223	struct s3c_adc_client *client;
	224
	225	WARN_ON(!pdev);
28ab44c5 BD	226
	227	if (!select)
	228	select = s3c_adc_default_select;
	229
e170adcb	230	if (!pdev)
28ab44c5 BD	231	return ERR_PTR(-EINVAL);
	232
	233	client = kzalloc(sizeof(struct s3c_adc_client), GFP_KERNEL);
	234	if (!client) {
	235	dev_err(&pdev->dev, "no memory for adc client\n");
	236	return ERR_PTR(-ENOMEM);
	237	}
	238
	239	client->pdev = pdev;
	240	client->is_ts = is_ts;
	241	client->select_cb = select;
	242	client->convert_cb = conv;
	243
	244	return client;
	245	}
	246	EXPORT_SYMBOL_GPL(s3c_adc_register);
	247
	248	void s3c_adc_release(struct s3c_adc_client *client)
	249	{
1f1f584c BD	250	unsigned long flags;
	251
	252	spin_lock_irqsave(&adc_dev->lock, flags);
	253
28ab44c5	254	/* We should really check that nothing is in progress. */
0c3ee078 RL	255	if (adc_dev->cur == client)
	256	adc_dev->cur = NULL;
	257	if (adc_dev->ts_pend == client)
	258	adc_dev->ts_pend = NULL;
	259	else {
	260	struct list_head p, n;
	261	struct s3c_adc_client *tmp;
	262
	263	list_for_each_safe(p, n, &adc_pending) {
	264	tmp = list_entry(p, struct s3c_adc_client, pend);
	265	if (tmp == client)
	266	list_del(&tmp->pend);
	267	}
	268	}
	269
	270	if (adc_dev->cur == NULL)
	271	s3c_adc_try(adc_dev);
1f1f584c BD	272
1f1f584c BD	273	spin_unlock_irqrestore(&adc_dev->lock, flags);
28ab44c5 BD	274	kfree(client);
	275	}
	276	EXPORT_SYMBOL_GPL(s3c_adc_release);
	277
	278	static irqreturn_t s3c_adc_irq(int irq, void *pw)
	279	{
	280	struct adc_device *adc = pw;
	281	struct s3c_adc_client *client = adc->cur;
91492b4a	282	enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data;
28ab44c5 BD	283	unsigned data0, data1;
	284
	285	if (!client) {
	286	dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__);
bcedfa98	287	goto exit;
28ab44c5 BD	288	}
	289
	290	data0 = readl(adc->regs + S3C2410_ADCDAT0);
	291	data1 = readl(adc->regs + S3C2410_ADCDAT1);
	292	adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1);
	293
3f7ea467	294	client->nr_samples--;
e170adcb	295
64df92ea MH	296	if (cpu != TYPE_ADCV1) {
64df92ea MH	297	/* S3C64XX/S5P ADC resolution is 12-bit */
91492b4a MC	298	data0 &= 0xfff;
	299	data1 &= 0xfff;
	300	} else {
	301	data0 &= 0x3ff;
	302	data1 &= 0x3ff;
	303	}
	304
e170adcb	305	if (client->convert_cb)
91492b4a	306	(client->convert_cb)(client, data0, data1, &client->nr_samples);
28ab44c5	307
3f7ea467	308	if (client->nr_samples > 0) {
28ab44c5 BD	309	/* fire another conversion for this */
28ab44c5 BD	310
e170adcb	311	client->select_cb(client, 1);
28ab44c5 BD	312	s3c_adc_convert(adc);
28ab44c5 BD	313	} else {
1f1f584c	314	spin_lock(&adc->lock);
e170adcb	315	(client->select_cb)(client, 0);
28ab44c5 BD	316	adc->cur = NULL;
	317
	318	s3c_adc_try(adc);
1f1f584c	319	spin_unlock(&adc->lock);
28ab44c5 BD	320	}
28ab44c5 BD	321
bcedfa98	322	exit:
64df92ea	323	if (cpu != TYPE_ADCV1) {
bcedfa98 MC	324	/* Clear ADC interrupt */
	325	writel(0, adc->regs + S3C64XX_ADCCLRINT);
	326	}
28ab44c5 BD	327	return IRQ_HANDLED;
	328	}
	329
	330	static int s3c_adc_probe(struct platform_device *pdev)
	331	{
	332	struct device *dev = &pdev->dev;
	333	struct adc_device *adc;
	334	struct resource *regs;
	335	int ret;
91492b4a	336	unsigned tmp;
28ab44c5 BD	337
	338	adc = kzalloc(sizeof(struct adc_device), GFP_KERNEL);
	339	if (adc == NULL) {
	340	dev_err(dev, "failed to allocate adc_device\n");
	341	return -ENOMEM;
	342	}
	343
1f1f584c BD	344	spin_lock_init(&adc->lock);
1f1f584c BD	345
28ab44c5 BD	346	adc->pdev = pdev;
	347	adc->prescale = S3C2410_ADCCON_PRSCVL(49);
	348
f462904e MH	349	adc->vdd = regulator_get(dev, "vdd");
	350	if (IS_ERR(adc->vdd)) {
	351	dev_err(dev, "operating without regulator \"vdd\" .\n");
	352	ret = PTR_ERR(adc->vdd);
	353	goto err_alloc;
	354	}
	355
28ab44c5 BD	356	adc->irq = platform_get_irq(pdev, 1);
	357	if (adc->irq <= 0) {
	358	dev_err(dev, "failed to get adc irq\n");
	359	ret = -ENOENT;
f462904e	360	goto err_reg;
28ab44c5 BD	361	}
	362
	363	ret = request_irq(adc->irq, s3c_adc_irq, 0, dev_name(dev), adc);
	364	if (ret < 0) {
	365	dev_err(dev, "failed to attach adc irq\n");
f462904e	366	goto err_reg;
28ab44c5 BD	367	}
	368
	369	adc->clk = clk_get(dev, "adc");
	370	if (IS_ERR(adc->clk)) {
	371	dev_err(dev, "failed to get adc clock\n");
	372	ret = PTR_ERR(adc->clk);
	373	goto err_irq;
	374	}
	375
	376	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	377	if (!regs) {
	378	dev_err(dev, "failed to find registers\n");
	379	ret = -ENXIO;
	380	goto err_clk;
	381	}
	382
	383	adc->regs = ioremap(regs->start, resource_size(regs));
	384	if (!adc->regs) {
	385	dev_err(dev, "failed to map registers\n");
	386	ret = -ENXIO;
	387	goto err_clk;
	388	}
	389
f462904e MH	390	ret = regulator_enable(adc->vdd);
	391	if (ret)
	392	goto err_ioremap;
	393
28ab44c5 BD	394	clk_enable(adc->clk);
28ab44c5 BD	395
91492b4a	396	tmp = adc->prescale \| S3C2410_ADCCON_PRSCEN;
64df92ea	397	if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) {
91492b4a MC	398	/* Enable 12-bit ADC resolution */
	399	tmp \|= S3C64XX_ADCCON_RESSEL;
	400	}
	401	writel(tmp, adc->regs + S3C2410_ADCCON);
28ab44c5 BD	402
	403	dev_info(dev, "attached adc driver\n");
	404
	405	platform_set_drvdata(pdev, adc);
	406	adc_dev = adc;
	407
	408	return 0;
	409
f462904e MH	410	err_ioremap:
f462904e MH	411	iounmap(adc->regs);
28ab44c5 BD	412	err_clk:
	413	clk_put(adc->clk);
	414
	415	err_irq:
	416	free_irq(adc->irq, adc);
f462904e MH	417	err_reg:
f462904e MH	418	regulator_put(adc->vdd);
28ab44c5 BD	419	err_alloc:
	420	kfree(adc);
	421	return ret;
	422	}
	423
ad4e22fa	424	static int __devexit s3c_adc_remove(struct platform_device *pdev)
28ab44c5 BD	425	{
	426	struct adc_device *adc = platform_get_drvdata(pdev);
	427
	428	iounmap(adc->regs);
	429	free_irq(adc->irq, adc);
	430	clk_disable(adc->clk);
f462904e MH	431	regulator_disable(adc->vdd);
f462904e MH	432	regulator_put(adc->vdd);
28ab44c5 BD	433	clk_put(adc->clk);
	434	kfree(adc);
	435
	436	return 0;
	437	}
	438
	439	#ifdef CONFIG_PM
67dcaec8	440	static int s3c_adc_suspend(struct device *dev)
28ab44c5	441	{
67dcaec8 MH	442	struct platform_device *pdev = container_of(dev,
67dcaec8 MH	443	struct platform_device, dev);
28ab44c5	444	struct adc_device *adc = platform_get_drvdata(pdev);
1f1f584c	445	unsigned long flags;
28ab44c5 BD	446	u32 con;
28ab44c5 BD	447
1f1f584c BD	448	spin_lock_irqsave(&adc->lock, flags);
1f1f584c BD	449
28ab44c5 BD	450	con = readl(adc->regs + S3C2410_ADCCON);
	451	con \|= S3C2410_ADCCON_STDBM;
	452	writel(con, adc->regs + S3C2410_ADCCON);
	453
a0af8b3c	454	disable_irq(adc->irq);
1f1f584c	455	spin_unlock_irqrestore(&adc->lock, flags);
28ab44c5	456	clk_disable(adc->clk);
f462904e	457	regulator_disable(adc->vdd);
28ab44c5 BD	458
	459	return 0;
	460	}
	461
67dcaec8	462	static int s3c_adc_resume(struct device *dev)
28ab44c5	463	{
67dcaec8 MH	464	struct platform_device *pdev = container_of(dev,
67dcaec8 MH	465	struct platform_device, dev);
28ab44c5	466	struct adc_device *adc = platform_get_drvdata(pdev);
f462904e	467	int ret;
67dcaec8	468	unsigned long tmp;
28ab44c5	469
f462904e MH	470	ret = regulator_enable(adc->vdd);
	471	if (ret)
	472	return ret;
28ab44c5	473	clk_enable(adc->clk);
a0af8b3c	474	enable_irq(adc->irq);
28ab44c5	475
67dcaec8 MH	476	tmp = adc->prescale \| S3C2410_ADCCON_PRSCEN;
	477	/* Enable 12-bit ADC resolution */
	478	if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1)
	479	tmp \|= S3C64XX_ADCCON_RESSEL;
	480	writel(tmp, adc->regs + S3C2410_ADCCON);
28ab44c5 BD	481
	482	return 0;
	483	}
	484
	485	#else
	486	#define s3c_adc_suspend NULL
	487	#define s3c_adc_resume NULL
	488	#endif
	489
bcedfa98 MC	490	static struct platform_device_id s3c_adc_driver_ids[] = {
	491	{
	492	.name = "s3c24xx-adc",
64df92ea	493	.driver_data = TYPE_ADCV1,
bcedfa98 MC	494	}, {
bcedfa98 MC	495	.name = "s3c64xx-adc",
64df92ea MH	496	.driver_data = TYPE_ADCV2,
	497	}, {
	498	.name = "samsung-adc-v3",
	499	.driver_data = TYPE_ADCV3,
bcedfa98 MC	500	},
	501	{ }
	502	};
	503	MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids);
	504
67dcaec8 MH	505	static const struct dev_pm_ops adc_pm_ops = {
	506	.suspend = s3c_adc_suspend,
	507	.resume = s3c_adc_resume,
	508	};
	509
28ab44c5	510	static struct platform_driver s3c_adc_driver = {
bcedfa98	511	.id_table = s3c_adc_driver_ids,
28ab44c5	512	.driver = {
bcedfa98	513	.name = "s3c-adc",
28ab44c5	514	.owner = THIS_MODULE,
67dcaec8	515	.pm = &adc_pm_ops,
28ab44c5 BD	516	},
	517	.probe = s3c_adc_probe,
	518	.remove = __devexit_p(s3c_adc_remove),
28ab44c5 BD	519	};
	520
	521	static int __init adc_init(void)
	522	{
	523	int ret;
	524
	525	ret = platform_driver_register(&s3c_adc_driver);
	526	if (ret)
	527	printk(KERN_ERR "%s: failed to add adc driver\n", __func__);
	528
	529	return ret;
	530	}
	531
f462904e	532	module_init(adc_init);