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61c542bf KK |
1 | /* linux/arch/arm/plat-samsung/devs.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Base SAMSUNG platform device definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
78843727 | 13 | #include <linux/amba/pl330.h> |
61c542bf KK |
14 | #include <linux/kernel.h> |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/serial_core.h> | |
334a1c70 | 21 | #include <linux/serial_s3c.h> |
61c542bf KK |
22 | #include <linux/platform_device.h> |
23 | #include <linux/io.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/dma-mapping.h> | |
57167149 KK |
27 | #include <linux/fb.h> |
28 | #include <linux/gfp.h> | |
0523ec3a KK |
29 | #include <linux/mtd/mtd.h> |
30 | #include <linux/mtd/onenand.h> | |
bad1e6aa KK |
31 | #include <linux/mtd/partitions.h> |
32 | #include <linux/mmc/host.h> | |
57167149 | 33 | #include <linux/ioport.h> |
2bb1ad17 | 34 | #include <linux/sizes.h> |
715a3e41 | 35 | #include <linux/platform_data/s3c-hsudc.h> |
126625e1 | 36 | #include <linux/platform_data/s3c-hsotg.h> |
7f99ef22 | 37 | #include <linux/platform_data/dma-s3c24xx.h> |
61c542bf | 38 | |
eb4b0ec7 | 39 | #include <linux/platform_data/media/s5p_hdmi.h> |
ee21ae68 | 40 | |
61c542bf KK |
41 | #include <asm/irq.h> |
42 | #include <asm/mach/arch.h> | |
43 | #include <asm/mach/map.h> | |
44 | #include <asm/mach/irq.h> | |
45 | ||
61c542bf KK |
46 | #include <mach/dma.h> |
47 | #include <mach/irqs.h> | |
48 | #include <mach/map.h> | |
49 | ||
50 | #include <plat/cpu.h> | |
51 | #include <plat/devs.h> | |
bad1e6aa | 52 | #include <plat/adc.h> |
436d42c6 | 53 | #include <linux/platform_data/ata-samsung_cf.h> |
61c542bf KK |
54 | #include <plat/fb.h> |
55 | #include <plat/fb-s3c2410.h> | |
436d42c6 AB |
56 | #include <linux/platform_data/hwmon-s3c.h> |
57 | #include <linux/platform_data/i2c-s3c2410.h> | |
bad1e6aa | 58 | #include <plat/keypad.h> |
436d42c6 AB |
59 | #include <linux/platform_data/mmc-s3cmci.h> |
60 | #include <linux/platform_data/mtd-nand-s3c2410.h> | |
95e43d46 | 61 | #include <plat/pwm-core.h> |
bad1e6aa | 62 | #include <plat/sdhci.h> |
436d42c6 AB |
63 | #include <linux/platform_data/touchscreen-s3c2410.h> |
64 | #include <linux/platform_data/usb-s3c2410_udc.h> | |
65 | #include <linux/platform_data/usb-ohci-s3c2410.h> | |
57167149 | 66 | #include <plat/usb-phy.h> |
61c542bf | 67 | #include <plat/regs-spi.h> |
b9a1a743 | 68 | #include <linux/platform_data/asoc-s3c.h> |
436d42c6 | 69 | #include <linux/platform_data/spi-s3c64xx.h> |
61c542bf KK |
70 | |
71 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | |
72 | ||
73 | /* AC97 */ | |
74 | #ifdef CONFIG_CPU_S3C2440 | |
75 | static struct resource s3c_ac97_resource[] = { | |
e663cb76 KK |
76 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), |
77 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), | |
b9a1a743 AB |
78 | }; |
79 | ||
80 | static struct s3c_audio_pdata s3c_ac97_pdata = { | |
9bdca822 AB |
81 | #ifdef CONFIG_S3C24XX_DMAC |
82 | .dma_filter = s3c24xx_dma_filter, | |
83 | #endif | |
b9a1a743 AB |
84 | .dma_playback = (void *)DMACH_PCM_OUT, |
85 | .dma_capture = (void *)DMACH_PCM_IN, | |
86 | .dma_capture_mic = (void *)DMACH_MIC_IN, | |
61c542bf KK |
87 | }; |
88 | ||
89 | struct platform_device s3c_device_ac97 = { | |
90 | .name = "samsung-ac97", | |
91 | .id = -1, | |
92 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | |
93 | .resource = s3c_ac97_resource, | |
94 | .dev = { | |
95 | .dma_mask = &samsung_device_dma_mask, | |
96 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
b9a1a743 | 97 | .platform_data = &s3c_ac97_pdata, |
61c542bf KK |
98 | } |
99 | }; | |
100 | #endif /* CONFIG_CPU_S3C2440 */ | |
101 | ||
102 | /* ADC */ | |
103 | ||
104 | #ifdef CONFIG_PLAT_S3C24XX | |
105 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
106 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
107 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
108 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
61c542bf KK |
109 | }; |
110 | ||
111 | struct platform_device s3c_device_adc = { | |
112 | .name = "s3c24xx-adc", | |
113 | .id = -1, | |
114 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
115 | .resource = s3c_adc_resource, | |
116 | }; | |
117 | #endif /* CONFIG_PLAT_S3C24XX */ | |
118 | ||
bad1e6aa KK |
119 | #if defined(CONFIG_SAMSUNG_DEV_ADC) |
120 | static struct resource s3c_adc_resource[] = { | |
e663cb76 | 121 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
a829ae57 AB |
122 | [1] = DEFINE_RES_IRQ(IRQ_ADC), |
123 | [2] = DEFINE_RES_IRQ(IRQ_TC), | |
bad1e6aa KK |
124 | }; |
125 | ||
126 | struct platform_device s3c_device_adc = { | |
a829ae57 | 127 | .name = "exynos-adc", |
bad1e6aa KK |
128 | .id = -1, |
129 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
130 | .resource = s3c_adc_resource, | |
131 | }; | |
132 | #endif /* CONFIG_SAMSUNG_DEV_ADC */ | |
133 | ||
61c542bf KK |
134 | /* Camif Controller */ |
135 | ||
136 | #ifdef CONFIG_CPU_S3C2440 | |
137 | static struct resource s3c_camif_resource[] = { | |
e663cb76 | 138 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), |
705c75e3 SN |
139 | [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), |
140 | [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), | |
61c542bf KK |
141 | }; |
142 | ||
143 | struct platform_device s3c_device_camif = { | |
144 | .name = "s3c2440-camif", | |
145 | .id = -1, | |
146 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | |
147 | .resource = s3c_camif_resource, | |
148 | .dev = { | |
149 | .dma_mask = &samsung_device_dma_mask, | |
150 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
151 | } | |
152 | }; | |
153 | #endif /* CONFIG_CPU_S3C2440 */ | |
154 | ||
bad1e6aa KK |
155 | /* FB */ |
156 | ||
157 | #ifdef CONFIG_S3C_DEV_FB | |
158 | static struct resource s3c_fb_resource[] = { | |
e663cb76 KK |
159 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), |
160 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), | |
161 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), | |
162 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), | |
bad1e6aa KK |
163 | }; |
164 | ||
165 | struct platform_device s3c_device_fb = { | |
166 | .name = "s3c-fb", | |
167 | .id = -1, | |
168 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | |
169 | .resource = s3c_fb_resource, | |
170 | .dev = { | |
171 | .dma_mask = &samsung_device_dma_mask, | |
172 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
173 | }, | |
174 | }; | |
175 | ||
176 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | |
177 | { | |
178 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
179 | &s3c_device_fb); | |
180 | } | |
181 | #endif /* CONFIG_S3C_DEV_FB */ | |
182 | ||
bad1e6aa KK |
183 | /* HWMON */ |
184 | ||
185 | #ifdef CONFIG_S3C_DEV_HWMON | |
186 | struct platform_device s3c_device_hwmon = { | |
187 | .name = "s3c-hwmon", | |
188 | .id = -1, | |
189 | .dev.parent = &s3c_device_adc.dev, | |
190 | }; | |
191 | ||
192 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | |
193 | { | |
194 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | |
195 | &s3c_device_hwmon); | |
196 | } | |
197 | #endif /* CONFIG_S3C_DEV_HWMON */ | |
198 | ||
199 | /* HSMMC */ | |
200 | ||
bad1e6aa KK |
201 | #ifdef CONFIG_S3C_DEV_HSMMC |
202 | static struct resource s3c_hsmmc_resource[] = { | |
e663cb76 KK |
203 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), |
204 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), | |
bad1e6aa KK |
205 | }; |
206 | ||
207 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | |
208 | .max_width = 4, | |
209 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
210 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
211 | }; |
212 | ||
213 | struct platform_device s3c_device_hsmmc0 = { | |
214 | .name = "s3c-sdhci", | |
215 | .id = 0, | |
216 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | |
217 | .resource = s3c_hsmmc_resource, | |
218 | .dev = { | |
219 | .dma_mask = &samsung_device_dma_mask, | |
220 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
221 | .platform_data = &s3c_hsmmc0_def_platdata, | |
222 | }, | |
223 | }; | |
224 | ||
225 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |
226 | { | |
227 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | |
228 | } | |
229 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
230 | ||
231 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
232 | static struct resource s3c_hsmmc1_resource[] = { | |
e663cb76 KK |
233 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), |
234 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), | |
bad1e6aa KK |
235 | }; |
236 | ||
237 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | |
238 | .max_width = 4, | |
239 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
240 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
241 | }; |
242 | ||
243 | struct platform_device s3c_device_hsmmc1 = { | |
244 | .name = "s3c-sdhci", | |
245 | .id = 1, | |
246 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | |
247 | .resource = s3c_hsmmc1_resource, | |
248 | .dev = { | |
249 | .dma_mask = &samsung_device_dma_mask, | |
250 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
251 | .platform_data = &s3c_hsmmc1_def_platdata, | |
252 | }, | |
253 | }; | |
254 | ||
255 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |
256 | { | |
257 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | |
258 | } | |
259 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
260 | ||
261 | /* HSMMC2 */ | |
262 | ||
263 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
264 | static struct resource s3c_hsmmc2_resource[] = { | |
e663cb76 KK |
265 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), |
266 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), | |
bad1e6aa KK |
267 | }; |
268 | ||
269 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | |
270 | .max_width = 4, | |
271 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
272 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
273 | }; |
274 | ||
275 | struct platform_device s3c_device_hsmmc2 = { | |
276 | .name = "s3c-sdhci", | |
277 | .id = 2, | |
278 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | |
279 | .resource = s3c_hsmmc2_resource, | |
280 | .dev = { | |
281 | .dma_mask = &samsung_device_dma_mask, | |
282 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
283 | .platform_data = &s3c_hsmmc2_def_platdata, | |
284 | }, | |
285 | }; | |
286 | ||
287 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |
288 | { | |
289 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | |
290 | } | |
291 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
292 | ||
293 | #ifdef CONFIG_S3C_DEV_HSMMC3 | |
294 | static struct resource s3c_hsmmc3_resource[] = { | |
e663cb76 KK |
295 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), |
296 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), | |
bad1e6aa KK |
297 | }; |
298 | ||
299 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | |
300 | .max_width = 4, | |
301 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
302 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
303 | }; |
304 | ||
305 | struct platform_device s3c_device_hsmmc3 = { | |
306 | .name = "s3c-sdhci", | |
307 | .id = 3, | |
308 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | |
309 | .resource = s3c_hsmmc3_resource, | |
310 | .dev = { | |
311 | .dma_mask = &samsung_device_dma_mask, | |
312 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
313 | .platform_data = &s3c_hsmmc3_def_platdata, | |
314 | }, | |
315 | }; | |
316 | ||
317 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | |
318 | { | |
319 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | |
320 | } | |
321 | #endif /* CONFIG_S3C_DEV_HSMMC3 */ | |
322 | ||
323 | /* I2C */ | |
324 | ||
325 | static struct resource s3c_i2c0_resource[] = { | |
e663cb76 KK |
326 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), |
327 | [1] = DEFINE_RES_IRQ(IRQ_IIC), | |
bad1e6aa KK |
328 | }; |
329 | ||
330 | struct platform_device s3c_device_i2c0 = { | |
331 | .name = "s3c2410-i2c", | |
bad1e6aa | 332 | .id = 0, |
bad1e6aa KK |
333 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), |
334 | .resource = s3c_i2c0_resource, | |
335 | }; | |
336 | ||
337 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | |
338 | .flags = 0, | |
339 | .slave_addr = 0x10, | |
340 | .frequency = 100*1000, | |
341 | .sda_delay = 100, | |
342 | }; | |
343 | ||
344 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
345 | { | |
346 | struct s3c2410_platform_i2c *npd; | |
347 | ||
693cec97 | 348 | if (!pd) { |
bad1e6aa | 349 | pd = &default_i2c_data; |
693cec97 SN |
350 | pd->bus_num = 0; |
351 | } | |
bad1e6aa KK |
352 | |
353 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
354 | &s3c_device_i2c0); | |
355 | ||
356 | if (!npd->cfg_gpio) | |
357 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | |
358 | } | |
359 | ||
360 | #ifdef CONFIG_S3C_DEV_I2C1 | |
361 | static struct resource s3c_i2c1_resource[] = { | |
e663cb76 KK |
362 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), |
363 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), | |
bad1e6aa KK |
364 | }; |
365 | ||
366 | struct platform_device s3c_device_i2c1 = { | |
367 | .name = "s3c2410-i2c", | |
368 | .id = 1, | |
369 | .num_resources = ARRAY_SIZE(s3c_i2c1_resource), | |
370 | .resource = s3c_i2c1_resource, | |
371 | }; | |
372 | ||
373 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
374 | { | |
375 | struct s3c2410_platform_i2c *npd; | |
376 | ||
377 | if (!pd) { | |
378 | pd = &default_i2c_data; | |
379 | pd->bus_num = 1; | |
380 | } | |
381 | ||
382 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
383 | &s3c_device_i2c1); | |
384 | ||
385 | if (!npd->cfg_gpio) | |
386 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | |
387 | } | |
388 | #endif /* CONFIG_S3C_DEV_I2C1 */ | |
389 | ||
390 | #ifdef CONFIG_S3C_DEV_I2C2 | |
391 | static struct resource s3c_i2c2_resource[] = { | |
e663cb76 KK |
392 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), |
393 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), | |
bad1e6aa KK |
394 | }; |
395 | ||
396 | struct platform_device s3c_device_i2c2 = { | |
397 | .name = "s3c2410-i2c", | |
398 | .id = 2, | |
399 | .num_resources = ARRAY_SIZE(s3c_i2c2_resource), | |
400 | .resource = s3c_i2c2_resource, | |
401 | }; | |
402 | ||
403 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
404 | { | |
405 | struct s3c2410_platform_i2c *npd; | |
406 | ||
407 | if (!pd) { | |
408 | pd = &default_i2c_data; | |
409 | pd->bus_num = 2; | |
410 | } | |
411 | ||
412 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
413 | &s3c_device_i2c2); | |
414 | ||
415 | if (!npd->cfg_gpio) | |
416 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | |
417 | } | |
418 | #endif /* CONFIG_S3C_DEV_I2C2 */ | |
419 | ||
420 | #ifdef CONFIG_S3C_DEV_I2C3 | |
421 | static struct resource s3c_i2c3_resource[] = { | |
e663cb76 KK |
422 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), |
423 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), | |
bad1e6aa KK |
424 | }; |
425 | ||
426 | struct platform_device s3c_device_i2c3 = { | |
427 | .name = "s3c2440-i2c", | |
428 | .id = 3, | |
429 | .num_resources = ARRAY_SIZE(s3c_i2c3_resource), | |
430 | .resource = s3c_i2c3_resource, | |
431 | }; | |
432 | ||
433 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | |
434 | { | |
435 | struct s3c2410_platform_i2c *npd; | |
436 | ||
437 | if (!pd) { | |
438 | pd = &default_i2c_data; | |
439 | pd->bus_num = 3; | |
440 | } | |
441 | ||
442 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
443 | &s3c_device_i2c3); | |
444 | ||
445 | if (!npd->cfg_gpio) | |
446 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | |
447 | } | |
448 | #endif /*CONFIG_S3C_DEV_I2C3 */ | |
449 | ||
450 | #ifdef CONFIG_S3C_DEV_I2C4 | |
451 | static struct resource s3c_i2c4_resource[] = { | |
e663cb76 KK |
452 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), |
453 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), | |
bad1e6aa KK |
454 | }; |
455 | ||
456 | struct platform_device s3c_device_i2c4 = { | |
457 | .name = "s3c2440-i2c", | |
458 | .id = 4, | |
459 | .num_resources = ARRAY_SIZE(s3c_i2c4_resource), | |
460 | .resource = s3c_i2c4_resource, | |
461 | }; | |
462 | ||
463 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | |
464 | { | |
465 | struct s3c2410_platform_i2c *npd; | |
466 | ||
467 | if (!pd) { | |
468 | pd = &default_i2c_data; | |
469 | pd->bus_num = 4; | |
470 | } | |
471 | ||
472 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
473 | &s3c_device_i2c4); | |
474 | ||
475 | if (!npd->cfg_gpio) | |
476 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | |
477 | } | |
478 | #endif /*CONFIG_S3C_DEV_I2C4 */ | |
479 | ||
480 | #ifdef CONFIG_S3C_DEV_I2C5 | |
481 | static struct resource s3c_i2c5_resource[] = { | |
e663cb76 KK |
482 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), |
483 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), | |
bad1e6aa KK |
484 | }; |
485 | ||
486 | struct platform_device s3c_device_i2c5 = { | |
487 | .name = "s3c2440-i2c", | |
488 | .id = 5, | |
489 | .num_resources = ARRAY_SIZE(s3c_i2c5_resource), | |
490 | .resource = s3c_i2c5_resource, | |
491 | }; | |
492 | ||
493 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | |
494 | { | |
495 | struct s3c2410_platform_i2c *npd; | |
496 | ||
497 | if (!pd) { | |
498 | pd = &default_i2c_data; | |
499 | pd->bus_num = 5; | |
500 | } | |
501 | ||
502 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
503 | &s3c_device_i2c5); | |
504 | ||
505 | if (!npd->cfg_gpio) | |
506 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | |
507 | } | |
508 | #endif /*CONFIG_S3C_DEV_I2C5 */ | |
509 | ||
510 | #ifdef CONFIG_S3C_DEV_I2C6 | |
511 | static struct resource s3c_i2c6_resource[] = { | |
e663cb76 KK |
512 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), |
513 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), | |
bad1e6aa KK |
514 | }; |
515 | ||
516 | struct platform_device s3c_device_i2c6 = { | |
517 | .name = "s3c2440-i2c", | |
518 | .id = 6, | |
519 | .num_resources = ARRAY_SIZE(s3c_i2c6_resource), | |
520 | .resource = s3c_i2c6_resource, | |
521 | }; | |
522 | ||
523 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | |
524 | { | |
525 | struct s3c2410_platform_i2c *npd; | |
526 | ||
527 | if (!pd) { | |
528 | pd = &default_i2c_data; | |
529 | pd->bus_num = 6; | |
530 | } | |
531 | ||
532 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
533 | &s3c_device_i2c6); | |
534 | ||
535 | if (!npd->cfg_gpio) | |
536 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | |
537 | } | |
538 | #endif /* CONFIG_S3C_DEV_I2C6 */ | |
539 | ||
540 | #ifdef CONFIG_S3C_DEV_I2C7 | |
541 | static struct resource s3c_i2c7_resource[] = { | |
e663cb76 KK |
542 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), |
543 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), | |
bad1e6aa KK |
544 | }; |
545 | ||
546 | struct platform_device s3c_device_i2c7 = { | |
547 | .name = "s3c2440-i2c", | |
548 | .id = 7, | |
549 | .num_resources = ARRAY_SIZE(s3c_i2c7_resource), | |
550 | .resource = s3c_i2c7_resource, | |
551 | }; | |
552 | ||
553 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | |
554 | { | |
555 | struct s3c2410_platform_i2c *npd; | |
556 | ||
557 | if (!pd) { | |
558 | pd = &default_i2c_data; | |
559 | pd->bus_num = 7; | |
560 | } | |
561 | ||
562 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
563 | &s3c_device_i2c7); | |
564 | ||
565 | if (!npd->cfg_gpio) | |
566 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | |
567 | } | |
568 | #endif /* CONFIG_S3C_DEV_I2C7 */ | |
569 | ||
61c542bf KK |
570 | /* I2S */ |
571 | ||
572 | #ifdef CONFIG_PLAT_S3C24XX | |
573 | static struct resource s3c_iis_resource[] = { | |
e663cb76 | 574 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), |
61c542bf KK |
575 | }; |
576 | ||
359fdfa6 | 577 | static struct s3c_audio_pdata s3c_iis_platdata = { |
9bdca822 AB |
578 | #ifdef CONFIG_S3C24XX_DMAC |
579 | .dma_filter = s3c24xx_dma_filter, | |
580 | #endif | |
359fdfa6 AB |
581 | .dma_playback = (void *)DMACH_I2S_OUT, |
582 | .dma_capture = (void *)DMACH_I2S_IN, | |
583 | }; | |
584 | ||
61c542bf KK |
585 | struct platform_device s3c_device_iis = { |
586 | .name = "s3c24xx-iis", | |
587 | .id = -1, | |
588 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | |
589 | .resource = s3c_iis_resource, | |
590 | .dev = { | |
591 | .dma_mask = &samsung_device_dma_mask, | |
592 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
359fdfa6 | 593 | .platform_data = &s3c_iis_platdata, |
61c542bf KK |
594 | } |
595 | }; | |
596 | #endif /* CONFIG_PLAT_S3C24XX */ | |
597 | ||
bad1e6aa KK |
598 | /* IDE CFCON */ |
599 | ||
600 | #ifdef CONFIG_SAMSUNG_DEV_IDE | |
601 | static struct resource s3c_cfcon_resource[] = { | |
e663cb76 KK |
602 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), |
603 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), | |
bad1e6aa KK |
604 | }; |
605 | ||
606 | struct platform_device s3c_device_cfcon = { | |
607 | .id = 0, | |
608 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | |
609 | .resource = s3c_cfcon_resource, | |
610 | }; | |
611 | ||
eff4c58d | 612 | void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) |
bad1e6aa KK |
613 | { |
614 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | |
615 | &s3c_device_cfcon); | |
616 | } | |
617 | #endif /* CONFIG_SAMSUNG_DEV_IDE */ | |
618 | ||
619 | /* KEYPAD */ | |
620 | ||
621 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | |
622 | static struct resource samsung_keypad_resources[] = { | |
e663cb76 KK |
623 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), |
624 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), | |
bad1e6aa KK |
625 | }; |
626 | ||
627 | struct platform_device samsung_device_keypad = { | |
628 | .name = "samsung-keypad", | |
629 | .id = -1, | |
630 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | |
631 | .resource = samsung_keypad_resources, | |
632 | }; | |
633 | ||
634 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | |
635 | { | |
636 | struct samsung_keypad_platdata *npd; | |
637 | ||
638 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | |
639 | &samsung_device_keypad); | |
640 | ||
641 | if (!npd->cfg_gpio) | |
642 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | |
643 | } | |
644 | #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ | |
645 | ||
61c542bf KK |
646 | /* LCD Controller */ |
647 | ||
648 | #ifdef CONFIG_PLAT_S3C24XX | |
649 | static struct resource s3c_lcd_resource[] = { | |
e663cb76 KK |
650 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), |
651 | [1] = DEFINE_RES_IRQ(IRQ_LCD), | |
61c542bf KK |
652 | }; |
653 | ||
654 | struct platform_device s3c_device_lcd = { | |
655 | .name = "s3c2410-lcd", | |
656 | .id = -1, | |
657 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | |
658 | .resource = s3c_lcd_resource, | |
659 | .dev = { | |
660 | .dma_mask = &samsung_device_dma_mask, | |
661 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
662 | } | |
663 | }; | |
664 | ||
665 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |
666 | { | |
667 | struct s3c2410fb_mach_info *npd; | |
668 | ||
669 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | |
670 | if (npd) { | |
671 | npd->displays = kmemdup(pd->displays, | |
672 | sizeof(struct s3c2410fb_display) * npd->num_displays, | |
673 | GFP_KERNEL); | |
674 | if (!npd->displays) | |
675 | printk(KERN_ERR "no memory for LCD display data\n"); | |
676 | } else { | |
677 | printk(KERN_ERR "no memory for LCD platform data\n"); | |
678 | } | |
679 | } | |
680 | #endif /* CONFIG_PLAT_S3C24XX */ | |
681 | ||
bad1e6aa KK |
682 | /* NAND */ |
683 | ||
684 | #ifdef CONFIG_S3C_DEV_NAND | |
685 | static struct resource s3c_nand_resource[] = { | |
e663cb76 | 686 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), |
bad1e6aa KK |
687 | }; |
688 | ||
689 | struct platform_device s3c_device_nand = { | |
690 | .name = "s3c2410-nand", | |
691 | .id = -1, | |
692 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | |
693 | .resource = s3c_nand_resource, | |
694 | }; | |
695 | ||
696 | /* | |
697 | * s3c_nand_copy_set() - copy nand set data | |
698 | * @set: The new structure, directly copied from the old. | |
699 | * | |
700 | * Copy all the fields from the NAND set field from what is probably __initdata | |
701 | * to new kernel memory. The code returns 0 if the copy happened correctly or | |
702 | * an error code for the calling function to display. | |
703 | * | |
704 | * Note, we currently do not try and look to see if we've already copied the | |
705 | * data in a previous set. | |
706 | */ | |
707 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | |
708 | { | |
709 | void *ptr; | |
710 | int size; | |
711 | ||
712 | size = sizeof(struct mtd_partition) * set->nr_partitions; | |
713 | if (size) { | |
714 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | |
715 | set->partitions = ptr; | |
716 | ||
717 | if (!ptr) | |
718 | return -ENOMEM; | |
719 | } | |
720 | ||
721 | if (set->nr_map && set->nr_chips) { | |
722 | size = sizeof(int) * set->nr_chips; | |
723 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | |
724 | set->nr_map = ptr; | |
725 | ||
726 | if (!ptr) | |
727 | return -ENOMEM; | |
728 | } | |
729 | ||
bad1e6aa KK |
730 | return 0; |
731 | } | |
732 | ||
733 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |
734 | { | |
735 | struct s3c2410_platform_nand *npd; | |
736 | int size; | |
737 | int ret; | |
738 | ||
739 | /* note, if we get a failure in allocation, we simply drop out of the | |
740 | * function. If there is so little memory available at initialisation | |
741 | * time then there is little chance the system is going to run. | |
742 | */ | |
743 | ||
744 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | |
745 | &s3c_device_nand); | |
746 | if (!npd) | |
747 | return; | |
748 | ||
749 | /* now see if we need to copy any of the nand set data */ | |
750 | ||
751 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | |
752 | if (size) { | |
753 | struct s3c2410_nand_set *from = npd->sets; | |
754 | struct s3c2410_nand_set *to; | |
755 | int i; | |
756 | ||
757 | to = kmemdup(from, size, GFP_KERNEL); | |
758 | npd->sets = to; /* set, even if we failed */ | |
759 | ||
760 | if (!to) { | |
761 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | |
762 | return; | |
763 | } | |
764 | ||
765 | for (i = 0; i < npd->nr_sets; i++) { | |
766 | ret = s3c_nand_copy_set(to); | |
767 | if (ret) { | |
768 | printk(KERN_ERR "%s: failed to copy set %d\n", | |
769 | __func__, i); | |
770 | return; | |
771 | } | |
772 | to++; | |
773 | } | |
774 | } | |
775 | } | |
776 | #endif /* CONFIG_S3C_DEV_NAND */ | |
777 | ||
778 | /* ONENAND */ | |
779 | ||
780 | #ifdef CONFIG_S3C_DEV_ONENAND | |
781 | static struct resource s3c_onenand_resources[] = { | |
e663cb76 KK |
782 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), |
783 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), | |
784 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), | |
bad1e6aa KK |
785 | }; |
786 | ||
787 | struct platform_device s3c_device_onenand = { | |
788 | .name = "samsung-onenand", | |
789 | .id = 0, | |
790 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | |
791 | .resource = s3c_onenand_resources, | |
792 | }; | |
793 | #endif /* CONFIG_S3C_DEV_ONENAND */ | |
794 | ||
0523ec3a KK |
795 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 |
796 | static struct resource s3c64xx_onenand1_resources[] = { | |
e663cb76 KK |
797 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), |
798 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), | |
799 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), | |
0523ec3a KK |
800 | }; |
801 | ||
802 | struct platform_device s3c64xx_device_onenand1 = { | |
803 | .name = "samsung-onenand", | |
804 | .id = 1, | |
805 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | |
806 | .resource = s3c64xx_onenand1_resources, | |
807 | }; | |
808 | ||
eff4c58d | 809 | void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) |
0523ec3a KK |
810 | { |
811 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | |
812 | &s3c64xx_device_onenand1); | |
813 | } | |
814 | #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ | |
815 | ||
bad1e6aa KK |
816 | /* PWM Timer */ |
817 | ||
818 | #ifdef CONFIG_SAMSUNG_DEV_PWM | |
95e43d46 TF |
819 | static struct resource samsung_pwm_resource[] = { |
820 | DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K), | |
821 | }; | |
822 | ||
823 | struct platform_device samsung_device_pwm = { | |
824 | .name = "samsung-pwm", | |
825 | .id = -1, | |
826 | .num_resources = ARRAY_SIZE(samsung_pwm_resource), | |
827 | .resource = samsung_pwm_resource, | |
828 | }; | |
829 | ||
830 | void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) | |
831 | { | |
832 | samsung_device_pwm.dev.platform_data = pd; | |
833 | } | |
bad1e6aa KK |
834 | #endif /* CONFIG_SAMSUNG_DEV_PWM */ |
835 | ||
61c542bf KK |
836 | /* RTC */ |
837 | ||
838 | #ifdef CONFIG_PLAT_S3C24XX | |
839 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
840 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), |
841 | [1] = DEFINE_RES_IRQ(IRQ_RTC), | |
842 | [2] = DEFINE_RES_IRQ(IRQ_TICK), | |
61c542bf KK |
843 | }; |
844 | ||
845 | struct platform_device s3c_device_rtc = { | |
846 | .name = "s3c2410-rtc", | |
847 | .id = -1, | |
848 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
849 | .resource = s3c_rtc_resource, | |
850 | }; | |
851 | #endif /* CONFIG_PLAT_S3C24XX */ | |
852 | ||
bad1e6aa KK |
853 | #ifdef CONFIG_S3C_DEV_RTC |
854 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
855 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), |
856 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), | |
857 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), | |
bad1e6aa KK |
858 | }; |
859 | ||
860 | struct platform_device s3c_device_rtc = { | |
861 | .name = "s3c64xx-rtc", | |
862 | .id = -1, | |
863 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
864 | .resource = s3c_rtc_resource, | |
865 | }; | |
866 | #endif /* CONFIG_S3C_DEV_RTC */ | |
867 | ||
61c542bf KK |
868 | /* SDI */ |
869 | ||
870 | #ifdef CONFIG_PLAT_S3C24XX | |
871 | static struct resource s3c_sdi_resource[] = { | |
e663cb76 KK |
872 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), |
873 | [1] = DEFINE_RES_IRQ(IRQ_SDI), | |
61c542bf KK |
874 | }; |
875 | ||
876 | struct platform_device s3c_device_sdi = { | |
877 | .name = "s3c2410-sdi", | |
878 | .id = -1, | |
879 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | |
880 | .resource = s3c_sdi_resource, | |
881 | }; | |
882 | ||
883 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | |
884 | { | |
885 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | |
886 | &s3c_device_sdi); | |
887 | } | |
888 | #endif /* CONFIG_PLAT_S3C24XX */ | |
889 | ||
890 | /* SPI */ | |
891 | ||
892 | #ifdef CONFIG_PLAT_S3C24XX | |
893 | static struct resource s3c_spi0_resource[] = { | |
e663cb76 KK |
894 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), |
895 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), | |
61c542bf KK |
896 | }; |
897 | ||
898 | struct platform_device s3c_device_spi0 = { | |
899 | .name = "s3c2410-spi", | |
900 | .id = 0, | |
901 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | |
902 | .resource = s3c_spi0_resource, | |
903 | .dev = { | |
904 | .dma_mask = &samsung_device_dma_mask, | |
905 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
906 | } | |
907 | }; | |
908 | ||
909 | static struct resource s3c_spi1_resource[] = { | |
e663cb76 KK |
910 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), |
911 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), | |
61c542bf KK |
912 | }; |
913 | ||
914 | struct platform_device s3c_device_spi1 = { | |
915 | .name = "s3c2410-spi", | |
916 | .id = 1, | |
917 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | |
918 | .resource = s3c_spi1_resource, | |
919 | .dev = { | |
920 | .dma_mask = &samsung_device_dma_mask, | |
921 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
922 | } | |
923 | }; | |
924 | #endif /* CONFIG_PLAT_S3C24XX */ | |
925 | ||
926 | /* Touchscreen */ | |
927 | ||
928 | #ifdef CONFIG_PLAT_S3C24XX | |
929 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
930 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
931 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
61c542bf KK |
932 | }; |
933 | ||
934 | struct platform_device s3c_device_ts = { | |
935 | .name = "s3c2410-ts", | |
936 | .id = -1, | |
937 | .dev.parent = &s3c_device_adc.dev, | |
938 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
939 | .resource = s3c_ts_resource, | |
940 | }; | |
941 | ||
942 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | |
943 | { | |
944 | s3c_set_platdata(hard_s3c2410ts_info, | |
945 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | |
946 | } | |
947 | #endif /* CONFIG_PLAT_S3C24XX */ | |
948 | ||
bad1e6aa | 949 | #ifdef CONFIG_SAMSUNG_DEV_TS |
bad1e6aa KK |
950 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { |
951 | .delay = 10000, | |
952 | .presc = 49, | |
953 | .oversampling_shift = 2, | |
954 | }; | |
955 | ||
a829ae57 | 956 | void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) |
bad1e6aa KK |
957 | { |
958 | if (!pd) | |
959 | pd = &default_ts_data; | |
960 | ||
961 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | |
a829ae57 | 962 | &s3c_device_adc); |
bad1e6aa KK |
963 | } |
964 | #endif /* CONFIG_SAMSUNG_DEV_TS */ | |
965 | ||
bad1e6aa KK |
966 | /* USB */ |
967 | ||
968 | #ifdef CONFIG_S3C_DEV_USB_HOST | |
969 | static struct resource s3c_usb_resource[] = { | |
e663cb76 KK |
970 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), |
971 | [1] = DEFINE_RES_IRQ(IRQ_USBH), | |
bad1e6aa KK |
972 | }; |
973 | ||
974 | struct platform_device s3c_device_ohci = { | |
975 | .name = "s3c2410-ohci", | |
976 | .id = -1, | |
977 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | |
978 | .resource = s3c_usb_resource, | |
979 | .dev = { | |
980 | .dma_mask = &samsung_device_dma_mask, | |
981 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
982 | } | |
983 | }; | |
984 | ||
985 | /* | |
986 | * s3c_ohci_set_platdata - initialise OHCI device platform data | |
987 | * @info: The platform data. | |
988 | * | |
989 | * This call copies the @info passed in and sets the device .platform_data | |
990 | * field to that copy. The @info is copied so that the original can be marked | |
991 | * __initdata. | |
992 | */ | |
993 | ||
994 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | |
995 | { | |
996 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | |
997 | &s3c_device_ohci); | |
998 | } | |
999 | #endif /* CONFIG_S3C_DEV_USB_HOST */ | |
1000 | ||
61c542bf KK |
1001 | /* USB Device (Gadget) */ |
1002 | ||
1003 | #ifdef CONFIG_PLAT_S3C24XX | |
1004 | static struct resource s3c_usbgadget_resource[] = { | |
e663cb76 KK |
1005 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), |
1006 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1007 | }; |
1008 | ||
1009 | struct platform_device s3c_device_usbgadget = { | |
1010 | .name = "s3c2410-usbgadget", | |
1011 | .id = -1, | |
1012 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | |
1013 | .resource = s3c_usbgadget_resource, | |
1014 | }; | |
1015 | ||
1016 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |
1017 | { | |
1018 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | |
1019 | } | |
1020 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1021 | ||
bad1e6aa KK |
1022 | /* USB HSOTG */ |
1023 | ||
1024 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | |
1025 | static struct resource s3c_usb_hsotg_resources[] = { | |
c65d8ef2 | 1026 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), |
e663cb76 | 1027 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
bad1e6aa KK |
1028 | }; |
1029 | ||
1030 | struct platform_device s3c_device_usb_hsotg = { | |
1031 | .name = "s3c-hsotg", | |
1032 | .id = -1, | |
1033 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | |
1034 | .resource = s3c_usb_hsotg_resources, | |
1035 | .dev = { | |
1036 | .dma_mask = &samsung_device_dma_mask, | |
1037 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1038 | }, | |
1039 | }; | |
99f6e1f5 | 1040 | |
1f91b4cc | 1041 | void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd) |
99f6e1f5 | 1042 | { |
1f91b4cc | 1043 | struct dwc2_hsotg_plat *npd; |
99f6e1f5 | 1044 | |
1f91b4cc | 1045 | npd = s3c_set_platdata(pd, sizeof(struct dwc2_hsotg_plat), |
99f6e1f5 JS |
1046 | &s3c_device_usb_hsotg); |
1047 | ||
1048 | if (!npd->phy_init) | |
1049 | npd->phy_init = s5p_usb_phy_init; | |
1050 | if (!npd->phy_exit) | |
1051 | npd->phy_exit = s5p_usb_phy_exit; | |
1052 | } | |
bad1e6aa KK |
1053 | #endif /* CONFIG_S3C_DEV_USB_HSOTG */ |
1054 | ||
61c542bf KK |
1055 | /* USB High Spped 2.0 Device (Gadget) */ |
1056 | ||
1057 | #ifdef CONFIG_PLAT_S3C24XX | |
1058 | static struct resource s3c_hsudc_resource[] = { | |
e663cb76 KK |
1059 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), |
1060 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1061 | }; |
1062 | ||
1063 | struct platform_device s3c_device_usb_hsudc = { | |
1064 | .name = "s3c-hsudc", | |
1065 | .id = -1, | |
1066 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | |
1067 | .resource = s3c_hsudc_resource, | |
1068 | .dev = { | |
1069 | .dma_mask = &samsung_device_dma_mask, | |
1070 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1071 | }, | |
1072 | }; | |
1073 | ||
1074 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | |
1075 | { | |
1076 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | |
1077 | } | |
1078 | #endif /* CONFIG_PLAT_S3C24XX */ | |
bad1e6aa KK |
1079 | |
1080 | /* WDT */ | |
1081 | ||
1082 | #ifdef CONFIG_S3C_DEV_WDT | |
1083 | static struct resource s3c_wdt_resource[] = { | |
e663cb76 KK |
1084 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), |
1085 | [1] = DEFINE_RES_IRQ(IRQ_WDT), | |
bad1e6aa KK |
1086 | }; |
1087 | ||
1088 | struct platform_device s3c_device_wdt = { | |
1089 | .name = "s3c2410-wdt", | |
1090 | .id = -1, | |
1091 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | |
1092 | .resource = s3c_wdt_resource, | |
1093 | }; | |
1094 | #endif /* CONFIG_S3C_DEV_WDT */ | |
875a5937 PV |
1095 | |
1096 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | |
1097 | static struct resource s3c64xx_spi0_resource[] = { | |
1098 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | |
a0067db3 | 1099 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), |
875a5937 PV |
1100 | }; |
1101 | ||
1102 | struct platform_device s3c64xx_device_spi0 = { | |
4d0efdd5 | 1103 | .name = "s3c6410-spi", |
875a5937 PV |
1104 | .id = 0, |
1105 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | |
1106 | .resource = s3c64xx_spi0_resource, | |
1107 | .dev = { | |
1108 | .dma_mask = &samsung_device_dma_mask, | |
1109 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1110 | }, | |
1111 | }; | |
1112 | ||
4d0efdd5 TA |
1113 | void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1114 | int num_cs) | |
875a5937 | 1115 | { |
4d0efdd5 | 1116 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1117 | |
1118 | /* Reject invalid configuration */ | |
1119 | if (!num_cs || src_clk_nr < 0) { | |
1120 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1121 | return; | |
1122 | } | |
1123 | ||
4d0efdd5 TA |
1124 | pd.num_cs = num_cs; |
1125 | pd.src_clk_nr = src_clk_nr; | |
1126 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | |
a0067db3 AB |
1127 | pd.dma_tx = (void *)DMACH_SPI0_TX; |
1128 | pd.dma_rx = (void *)DMACH_SPI0_RX; | |
7f99ef22 | 1129 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1130 | pd.filter = pl330_filter; |
1db0287a TF |
1131 | #elif defined(CONFIG_S3C64XX_PL080) |
1132 | pd.filter = pl08x_filter_id; | |
7f99ef22 HS |
1133 | #elif defined(CONFIG_S3C24XX_DMAC) |
1134 | pd.filter = s3c24xx_dma_filter; | |
78843727 | 1135 | #endif |
4566c7f7 | 1136 | |
4d0efdd5 | 1137 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); |
875a5937 PV |
1138 | } |
1139 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | |
1140 | ||
1141 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | |
1142 | static struct resource s3c64xx_spi1_resource[] = { | |
1143 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | |
a0067db3 | 1144 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), |
875a5937 PV |
1145 | }; |
1146 | ||
1147 | struct platform_device s3c64xx_device_spi1 = { | |
4d0efdd5 | 1148 | .name = "s3c6410-spi", |
875a5937 PV |
1149 | .id = 1, |
1150 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | |
1151 | .resource = s3c64xx_spi1_resource, | |
1152 | .dev = { | |
1153 | .dma_mask = &samsung_device_dma_mask, | |
1154 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1155 | }, | |
1156 | }; | |
1157 | ||
4d0efdd5 TA |
1158 | void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1159 | int num_cs) | |
875a5937 | 1160 | { |
fb997a46 SN |
1161 | struct s3c64xx_spi_info pd; |
1162 | ||
875a5937 PV |
1163 | /* Reject invalid configuration */ |
1164 | if (!num_cs || src_clk_nr < 0) { | |
1165 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1166 | return; | |
1167 | } | |
1168 | ||
4d0efdd5 TA |
1169 | pd.num_cs = num_cs; |
1170 | pd.src_clk_nr = src_clk_nr; | |
1171 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | |
a0067db3 AB |
1172 | pd.dma_tx = (void *)DMACH_SPI1_TX; |
1173 | pd.dma_rx = (void *)DMACH_SPI1_RX; | |
1db0287a | 1174 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1175 | pd.filter = pl330_filter; |
1db0287a TF |
1176 | #elif defined(CONFIG_S3C64XX_PL080) |
1177 | pd.filter = pl08x_filter_id; | |
78843727 | 1178 | #endif |
4566c7f7 | 1179 | |
a0067db3 | 1180 | |
4d0efdd5 | 1181 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
875a5937 PV |
1182 | } |
1183 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | |
1184 | ||
1185 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | |
1186 | static struct resource s3c64xx_spi2_resource[] = { | |
1187 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | |
a0067db3 | 1188 | [1] = DEFINE_RES_IRQ(IRQ_SPI2), |
875a5937 PV |
1189 | }; |
1190 | ||
1191 | struct platform_device s3c64xx_device_spi2 = { | |
4d0efdd5 | 1192 | .name = "s3c6410-spi", |
875a5937 PV |
1193 | .id = 2, |
1194 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | |
1195 | .resource = s3c64xx_spi2_resource, | |
1196 | .dev = { | |
1197 | .dma_mask = &samsung_device_dma_mask, | |
1198 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1199 | }, | |
1200 | }; | |
1201 | ||
4d0efdd5 TA |
1202 | void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1203 | int num_cs) | |
875a5937 | 1204 | { |
4d0efdd5 | 1205 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1206 | |
1207 | /* Reject invalid configuration */ | |
1208 | if (!num_cs || src_clk_nr < 0) { | |
1209 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1210 | return; | |
1211 | } | |
1212 | ||
4d0efdd5 TA |
1213 | pd.num_cs = num_cs; |
1214 | pd.src_clk_nr = src_clk_nr; | |
1215 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | |
a0067db3 AB |
1216 | pd.dma_tx = (void *)DMACH_SPI2_TX; |
1217 | pd.dma_rx = (void *)DMACH_SPI2_RX; | |
1db0287a | 1218 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1219 | pd.filter = pl330_filter; |
1db0287a TF |
1220 | #elif defined(CONFIG_S3C64XX_PL080) |
1221 | pd.filter = pl08x_filter_id; | |
78843727 | 1222 | #endif |
323d7717 | 1223 | |
4d0efdd5 | 1224 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
875a5937 PV |
1225 | } |
1226 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ |