projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
CommitLineData
61c542bf
KK		 1/* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
78843727 13#include <linux/amba/pl330.h>
61c542bf
KK		 14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/slab.h>
24#include <linux/string.h>
25#include <linux/dma-mapping.h>
57167149
KK		 26#include <linux/fb.h>
27#include <linux/gfp.h>
0523ec3a
KK		 28#include <linux/mtd/mtd.h>
29#include <linux/mtd/onenand.h>
bad1e6aa
KK		 30#include <linux/mtd/partitions.h>
31#include <linux/mmc/host.h>
57167149 32#include <linux/ioport.h>
715a3e41 33#include <linux/platform_data/s3c-hsudc.h>
126625e1 34#include <linux/platform_data/s3c-hsotg.h>
61c542bf 35
ee21ae68
TB		 36#include <media/s5p_hdmi.h>
37
61c542bf
KK		 38#include <asm/irq.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/map.h>
41#include <asm/mach/irq.h>
42
43#include <mach/hardware.h>
44#include <mach/dma.h>
45#include <mach/irqs.h>
46#include <mach/map.h>
47
48#include <plat/cpu.h>
49#include <plat/devs.h>
bad1e6aa 50#include <plat/adc.h>
436d42c6
AB		 51#include <linux/platform_data/ata-samsung_cf.h>
52#include <linux/platform_data/usb-ehci-s5p.h>
61c542bf
KK		 53#include <plat/fb.h>
54#include <plat/fb-s3c2410.h>
a8321393 55#include <plat/hdmi.h>
436d42c6
AB		 56#include <linux/platform_data/hwmon-s3c.h>
57#include <linux/platform_data/i2c-s3c2410.h>
bad1e6aa 58#include <plat/keypad.h>
436d42c6
AB		 59#include <linux/platform_data/mmc-s3cmci.h>
60#include <linux/platform_data/mtd-nand-s3c2410.h>
bad1e6aa 61#include <plat/sdhci.h>
436d42c6
AB		 62#include <linux/platform_data/touchscreen-s3c2410.h>
63#include <linux/platform_data/usb-s3c2410_udc.h>
64#include <linux/platform_data/usb-ohci-s3c2410.h>
57167149 65#include <plat/usb-phy.h>
61c542bf
KK		 66#include <plat/regs-serial.h>
67#include <plat/regs-spi.h>
436d42c6 68#include <linux/platform_data/spi-s3c64xx.h>
61c542bf
KK		 69
70static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71
72/* AC97 */
73#ifdef CONFIG_CPU_S3C2440
74static struct resource s3c_ac97_resource[] = {
e663cb76
KK		 75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
61c542bf
KK		 80};
81
82struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
84 .id = -1,
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
87 .dev = {
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
90 }
91};
92#endif /* CONFIG_CPU_S3C2440 */
93
94/* ADC */
95
96#ifdef CONFIG_PLAT_S3C24XX
97static struct resource s3c_adc_resource[] = {
e663cb76
KK		 98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
61c542bf
KK		 101};
102
103struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
105 .id = -1,
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
108};
109#endif /* CONFIG_PLAT_S3C24XX */
110
bad1e6aa
KK		 111#if defined(CONFIG_SAMSUNG_DEV_ADC)
112static struct resource s3c_adc_resource[] = {
e663cb76
KK		 113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
bad1e6aa
KK		 116};
117
118struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
120 .id = -1,
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
123};
124#endif /* CONFIG_SAMSUNG_DEV_ADC */
125
61c542bf
KK		 126/* Camif Controller */
127
128#ifdef CONFIG_CPU_S3C2440
129static struct resource s3c_camif_resource[] = {
e663cb76 130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
705c75e3
SN		 131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
61c542bf
KK		 133};
134
135struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
140 .dev = {
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
143 }
144};
145#endif /* CONFIG_CPU_S3C2440 */
146
bad1e6aa
KK		 147/* ASOC DMA */
148
bad1e6aa
KK		 149struct platform_device samsung_asoc_idma = {
150 .name = "samsung-idma",
151 .id = -1,
152 .dev = {
153 .dma_mask = &samsung_device_dma_mask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
155 }
156};
157
158/* FB */
159
160#ifdef CONFIG_S3C_DEV_FB
161static struct resource s3c_fb_resource[] = {
e663cb76
KK		 162 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
163 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
164 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
165 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
bad1e6aa
KK		 166};
167
168struct platform_device s3c_device_fb = {
169 .name = "s3c-fb",
170 .id = -1,
171 .num_resources = ARRAY_SIZE(s3c_fb_resource),
172 .resource = s3c_fb_resource,
173 .dev = {
174 .dma_mask = &samsung_device_dma_mask,
175 .coherent_dma_mask = DMA_BIT_MASK(32),
176 },
177};
178
179void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
180{
181 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
182 &s3c_device_fb);
183}
184#endif /* CONFIG_S3C_DEV_FB */
185
57167149
KK		 186/* FIMC */
187
188#ifdef CONFIG_S5P_DEV_FIMC0
189static struct resource s5p_fimc0_resource[] = {
e663cb76
KK		 190 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
191 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
57167149
KK		 192};
193
194struct platform_device s5p_device_fimc0 = {
195 .name = "s5p-fimc",
196 .id = 0,
197 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
198 .resource = s5p_fimc0_resource,
199 .dev = {
200 .dma_mask = &samsung_device_dma_mask,
201 .coherent_dma_mask = DMA_BIT_MASK(32),
202 },
203};
07e87e15
SN		 204
205struct platform_device s5p_device_fimc_md = {
206 .name = "s5p-fimc-md",
207 .id = -1,
208};
57167149
KK		 209#endif /* CONFIG_S5P_DEV_FIMC0 */
210
211#ifdef CONFIG_S5P_DEV_FIMC1
212static struct resource s5p_fimc1_resource[] = {
e663cb76
KK		 213 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
214 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
57167149
KK		 215};
216
217struct platform_device s5p_device_fimc1 = {
218 .name = "s5p-fimc",
219 .id = 1,
220 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
221 .resource = s5p_fimc1_resource,
222 .dev = {
223 .dma_mask = &samsung_device_dma_mask,
224 .coherent_dma_mask = DMA_BIT_MASK(32),
225 },
226};
227#endif /* CONFIG_S5P_DEV_FIMC1 */
228
229#ifdef CONFIG_S5P_DEV_FIMC2
230static struct resource s5p_fimc2_resource[] = {
e663cb76
KK		 231 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
232 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
57167149
KK		 233};
234
235struct platform_device s5p_device_fimc2 = {
236 .name = "s5p-fimc",
237 .id = 2,
238 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
239 .resource = s5p_fimc2_resource,
240 .dev = {
241 .dma_mask = &samsung_device_dma_mask,
242 .coherent_dma_mask = DMA_BIT_MASK(32),
243 },
244};
245#endif /* CONFIG_S5P_DEV_FIMC2 */
246
247#ifdef CONFIG_S5P_DEV_FIMC3
248static struct resource s5p_fimc3_resource[] = {
e663cb76
KK		 249 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
250 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
57167149
KK		 251};
252
253struct platform_device s5p_device_fimc3 = {
254 .name = "s5p-fimc",
255 .id = 3,
256 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
257 .resource = s5p_fimc3_resource,
258 .dev = {
259 .dma_mask = &samsung_device_dma_mask,
260 .coherent_dma_mask = DMA_BIT_MASK(32),
261 },
262};
263#endif /* CONFIG_S5P_DEV_FIMC3 */
264
561ab530
KD		 265/* G2D */
266
267#ifdef CONFIG_S5P_DEV_G2D
268static struct resource s5p_g2d_resource[] = {
24eec601
TB		 269 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
270 [1] = DEFINE_RES_IRQ(IRQ_2D),
561ab530
KD		 271};
272
273struct platform_device s5p_device_g2d = {
274 .name = "s5p-g2d",
275 .id = 0,
276 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
277 .resource = s5p_g2d_resource,
278 .dev = {
279 .dma_mask = &samsung_device_dma_mask,
280 .coherent_dma_mask = DMA_BIT_MASK(32),
281 },
282};
283#endif /* CONFIG_S5P_DEV_G2D */
284
3dbe6d4c
AP		 285#ifdef CONFIG_S5P_DEV_JPEG
286static struct resource s5p_jpeg_resource[] = {
287 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
288 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
289};
290
291struct platform_device s5p_device_jpeg = {
292 .name = "s5p-jpeg",
293 .id = 0,
294 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
295 .resource = s5p_jpeg_resource,
296 .dev = {
297 .dma_mask = &samsung_device_dma_mask,
298 .coherent_dma_mask = DMA_BIT_MASK(32),
299 },
300};
301#endif /* CONFIG_S5P_DEV_JPEG */
302
57167149
KK		 303/* FIMD0 */
304
305#ifdef CONFIG_S5P_DEV_FIMD0
306static struct resource s5p_fimd0_resource[] = {
e663cb76
KK		 307 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
308 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
309 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
310 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
57167149
KK		 311};
312
313struct platform_device s5p_device_fimd0 = {
314 .name = "s5p-fb",
315 .id = 0,
316 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
317 .resource = s5p_fimd0_resource,
318 .dev = {
319 .dma_mask = &samsung_device_dma_mask,
320 .coherent_dma_mask = DMA_BIT_MASK(32),
321 },
322};
323
324void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
325{
326 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
327 &s5p_device_fimd0);
328}
329#endif /* CONFIG_S5P_DEV_FIMD0 */
330
bad1e6aa
KK		 331/* HWMON */
332
333#ifdef CONFIG_S3C_DEV_HWMON
334struct platform_device s3c_device_hwmon = {
335 .name = "s3c-hwmon",
336 .id = -1,
337 .dev.parent = &s3c_device_adc.dev,
338};
339
340void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
341{
342 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
343 &s3c_device_hwmon);
344}
345#endif /* CONFIG_S3C_DEV_HWMON */
346
347/* HSMMC */
348
bad1e6aa
KK		 349#ifdef CONFIG_S3C_DEV_HSMMC
350static struct resource s3c_hsmmc_resource[] = {
e663cb76
KK		 351 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
352 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
bad1e6aa
KK		 353};
354
355struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
356 .max_width = 4,
357 .host_caps = (MMC_CAP_4_BIT_DATA |
358 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
bad1e6aa
KK		 359};
360
361struct platform_device s3c_device_hsmmc0 = {
362 .name = "s3c-sdhci",
363 .id = 0,
364 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
365 .resource = s3c_hsmmc_resource,
366 .dev = {
367 .dma_mask = &samsung_device_dma_mask,
368 .coherent_dma_mask = DMA_BIT_MASK(32),
369 .platform_data = &s3c_hsmmc0_def_platdata,
370 },
371};
372
373void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
374{
375 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
376}
377#endif /* CONFIG_S3C_DEV_HSMMC */
378
379#ifdef CONFIG_S3C_DEV_HSMMC1
380static struct resource s3c_hsmmc1_resource[] = {
e663cb76
KK		 381 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
382 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
bad1e6aa
KK		 383};
384
385struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
386 .max_width = 4,
387 .host_caps = (MMC_CAP_4_BIT_DATA |
388 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
bad1e6aa
KK		 389};
390
391struct platform_device s3c_device_hsmmc1 = {
392 .name = "s3c-sdhci",
393 .id = 1,
394 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
395 .resource = s3c_hsmmc1_resource,
396 .dev = {
397 .dma_mask = &samsung_device_dma_mask,
398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &s3c_hsmmc1_def_platdata,
400 },
401};
402
403void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
404{
405 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
406}
407#endif /* CONFIG_S3C_DEV_HSMMC1 */
408
409/* HSMMC2 */
410
411#ifdef CONFIG_S3C_DEV_HSMMC2
412static struct resource s3c_hsmmc2_resource[] = {
e663cb76
KK		 413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
bad1e6aa
KK		 415};
416
417struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
418 .max_width = 4,
419 .host_caps = (MMC_CAP_4_BIT_DATA |
420 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
bad1e6aa
KK		 421};
422
423struct platform_device s3c_device_hsmmc2 = {
424 .name = "s3c-sdhci",
425 .id = 2,
426 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
427 .resource = s3c_hsmmc2_resource,
428 .dev = {
429 .dma_mask = &samsung_device_dma_mask,
430 .coherent_dma_mask = DMA_BIT_MASK(32),
431 .platform_data = &s3c_hsmmc2_def_platdata,
432 },
433};
434
435void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
436{
437 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
438}
439#endif /* CONFIG_S3C_DEV_HSMMC2 */
440
441#ifdef CONFIG_S3C_DEV_HSMMC3
442static struct resource s3c_hsmmc3_resource[] = {
e663cb76
KK		 443 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
444 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
bad1e6aa
KK		 445};
446
447struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
448 .max_width = 4,
449 .host_caps = (MMC_CAP_4_BIT_DATA |
450 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
bad1e6aa
KK		 451};
452
453struct platform_device s3c_device_hsmmc3 = {
454 .name = "s3c-sdhci",
455 .id = 3,
456 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
457 .resource = s3c_hsmmc3_resource,
458 .dev = {
459 .dma_mask = &samsung_device_dma_mask,
460 .coherent_dma_mask = DMA_BIT_MASK(32),
461 .platform_data = &s3c_hsmmc3_def_platdata,
462 },
463};
464
465void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
466{
467 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
468}
469#endif /* CONFIG_S3C_DEV_HSMMC3 */
470
471/* I2C */
472
473static struct resource s3c_i2c0_resource[] = {
e663cb76
KK		 474 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
475 [1] = DEFINE_RES_IRQ(IRQ_IIC),
bad1e6aa
KK		 476};
477
478struct platform_device s3c_device_i2c0 = {
479 .name = "s3c2410-i2c",
bad1e6aa 480 .id = 0,
bad1e6aa
KK		 481 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
482 .resource = s3c_i2c0_resource,
483};
484
485struct s3c2410_platform_i2c default_i2c_data __initdata = {
486 .flags = 0,
487 .slave_addr = 0x10,
488 .frequency = 100*1000,
489 .sda_delay = 100,
490};
491
492void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
493{
494 struct s3c2410_platform_i2c *npd;
495
693cec97 496 if (!pd) {
bad1e6aa 497 pd = &default_i2c_data;
693cec97
SN		 498 pd->bus_num = 0;
499 }
bad1e6aa
KK		 500
501 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
502 &s3c_device_i2c0);
503
504 if (!npd->cfg_gpio)
505 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
506}
507
508#ifdef CONFIG_S3C_DEV_I2C1
509static struct resource s3c_i2c1_resource[] = {
e663cb76
KK		 510 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
511 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
bad1e6aa
KK		 512};
513
514struct platform_device s3c_device_i2c1 = {
515 .name = "s3c2410-i2c",
516 .id = 1,
517 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
518 .resource = s3c_i2c1_resource,
519};
520
521void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
522{
523 struct s3c2410_platform_i2c *npd;
524
525 if (!pd) {
526 pd = &default_i2c_data;
527 pd->bus_num = 1;
528 }
529
530 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
531 &s3c_device_i2c1);
532
533 if (!npd->cfg_gpio)
534 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
535}
536#endif /* CONFIG_S3C_DEV_I2C1 */
537
538#ifdef CONFIG_S3C_DEV_I2C2
539static struct resource s3c_i2c2_resource[] = {
e663cb76
KK		 540 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
541 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
bad1e6aa
KK		 542};
543
544struct platform_device s3c_device_i2c2 = {
545 .name = "s3c2410-i2c",
546 .id = 2,
547 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
548 .resource = s3c_i2c2_resource,
549};
550
551void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
552{
553 struct s3c2410_platform_i2c *npd;
554
555 if (!pd) {
556 pd = &default_i2c_data;
557 pd->bus_num = 2;
558 }
559
560 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
561 &s3c_device_i2c2);
562
563 if (!npd->cfg_gpio)
564 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
565}
566#endif /* CONFIG_S3C_DEV_I2C2 */
567
568#ifdef CONFIG_S3C_DEV_I2C3
569static struct resource s3c_i2c3_resource[] = {
e663cb76
KK		 570 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
571 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
bad1e6aa
KK		 572};
573
574struct platform_device s3c_device_i2c3 = {
575 .name = "s3c2440-i2c",
576 .id = 3,
577 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
578 .resource = s3c_i2c3_resource,
579};
580
581void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
582{
583 struct s3c2410_platform_i2c *npd;
584
585 if (!pd) {
586 pd = &default_i2c_data;
587 pd->bus_num = 3;
588 }
589
590 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
591 &s3c_device_i2c3);
592
593 if (!npd->cfg_gpio)
594 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
595}
596#endif /*CONFIG_S3C_DEV_I2C3 */
597
598#ifdef CONFIG_S3C_DEV_I2C4
599static struct resource s3c_i2c4_resource[] = {
e663cb76
KK		 600 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
601 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
bad1e6aa
KK		 602};
603
604struct platform_device s3c_device_i2c4 = {
605 .name = "s3c2440-i2c",
606 .id = 4,
607 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
608 .resource = s3c_i2c4_resource,
609};
610
611void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
612{
613 struct s3c2410_platform_i2c *npd;
614
615 if (!pd) {
616 pd = &default_i2c_data;
617 pd->bus_num = 4;
618 }
619
620 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
621 &s3c_device_i2c4);
622
623 if (!npd->cfg_gpio)
624 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
625}
626#endif /*CONFIG_S3C_DEV_I2C4 */
627
628#ifdef CONFIG_S3C_DEV_I2C5
629static struct resource s3c_i2c5_resource[] = {
e663cb76
KK		 630 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
631 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
bad1e6aa
KK		 632};
633
634struct platform_device s3c_device_i2c5 = {
635 .name = "s3c2440-i2c",
636 .id = 5,
637 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
638 .resource = s3c_i2c5_resource,
639};
640
641void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
642{
643 struct s3c2410_platform_i2c *npd;
644
645 if (!pd) {
646 pd = &default_i2c_data;
647 pd->bus_num = 5;
648 }
649
650 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
651 &s3c_device_i2c5);
652
653 if (!npd->cfg_gpio)
654 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
655}
656#endif /*CONFIG_S3C_DEV_I2C5 */
657
658#ifdef CONFIG_S3C_DEV_I2C6
659static struct resource s3c_i2c6_resource[] = {
e663cb76
KK		 660 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
661 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
bad1e6aa
KK		 662};
663
664struct platform_device s3c_device_i2c6 = {
665 .name = "s3c2440-i2c",
666 .id = 6,
667 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
668 .resource = s3c_i2c6_resource,
669};
670
671void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
672{
673 struct s3c2410_platform_i2c *npd;
674
675 if (!pd) {
676 pd = &default_i2c_data;
677 pd->bus_num = 6;
678 }
679
680 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
681 &s3c_device_i2c6);
682
683 if (!npd->cfg_gpio)
684 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
685}
686#endif /* CONFIG_S3C_DEV_I2C6 */
687
688#ifdef CONFIG_S3C_DEV_I2C7
689static struct resource s3c_i2c7_resource[] = {
e663cb76
KK		 690 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
691 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
bad1e6aa
KK		 692};
693
694struct platform_device s3c_device_i2c7 = {
695 .name = "s3c2440-i2c",
696 .id = 7,
697 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
698 .resource = s3c_i2c7_resource,
699};
700
701void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
702{
703 struct s3c2410_platform_i2c *npd;
704
705 if (!pd) {
706 pd = &default_i2c_data;
707 pd->bus_num = 7;
708 }
709
710 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
711 &s3c_device_i2c7);
712
713 if (!npd->cfg_gpio)
714 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
715}
716#endif /* CONFIG_S3C_DEV_I2C7 */
717
57167149
KK		 718/* I2C HDMIPHY */
719
720#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
721static struct resource s5p_i2c_resource[] = {
e663cb76
KK		 722 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
723 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
57167149
KK		 724};
725
726struct platform_device s5p_device_i2c_hdmiphy = {
727 .name = "s3c2440-hdmiphy-i2c",
728 .id = -1,
729 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
730 .resource = s5p_i2c_resource,
731};
732
733void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
734{
735 struct s3c2410_platform_i2c *npd;
736
737 if (!pd) {
738 pd = &default_i2c_data;
739
70d291b2
SK		 740 if (soc_is_exynos4210() ||
741 soc_is_exynos4212() || soc_is_exynos4412())
57167149
KK		 742 pd->bus_num = 8;
743 else if (soc_is_s5pv210())
744 pd->bus_num = 3;
745 else
746 pd->bus_num = 0;
747 }
748
749 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
750 &s5p_device_i2c_hdmiphy);
751}
ee21ae68 752
a8321393 753static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
ee21ae68
TB		 754
755void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
756 struct i2c_board_info *mhl_info, int mhl_bus)
757{
758 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
759
760 if (soc_is_exynos4210() ||
761 soc_is_exynos4212() || soc_is_exynos4412())
762 pd->hdmiphy_bus = 8;
763 else if (soc_is_s5pv210())
764 pd->hdmiphy_bus = 3;
765 else
766 pd->hdmiphy_bus = 0;
767
768 pd->hdmiphy_info = hdmiphy_info;
769 pd->mhl_info = mhl_info;
770 pd->mhl_bus = mhl_bus;
771
772 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
773 &s5p_device_hdmi);
774}
775
57167149
KK		 776#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
777
61c542bf
KK		 778/* I2S */
779
780#ifdef CONFIG_PLAT_S3C24XX
781static struct resource s3c_iis_resource[] = {
e663cb76 782 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
61c542bf
KK		 783};
784
785struct platform_device s3c_device_iis = {
786 .name = "s3c24xx-iis",
787 .id = -1,
788 .num_resources = ARRAY_SIZE(s3c_iis_resource),
789 .resource = s3c_iis_resource,
790 .dev = {
791 .dma_mask = &samsung_device_dma_mask,
792 .coherent_dma_mask = DMA_BIT_MASK(32),
793 }
794};
795#endif /* CONFIG_PLAT_S3C24XX */
796
bad1e6aa
KK		 797/* IDE CFCON */
798
799#ifdef CONFIG_SAMSUNG_DEV_IDE
800static struct resource s3c_cfcon_resource[] = {
e663cb76
KK		 801 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
802 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
bad1e6aa
KK		 803};
804
805struct platform_device s3c_device_cfcon = {
806 .id = 0,
807 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
808 .resource = s3c_cfcon_resource,
809};
810
eff4c58d 811void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
bad1e6aa
KK		 812{
813 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
814 &s3c_device_cfcon);
815}
816#endif /* CONFIG_SAMSUNG_DEV_IDE */
817
818/* KEYPAD */
819
820#ifdef CONFIG_SAMSUNG_DEV_KEYPAD
821static struct resource samsung_keypad_resources[] = {
e663cb76
KK		 822 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
823 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
bad1e6aa
KK		 824};
825
826struct platform_device samsung_device_keypad = {
827 .name = "samsung-keypad",
828 .id = -1,
829 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
830 .resource = samsung_keypad_resources,
831};
832
833void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
834{
835 struct samsung_keypad_platdata *npd;
836
837 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
838 &samsung_device_keypad);
839
840 if (!npd->cfg_gpio)
841 npd->cfg_gpio = samsung_keypad_cfg_gpio;
842}
843#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
844
61c542bf
KK		 845/* LCD Controller */
846
847#ifdef CONFIG_PLAT_S3C24XX
848static struct resource s3c_lcd_resource[] = {
e663cb76
KK		 849 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
850 [1] = DEFINE_RES_IRQ(IRQ_LCD),
61c542bf
KK		 851};
852
853struct platform_device s3c_device_lcd = {
854 .name = "s3c2410-lcd",
855 .id = -1,
856 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
857 .resource = s3c_lcd_resource,
858 .dev = {
859 .dma_mask = &samsung_device_dma_mask,
860 .coherent_dma_mask = DMA_BIT_MASK(32),
861 }
862};
863
864void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
865{
866 struct s3c2410fb_mach_info *npd;
867
868 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
869 if (npd) {
870 npd->displays = kmemdup(pd->displays,
871 sizeof(struct s3c2410fb_display) * npd->num_displays,
872 GFP_KERNEL);
873 if (!npd->displays)
874 printk(KERN_ERR "no memory for LCD display data\n");
875 } else {
876 printk(KERN_ERR "no memory for LCD platform data\n");
877 }
878}
879#endif /* CONFIG_PLAT_S3C24XX */
880
57167149
KK		 881/* MIPI CSIS */
882
883#ifdef CONFIG_S5P_DEV_CSIS0
884static struct resource s5p_mipi_csis0_resource[] = {
75ac7284 885 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
e663cb76 886 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
57167149
KK		 887};
888
889struct platform_device s5p_device_mipi_csis0 = {
890 .name = "s5p-mipi-csis",
891 .id = 0,
892 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
893 .resource = s5p_mipi_csis0_resource,
894};
895#endif /* CONFIG_S5P_DEV_CSIS0 */
896
897#ifdef CONFIG_S5P_DEV_CSIS1
898static struct resource s5p_mipi_csis1_resource[] = {
75ac7284 899 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
e663cb76 900 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
57167149
KK		 901};
902
903struct platform_device s5p_device_mipi_csis1 = {
904 .name = "s5p-mipi-csis",
905 .id = 1,
906 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
907 .resource = s5p_mipi_csis1_resource,
908};
909#endif
910
bad1e6aa
KK		 911/* NAND */
912
913#ifdef CONFIG_S3C_DEV_NAND
914static struct resource s3c_nand_resource[] = {
e663cb76 915 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
bad1e6aa
KK		 916};
917
918struct platform_device s3c_device_nand = {
919 .name = "s3c2410-nand",
920 .id = -1,
921 .num_resources = ARRAY_SIZE(s3c_nand_resource),
922 .resource = s3c_nand_resource,
923};
924
925/*
926 * s3c_nand_copy_set() - copy nand set data
927 * @set: The new structure, directly copied from the old.
928 *
929 * Copy all the fields from the NAND set field from what is probably __initdata
930 * to new kernel memory. The code returns 0 if the copy happened correctly or
931 * an error code for the calling function to display.
932 *
933 * Note, we currently do not try and look to see if we've already copied the
934 * data in a previous set.
935 */
936static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
937{
938 void *ptr;
939 int size;
940
941 size = sizeof(struct mtd_partition) * set->nr_partitions;
942 if (size) {
943 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
944 set->partitions = ptr;
945
946 if (!ptr)
947 return -ENOMEM;
948 }
949
950 if (set->nr_map && set->nr_chips) {
951 size = sizeof(int) * set->nr_chips;
952 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
953 set->nr_map = ptr;
954
955 if (!ptr)
956 return -ENOMEM;
957 }
958
959 if (set->ecc_layout) {
960 ptr = kmemdup(set->ecc_layout,
961 sizeof(struct nand_ecclayout), GFP_KERNEL);
962 set->ecc_layout = ptr;
963
964 if (!ptr)
965 return -ENOMEM;
966 }
967
968 return 0;
969}
970
971void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
972{
973 struct s3c2410_platform_nand *npd;
974 int size;
975 int ret;
976
977 /* note, if we get a failure in allocation, we simply drop out of the
978 * function. If there is so little memory available at initialisation
979 * time then there is little chance the system is going to run.
980 */
981
982 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
983 &s3c_device_nand);
984 if (!npd)
985 return;
986
987 /* now see if we need to copy any of the nand set data */
988
989 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
990 if (size) {
991 struct s3c2410_nand_set *from = npd->sets;
992 struct s3c2410_nand_set *to;
993 int i;
994
995 to = kmemdup(from, size, GFP_KERNEL);
996 npd->sets = to; /* set, even if we failed */
997
998 if (!to) {
999 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1000 return;
1001 }
1002
1003 for (i = 0; i < npd->nr_sets; i++) {
1004 ret = s3c_nand_copy_set(to);
1005 if (ret) {
1006 printk(KERN_ERR "%s: failed to copy set %d\n",
1007 __func__, i);
1008 return;
1009 }
1010 to++;
1011 }
1012 }
1013}
1014#endif /* CONFIG_S3C_DEV_NAND */
1015
1016/* ONENAND */
1017
1018#ifdef CONFIG_S3C_DEV_ONENAND
1019static struct resource s3c_onenand_resources[] = {
e663cb76
KK		 1020 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1021 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1022 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
bad1e6aa
KK		 1023};
1024
1025struct platform_device s3c_device_onenand = {
1026 .name = "samsung-onenand",
1027 .id = 0,
1028 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1029 .resource = s3c_onenand_resources,
1030};
1031#endif /* CONFIG_S3C_DEV_ONENAND */
1032
0523ec3a
KK		 1033#ifdef CONFIG_S3C64XX_DEV_ONENAND1
1034static struct resource s3c64xx_onenand1_resources[] = {
e663cb76
KK		 1035 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1036 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1037 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
0523ec3a
KK		 1038};
1039
1040struct platform_device s3c64xx_device_onenand1 = {
1041 .name = "samsung-onenand",
1042 .id = 1,
1043 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1044 .resource = s3c64xx_onenand1_resources,
1045};
1046
eff4c58d 1047void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
0523ec3a
KK		 1048{
1049 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1050 &s3c64xx_device_onenand1);
1051}
1052#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1053
57167149
KK		 1054#ifdef CONFIG_S5P_DEV_ONENAND
1055static struct resource s5p_onenand_resources[] = {
e663cb76
KK		 1056 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1057 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1058 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
57167149
KK		 1059};
1060
1061struct platform_device s5p_device_onenand = {
1062 .name = "s5pc110-onenand",
1063 .id = -1,
1064 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1065 .resource = s5p_onenand_resources,
1066};
1067#endif /* CONFIG_S5P_DEV_ONENAND */
1068
1069/* PMU */
1070
1071#ifdef CONFIG_PLAT_S5P
e663cb76
KK		 1072static struct resource s5p_pmu_resource[] = {
1073 DEFINE_RES_IRQ(IRQ_PMU)
57167149
KK		 1074};
1075
6d259a25 1076static struct platform_device s5p_device_pmu = {
57167149 1077 .name = "arm-pmu",
df3d17e0 1078 .id = -1,
e663cb76
KK		 1079 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1080 .resource = s5p_pmu_resource,
57167149
KK		 1081};
1082
1083static int __init s5p_pmu_init(void)
1084{
1085 platform_device_register(&s5p_device_pmu);
1086 return 0;
1087}
1088arch_initcall(s5p_pmu_init);
1089#endif /* CONFIG_PLAT_S5P */
1090
bad1e6aa
KK		 1091/* PWM Timer */
1092
1093#ifdef CONFIG_SAMSUNG_DEV_PWM
1094
1095#define TIMER_RESOURCE_SIZE (1)
1096
1097#define TIMER_RESOURCE(_tmr, _irq) \
1098 (struct resource [TIMER_RESOURCE_SIZE]) { \
1099 [0] = { \
1100 .start = _irq, \
1101 .end = _irq, \
1102 .flags = IORESOURCE_IRQ \
1103 } \
1104 }
1105
1106#define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1107 .name = "s3c24xx-pwm", \
1108 .id = _tmr_no, \
1109 .num_resources = TIMER_RESOURCE_SIZE, \
1110 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1111
1112/*
1113 * since we already have an static mapping for the timer,
1114 * we do not bother setting any IO resource for the base.
1115 */
1116
1117struct platform_device s3c_device_timer[] = {
1118 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1119 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1120 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1121 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1122 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1123};
1124#endif /* CONFIG_SAMSUNG_DEV_PWM */
1125
61c542bf
KK		 1126/* RTC */
1127
1128#ifdef CONFIG_PLAT_S3C24XX
1129static struct resource s3c_rtc_resource[] = {
e663cb76
KK		 1130 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1131 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1132 [2] = DEFINE_RES_IRQ(IRQ_TICK),
61c542bf
KK		 1133};
1134
1135struct platform_device s3c_device_rtc = {
1136 .name = "s3c2410-rtc",
1137 .id = -1,
1138 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1139 .resource = s3c_rtc_resource,
1140};
1141#endif /* CONFIG_PLAT_S3C24XX */
1142
bad1e6aa
KK		 1143#ifdef CONFIG_S3C_DEV_RTC
1144static struct resource s3c_rtc_resource[] = {
e663cb76
KK		 1145 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1146 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1147 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
bad1e6aa
KK		 1148};
1149
1150struct platform_device s3c_device_rtc = {
1151 .name = "s3c64xx-rtc",
1152 .id = -1,
1153 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1154 .resource = s3c_rtc_resource,
1155};
1156#endif /* CONFIG_S3C_DEV_RTC */
1157
61c542bf
KK		 1158/* SDI */
1159
1160#ifdef CONFIG_PLAT_S3C24XX
1161static struct resource s3c_sdi_resource[] = {
e663cb76
KK		 1162 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1163 [1] = DEFINE_RES_IRQ(IRQ_SDI),
61c542bf
KK		 1164};
1165
1166struct platform_device s3c_device_sdi = {
1167 .name = "s3c2410-sdi",
1168 .id = -1,
1169 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1170 .resource = s3c_sdi_resource,
1171};
1172
1173void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1174{
1175 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1176 &s3c_device_sdi);
1177}
1178#endif /* CONFIG_PLAT_S3C24XX */
1179
1180/* SPI */
1181
1182#ifdef CONFIG_PLAT_S3C24XX
1183static struct resource s3c_spi0_resource[] = {
e663cb76
KK		 1184 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1185 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
61c542bf
KK		 1186};
1187
1188struct platform_device s3c_device_spi0 = {
1189 .name = "s3c2410-spi",
1190 .id = 0,
1191 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1192 .resource = s3c_spi0_resource,
1193 .dev = {
1194 .dma_mask = &samsung_device_dma_mask,
1195 .coherent_dma_mask = DMA_BIT_MASK(32),
1196 }
1197};
1198
1199static struct resource s3c_spi1_resource[] = {
e663cb76
KK		 1200 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1201 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
61c542bf
KK		 1202};
1203
1204struct platform_device s3c_device_spi1 = {
1205 .name = "s3c2410-spi",
1206 .id = 1,
1207 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1208 .resource = s3c_spi1_resource,
1209 .dev = {
1210 .dma_mask = &samsung_device_dma_mask,
1211 .coherent_dma_mask = DMA_BIT_MASK(32),
1212 }
1213};
1214#endif /* CONFIG_PLAT_S3C24XX */
1215
1216/* Touchscreen */
1217
1218#ifdef CONFIG_PLAT_S3C24XX
1219static struct resource s3c_ts_resource[] = {
e663cb76
KK		 1220 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1221 [1] = DEFINE_RES_IRQ(IRQ_TC),
61c542bf
KK		 1222};
1223
1224struct platform_device s3c_device_ts = {
1225 .name = "s3c2410-ts",
1226 .id = -1,
1227 .dev.parent = &s3c_device_adc.dev,
1228 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1229 .resource = s3c_ts_resource,
1230};
1231
1232void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1233{
1234 s3c_set_platdata(hard_s3c2410ts_info,
1235 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1236}
1237#endif /* CONFIG_PLAT_S3C24XX */
1238
bad1e6aa
KK		 1239#ifdef CONFIG_SAMSUNG_DEV_TS
1240static struct resource s3c_ts_resource[] = {
e663cb76
KK		 1241 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1242 [1] = DEFINE_RES_IRQ(IRQ_TC),
bad1e6aa
KK		 1243};
1244
1245static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1246 .delay = 10000,
1247 .presc = 49,
1248 .oversampling_shift = 2,
1249};
1250
1251struct platform_device s3c_device_ts = {
1252 .name = "s3c64xx-ts",
1253 .id = -1,
1254 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1255 .resource = s3c_ts_resource,
1256};
1257
1258void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1259{
1260 if (!pd)
1261 pd = &default_ts_data;
1262
1263 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1264 &s3c_device_ts);
1265}
1266#endif /* CONFIG_SAMSUNG_DEV_TS */
1267
57167149
KK		 1268/* TV */
1269
1270#ifdef CONFIG_S5P_DEV_TV
1271
1272static struct resource s5p_hdmi_resources[] = {
e663cb76
KK		 1273 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1274 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
57167149
KK		 1275};
1276
1277struct platform_device s5p_device_hdmi = {
1278 .name = "s5p-hdmi",
1279 .id = -1,
1280 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1281 .resource = s5p_hdmi_resources,
1282};
1283
1284static struct resource s5p_sdo_resources[] = {
e663cb76
KK		 1285 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1286 [1] = DEFINE_RES_IRQ(IRQ_SDO),
57167149
KK		 1287};
1288
1289struct platform_device s5p_device_sdo = {
1290 .name = "s5p-sdo",
1291 .id = -1,
1292 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1293 .resource = s5p_sdo_resources,
1294};
1295
1296static struct resource s5p_mixer_resources[] = {
e663cb76
KK		 1297 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1298 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1299 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
57167149
KK		 1300};
1301
1302struct platform_device s5p_device_mixer = {
1303 .name = "s5p-mixer",
1304 .id = -1,
1305 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1306 .resource = s5p_mixer_resources,
1307 .dev = {
1308 .dma_mask = &samsung_device_dma_mask,
1309 .coherent_dma_mask = DMA_BIT_MASK(32),
1310 }
1311};
1312#endif /* CONFIG_S5P_DEV_TV */
1313
bad1e6aa
KK		 1314/* USB */
1315
1316#ifdef CONFIG_S3C_DEV_USB_HOST
1317static struct resource s3c_usb_resource[] = {
e663cb76
KK		 1318 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1319 [1] = DEFINE_RES_IRQ(IRQ_USBH),
bad1e6aa
KK		 1320};
1321
1322struct platform_device s3c_device_ohci = {
1323 .name = "s3c2410-ohci",
1324 .id = -1,
1325 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1326 .resource = s3c_usb_resource,
1327 .dev = {
1328 .dma_mask = &samsung_device_dma_mask,
1329 .coherent_dma_mask = DMA_BIT_MASK(32),
1330 }
1331};
1332
1333/*
1334 * s3c_ohci_set_platdata - initialise OHCI device platform data
1335 * @info: The platform data.
1336 *
1337 * This call copies the @info passed in and sets the device .platform_data
1338 * field to that copy. The @info is copied so that the original can be marked
1339 * __initdata.
1340 */
1341
1342void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1343{
1344 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1345 &s3c_device_ohci);
1346}
1347#endif /* CONFIG_S3C_DEV_USB_HOST */
1348
61c542bf
KK		 1349/* USB Device (Gadget) */
1350
1351#ifdef CONFIG_PLAT_S3C24XX
1352static struct resource s3c_usbgadget_resource[] = {
e663cb76
KK		 1353 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1354 [1] = DEFINE_RES_IRQ(IRQ_USBD),
61c542bf
KK		 1355};
1356
1357struct platform_device s3c_device_usbgadget = {
1358 .name = "s3c2410-usbgadget",
1359 .id = -1,
1360 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1361 .resource = s3c_usbgadget_resource,
1362};
1363
1364void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1365{
1366 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1367}
1368#endif /* CONFIG_PLAT_S3C24XX */
1369
57167149
KK		 1370/* USB EHCI Host Controller */
1371
1372#ifdef CONFIG_S5P_DEV_USB_EHCI
1373static struct resource s5p_ehci_resource[] = {
e663cb76
KK		 1374 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1375 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
57167149
KK		 1376};
1377
1378struct platform_device s5p_device_ehci = {
1379 .name = "s5p-ehci",
1380 .id = -1,
1381 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1382 .resource = s5p_ehci_resource,
1383 .dev = {
1384 .dma_mask = &samsung_device_dma_mask,
1385 .coherent_dma_mask = DMA_BIT_MASK(32),
1386 }
1387};
1388
1389void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1390{
1391 struct s5p_ehci_platdata *npd;
1392
1393 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1394 &s5p_device_ehci);
1395
1396 if (!npd->phy_init)
1397 npd->phy_init = s5p_usb_phy_init;
1398 if (!npd->phy_exit)
1399 npd->phy_exit = s5p_usb_phy_exit;
1400}
1401#endif /* CONFIG_S5P_DEV_USB_EHCI */
1402
bad1e6aa
KK		 1403/* USB HSOTG */
1404
1405#ifdef CONFIG_S3C_DEV_USB_HSOTG
1406static struct resource s3c_usb_hsotg_resources[] = {
c65d8ef2 1407 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
e663cb76 1408 [1] = DEFINE_RES_IRQ(IRQ_OTG),
bad1e6aa
KK		 1409};
1410
1411struct platform_device s3c_device_usb_hsotg = {
1412 .name = "s3c-hsotg",
1413 .id = -1,
1414 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1415 .resource = s3c_usb_hsotg_resources,
1416 .dev = {
1417 .dma_mask = &samsung_device_dma_mask,
1418 .coherent_dma_mask = DMA_BIT_MASK(32),
1419 },
1420};
99f6e1f5
JS		 1421
1422void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1423{
1424 struct s3c_hsotg_plat *npd;
1425
1426 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1427 &s3c_device_usb_hsotg);
1428
1429 if (!npd->phy_init)
1430 npd->phy_init = s5p_usb_phy_init;
1431 if (!npd->phy_exit)
1432 npd->phy_exit = s5p_usb_phy_exit;
1433}
bad1e6aa
KK		 1434#endif /* CONFIG_S3C_DEV_USB_HSOTG */
1435
61c542bf
KK		 1436/* USB High Spped 2.0 Device (Gadget) */
1437
1438#ifdef CONFIG_PLAT_S3C24XX
1439static struct resource s3c_hsudc_resource[] = {
e663cb76
KK		 1440 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1441 [1] = DEFINE_RES_IRQ(IRQ_USBD),
61c542bf
KK		 1442};
1443
1444struct platform_device s3c_device_usb_hsudc = {
1445 .name = "s3c-hsudc",
1446 .id = -1,
1447 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1448 .resource = s3c_hsudc_resource,
1449 .dev = {
1450 .dma_mask = &samsung_device_dma_mask,
1451 .coherent_dma_mask = DMA_BIT_MASK(32),
1452 },
1453};
1454
1455void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1456{
1457 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1458}
1459#endif /* CONFIG_PLAT_S3C24XX */
bad1e6aa
KK		 1460
1461/* WDT */
1462
1463#ifdef CONFIG_S3C_DEV_WDT
1464static struct resource s3c_wdt_resource[] = {
e663cb76
KK		 1465 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1466 [1] = DEFINE_RES_IRQ(IRQ_WDT),
bad1e6aa
KK		 1467};
1468
1469struct platform_device s3c_device_wdt = {
1470 .name = "s3c2410-wdt",
1471 .id = -1,
1472 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1473 .resource = s3c_wdt_resource,
1474};
1475#endif /* CONFIG_S3C_DEV_WDT */
875a5937
PV		 1476
1477#ifdef CONFIG_S3C64XX_DEV_SPI0
1478static struct resource s3c64xx_spi0_resource[] = {
1479 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1480 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1481 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1482 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1483};
1484
1485struct platform_device s3c64xx_device_spi0 = {
4d0efdd5 1486 .name = "s3c6410-spi",
875a5937
PV		 1487 .id = 0,
1488 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1489 .resource = s3c64xx_spi0_resource,
1490 .dev = {
1491 .dma_mask = &samsung_device_dma_mask,
1492 .coherent_dma_mask = DMA_BIT_MASK(32),
1493 },
1494};
1495
4d0efdd5
TA		 1496void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1497 int num_cs)
875a5937 1498{
4d0efdd5 1499 struct s3c64xx_spi_info pd;
875a5937
PV		 1500
1501 /* Reject invalid configuration */
1502 if (!num_cs || src_clk_nr < 0) {
1503 pr_err("%s: Invalid SPI configuration\n", __func__);
1504 return;
1505 }
1506
4d0efdd5
TA		 1507 pd.num_cs = num_cs;
1508 pd.src_clk_nr = src_clk_nr;
1509 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
78843727
AB		 1510#ifdef CONFIG_PL330_DMA
1511 pd.filter = pl330_filter;
1512#endif
4566c7f7 1513
4d0efdd5 1514 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
875a5937
PV		 1515}
1516#endif /* CONFIG_S3C64XX_DEV_SPI0 */
1517
1518#ifdef CONFIG_S3C64XX_DEV_SPI1
1519static struct resource s3c64xx_spi1_resource[] = {
1520 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1521 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1522 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1523 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1524};
1525
1526struct platform_device s3c64xx_device_spi1 = {
4d0efdd5 1527 .name = "s3c6410-spi",
875a5937
PV		 1528 .id = 1,
1529 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1530 .resource = s3c64xx_spi1_resource,
1531 .dev = {
1532 .dma_mask = &samsung_device_dma_mask,
1533 .coherent_dma_mask = DMA_BIT_MASK(32),
1534 },
1535};
1536
4d0efdd5
TA		 1537void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1538 int num_cs)
875a5937 1539{
fb997a46
SN		 1540 struct s3c64xx_spi_info pd;
1541
875a5937
PV		 1542 /* Reject invalid configuration */
1543 if (!num_cs || src_clk_nr < 0) {
1544 pr_err("%s: Invalid SPI configuration\n", __func__);
1545 return;
1546 }
1547
4d0efdd5
TA		 1548 pd.num_cs = num_cs;
1549 pd.src_clk_nr = src_clk_nr;
1550 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
78843727
AB		 1551#ifdef CONFIG_PL330_DMA
1552 pd.filter = pl330_filter;
1553#endif
4566c7f7 1554
4d0efdd5 1555 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
875a5937
PV		 1556}
1557#endif /* CONFIG_S3C64XX_DEV_SPI1 */
1558
1559#ifdef CONFIG_S3C64XX_DEV_SPI2
1560static struct resource s3c64xx_spi2_resource[] = {
1561 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1562 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1563 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1564 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1565};
1566
1567struct platform_device s3c64xx_device_spi2 = {
4d0efdd5 1568 .name = "s3c6410-spi",
875a5937
PV		 1569 .id = 2,
1570 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1571 .resource = s3c64xx_spi2_resource,
1572 .dev = {
1573 .dma_mask = &samsung_device_dma_mask,
1574 .coherent_dma_mask = DMA_BIT_MASK(32),
1575 },
1576};
1577
4d0efdd5
TA		 1578void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1579 int num_cs)
875a5937 1580{
4d0efdd5 1581 struct s3c64xx_spi_info pd;
875a5937
PV		 1582
1583 /* Reject invalid configuration */
1584 if (!num_cs || src_clk_nr < 0) {
1585 pr_err("%s: Invalid SPI configuration\n", __func__);
1586 return;
1587 }
1588
4d0efdd5
TA		 1589 pd.num_cs = num_cs;
1590 pd.src_clk_nr = src_clk_nr;
1591 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
78843727
AB		 1592#ifdef CONFIG_PL330_DMA
1593 pd.filter = pl330_filter;
1594#endif
323d7717 1595
4d0efdd5 1596 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
875a5937
PV		 1597}
1598#endif /* CONFIG_S3C64XX_DEV_SPI2 */
Linux kernel - Deliverables
This page took 0.217016 seconds and 5 git commands to generate.