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61c542bf KK |
1 | /* linux/arch/arm/plat-samsung/devs.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Base SAMSUNG platform device definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
78843727 | 13 | #include <linux/amba/pl330.h> |
61c542bf KK |
14 | #include <linux/kernel.h> |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/serial_core.h> | |
334a1c70 | 21 | #include <linux/serial_s3c.h> |
61c542bf KK |
22 | #include <linux/platform_device.h> |
23 | #include <linux/io.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/dma-mapping.h> | |
57167149 KK |
27 | #include <linux/fb.h> |
28 | #include <linux/gfp.h> | |
0523ec3a KK |
29 | #include <linux/mtd/mtd.h> |
30 | #include <linux/mtd/onenand.h> | |
bad1e6aa KK |
31 | #include <linux/mtd/partitions.h> |
32 | #include <linux/mmc/host.h> | |
57167149 | 33 | #include <linux/ioport.h> |
715a3e41 | 34 | #include <linux/platform_data/s3c-hsudc.h> |
126625e1 | 35 | #include <linux/platform_data/s3c-hsotg.h> |
7f99ef22 | 36 | #include <linux/platform_data/dma-s3c24xx.h> |
61c542bf | 37 | |
ee21ae68 TB |
38 | #include <media/s5p_hdmi.h> |
39 | ||
61c542bf KK |
40 | #include <asm/irq.h> |
41 | #include <asm/mach/arch.h> | |
42 | #include <asm/mach/map.h> | |
43 | #include <asm/mach/irq.h> | |
44 | ||
45 | #include <mach/hardware.h> | |
46 | #include <mach/dma.h> | |
47 | #include <mach/irqs.h> | |
48 | #include <mach/map.h> | |
49 | ||
50 | #include <plat/cpu.h> | |
51 | #include <plat/devs.h> | |
bad1e6aa | 52 | #include <plat/adc.h> |
436d42c6 | 53 | #include <linux/platform_data/ata-samsung_cf.h> |
61c542bf KK |
54 | #include <plat/fb.h> |
55 | #include <plat/fb-s3c2410.h> | |
a8321393 | 56 | #include <plat/hdmi.h> |
436d42c6 AB |
57 | #include <linux/platform_data/hwmon-s3c.h> |
58 | #include <linux/platform_data/i2c-s3c2410.h> | |
bad1e6aa | 59 | #include <plat/keypad.h> |
436d42c6 AB |
60 | #include <linux/platform_data/mmc-s3cmci.h> |
61 | #include <linux/platform_data/mtd-nand-s3c2410.h> | |
95e43d46 | 62 | #include <plat/pwm-core.h> |
bad1e6aa | 63 | #include <plat/sdhci.h> |
436d42c6 AB |
64 | #include <linux/platform_data/touchscreen-s3c2410.h> |
65 | #include <linux/platform_data/usb-s3c2410_udc.h> | |
66 | #include <linux/platform_data/usb-ohci-s3c2410.h> | |
57167149 | 67 | #include <plat/usb-phy.h> |
61c542bf | 68 | #include <plat/regs-spi.h> |
436d42c6 | 69 | #include <linux/platform_data/spi-s3c64xx.h> |
61c542bf KK |
70 | |
71 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | |
72 | ||
73 | /* AC97 */ | |
74 | #ifdef CONFIG_CPU_S3C2440 | |
75 | static struct resource s3c_ac97_resource[] = { | |
e663cb76 KK |
76 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), |
77 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), | |
78 | [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"), | |
79 | [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"), | |
80 | [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"), | |
61c542bf KK |
81 | }; |
82 | ||
83 | struct platform_device s3c_device_ac97 = { | |
84 | .name = "samsung-ac97", | |
85 | .id = -1, | |
86 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | |
87 | .resource = s3c_ac97_resource, | |
88 | .dev = { | |
89 | .dma_mask = &samsung_device_dma_mask, | |
90 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
91 | } | |
92 | }; | |
93 | #endif /* CONFIG_CPU_S3C2440 */ | |
94 | ||
95 | /* ADC */ | |
96 | ||
97 | #ifdef CONFIG_PLAT_S3C24XX | |
98 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
99 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
100 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
101 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
61c542bf KK |
102 | }; |
103 | ||
104 | struct platform_device s3c_device_adc = { | |
105 | .name = "s3c24xx-adc", | |
106 | .id = -1, | |
107 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
108 | .resource = s3c_adc_resource, | |
109 | }; | |
110 | #endif /* CONFIG_PLAT_S3C24XX */ | |
111 | ||
bad1e6aa KK |
112 | #if defined(CONFIG_SAMSUNG_DEV_ADC) |
113 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
114 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
115 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
116 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
bad1e6aa KK |
117 | }; |
118 | ||
119 | struct platform_device s3c_device_adc = { | |
120 | .name = "samsung-adc", | |
121 | .id = -1, | |
122 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
123 | .resource = s3c_adc_resource, | |
124 | }; | |
125 | #endif /* CONFIG_SAMSUNG_DEV_ADC */ | |
126 | ||
61c542bf KK |
127 | /* Camif Controller */ |
128 | ||
129 | #ifdef CONFIG_CPU_S3C2440 | |
130 | static struct resource s3c_camif_resource[] = { | |
e663cb76 | 131 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), |
705c75e3 SN |
132 | [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), |
133 | [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), | |
61c542bf KK |
134 | }; |
135 | ||
136 | struct platform_device s3c_device_camif = { | |
137 | .name = "s3c2440-camif", | |
138 | .id = -1, | |
139 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | |
140 | .resource = s3c_camif_resource, | |
141 | .dev = { | |
142 | .dma_mask = &samsung_device_dma_mask, | |
143 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
144 | } | |
145 | }; | |
146 | #endif /* CONFIG_CPU_S3C2440 */ | |
147 | ||
bad1e6aa KK |
148 | /* ASOC DMA */ |
149 | ||
cb00e3a1 AB |
150 | #ifdef CONFIG_PLAT_S5P |
151 | static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0); | |
152 | ||
bad1e6aa KK |
153 | struct platform_device samsung_asoc_idma = { |
154 | .name = "samsung-idma", | |
155 | .id = -1, | |
cb00e3a1 AB |
156 | .num_resources = 1, |
157 | .resource = &samsung_asoc_idma_resource, | |
bad1e6aa KK |
158 | .dev = { |
159 | .dma_mask = &samsung_device_dma_mask, | |
160 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
161 | } | |
162 | }; | |
cb00e3a1 | 163 | #endif |
bad1e6aa KK |
164 | |
165 | /* FB */ | |
166 | ||
167 | #ifdef CONFIG_S3C_DEV_FB | |
168 | static struct resource s3c_fb_resource[] = { | |
e663cb76 KK |
169 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), |
170 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), | |
171 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), | |
172 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), | |
bad1e6aa KK |
173 | }; |
174 | ||
175 | struct platform_device s3c_device_fb = { | |
176 | .name = "s3c-fb", | |
177 | .id = -1, | |
178 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | |
179 | .resource = s3c_fb_resource, | |
180 | .dev = { | |
181 | .dma_mask = &samsung_device_dma_mask, | |
182 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
183 | }, | |
184 | }; | |
185 | ||
186 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | |
187 | { | |
188 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
189 | &s3c_device_fb); | |
190 | } | |
191 | #endif /* CONFIG_S3C_DEV_FB */ | |
192 | ||
57167149 KK |
193 | /* FIMC */ |
194 | ||
195 | #ifdef CONFIG_S5P_DEV_FIMC0 | |
196 | static struct resource s5p_fimc0_resource[] = { | |
e663cb76 KK |
197 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K), |
198 | [1] = DEFINE_RES_IRQ(IRQ_FIMC0), | |
57167149 KK |
199 | }; |
200 | ||
201 | struct platform_device s5p_device_fimc0 = { | |
202 | .name = "s5p-fimc", | |
203 | .id = 0, | |
204 | .num_resources = ARRAY_SIZE(s5p_fimc0_resource), | |
205 | .resource = s5p_fimc0_resource, | |
206 | .dev = { | |
207 | .dma_mask = &samsung_device_dma_mask, | |
208 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
209 | }, | |
210 | }; | |
07e87e15 SN |
211 | |
212 | struct platform_device s5p_device_fimc_md = { | |
213 | .name = "s5p-fimc-md", | |
214 | .id = -1, | |
215 | }; | |
57167149 KK |
216 | #endif /* CONFIG_S5P_DEV_FIMC0 */ |
217 | ||
218 | #ifdef CONFIG_S5P_DEV_FIMC1 | |
219 | static struct resource s5p_fimc1_resource[] = { | |
e663cb76 KK |
220 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K), |
221 | [1] = DEFINE_RES_IRQ(IRQ_FIMC1), | |
57167149 KK |
222 | }; |
223 | ||
224 | struct platform_device s5p_device_fimc1 = { | |
225 | .name = "s5p-fimc", | |
226 | .id = 1, | |
227 | .num_resources = ARRAY_SIZE(s5p_fimc1_resource), | |
228 | .resource = s5p_fimc1_resource, | |
229 | .dev = { | |
230 | .dma_mask = &samsung_device_dma_mask, | |
231 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
232 | }, | |
233 | }; | |
234 | #endif /* CONFIG_S5P_DEV_FIMC1 */ | |
235 | ||
236 | #ifdef CONFIG_S5P_DEV_FIMC2 | |
237 | static struct resource s5p_fimc2_resource[] = { | |
e663cb76 KK |
238 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K), |
239 | [1] = DEFINE_RES_IRQ(IRQ_FIMC2), | |
57167149 KK |
240 | }; |
241 | ||
242 | struct platform_device s5p_device_fimc2 = { | |
243 | .name = "s5p-fimc", | |
244 | .id = 2, | |
245 | .num_resources = ARRAY_SIZE(s5p_fimc2_resource), | |
246 | .resource = s5p_fimc2_resource, | |
247 | .dev = { | |
248 | .dma_mask = &samsung_device_dma_mask, | |
249 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
250 | }, | |
251 | }; | |
252 | #endif /* CONFIG_S5P_DEV_FIMC2 */ | |
253 | ||
254 | #ifdef CONFIG_S5P_DEV_FIMC3 | |
255 | static struct resource s5p_fimc3_resource[] = { | |
e663cb76 KK |
256 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K), |
257 | [1] = DEFINE_RES_IRQ(IRQ_FIMC3), | |
57167149 KK |
258 | }; |
259 | ||
260 | struct platform_device s5p_device_fimc3 = { | |
261 | .name = "s5p-fimc", | |
262 | .id = 3, | |
263 | .num_resources = ARRAY_SIZE(s5p_fimc3_resource), | |
264 | .resource = s5p_fimc3_resource, | |
265 | .dev = { | |
266 | .dma_mask = &samsung_device_dma_mask, | |
267 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
268 | }, | |
269 | }; | |
270 | #endif /* CONFIG_S5P_DEV_FIMC3 */ | |
271 | ||
561ab530 KD |
272 | /* G2D */ |
273 | ||
274 | #ifdef CONFIG_S5P_DEV_G2D | |
275 | static struct resource s5p_g2d_resource[] = { | |
24eec601 TB |
276 | [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K), |
277 | [1] = DEFINE_RES_IRQ(IRQ_2D), | |
561ab530 KD |
278 | }; |
279 | ||
280 | struct platform_device s5p_device_g2d = { | |
281 | .name = "s5p-g2d", | |
282 | .id = 0, | |
283 | .num_resources = ARRAY_SIZE(s5p_g2d_resource), | |
284 | .resource = s5p_g2d_resource, | |
285 | .dev = { | |
286 | .dma_mask = &samsung_device_dma_mask, | |
287 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
288 | }, | |
289 | }; | |
290 | #endif /* CONFIG_S5P_DEV_G2D */ | |
291 | ||
3dbe6d4c AP |
292 | #ifdef CONFIG_S5P_DEV_JPEG |
293 | static struct resource s5p_jpeg_resource[] = { | |
294 | [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K), | |
295 | [1] = DEFINE_RES_IRQ(IRQ_JPEG), | |
296 | }; | |
297 | ||
298 | struct platform_device s5p_device_jpeg = { | |
299 | .name = "s5p-jpeg", | |
300 | .id = 0, | |
301 | .num_resources = ARRAY_SIZE(s5p_jpeg_resource), | |
302 | .resource = s5p_jpeg_resource, | |
303 | .dev = { | |
304 | .dma_mask = &samsung_device_dma_mask, | |
305 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
306 | }, | |
307 | }; | |
308 | #endif /* CONFIG_S5P_DEV_JPEG */ | |
309 | ||
57167149 KK |
310 | /* FIMD0 */ |
311 | ||
312 | #ifdef CONFIG_S5P_DEV_FIMD0 | |
313 | static struct resource s5p_fimd0_resource[] = { | |
e663cb76 | 314 | [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), |
15f504f0 TF |
315 | [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"), |
316 | [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"), | |
317 | [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"), | |
57167149 KK |
318 | }; |
319 | ||
320 | struct platform_device s5p_device_fimd0 = { | |
321 | .name = "s5p-fb", | |
322 | .id = 0, | |
323 | .num_resources = ARRAY_SIZE(s5p_fimd0_resource), | |
324 | .resource = s5p_fimd0_resource, | |
325 | .dev = { | |
326 | .dma_mask = &samsung_device_dma_mask, | |
327 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
328 | }, | |
329 | }; | |
330 | ||
331 | void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd) | |
332 | { | |
333 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
334 | &s5p_device_fimd0); | |
335 | } | |
336 | #endif /* CONFIG_S5P_DEV_FIMD0 */ | |
337 | ||
bad1e6aa KK |
338 | /* HWMON */ |
339 | ||
340 | #ifdef CONFIG_S3C_DEV_HWMON | |
341 | struct platform_device s3c_device_hwmon = { | |
342 | .name = "s3c-hwmon", | |
343 | .id = -1, | |
344 | .dev.parent = &s3c_device_adc.dev, | |
345 | }; | |
346 | ||
347 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | |
348 | { | |
349 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | |
350 | &s3c_device_hwmon); | |
351 | } | |
352 | #endif /* CONFIG_S3C_DEV_HWMON */ | |
353 | ||
354 | /* HSMMC */ | |
355 | ||
bad1e6aa KK |
356 | #ifdef CONFIG_S3C_DEV_HSMMC |
357 | static struct resource s3c_hsmmc_resource[] = { | |
e663cb76 KK |
358 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), |
359 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), | |
bad1e6aa KK |
360 | }; |
361 | ||
362 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | |
363 | .max_width = 4, | |
364 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
365 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
366 | }; |
367 | ||
368 | struct platform_device s3c_device_hsmmc0 = { | |
369 | .name = "s3c-sdhci", | |
370 | .id = 0, | |
371 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | |
372 | .resource = s3c_hsmmc_resource, | |
373 | .dev = { | |
374 | .dma_mask = &samsung_device_dma_mask, | |
375 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
376 | .platform_data = &s3c_hsmmc0_def_platdata, | |
377 | }, | |
378 | }; | |
379 | ||
380 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |
381 | { | |
382 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | |
383 | } | |
384 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
385 | ||
386 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
387 | static struct resource s3c_hsmmc1_resource[] = { | |
e663cb76 KK |
388 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), |
389 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), | |
bad1e6aa KK |
390 | }; |
391 | ||
392 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | |
393 | .max_width = 4, | |
394 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
395 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
396 | }; |
397 | ||
398 | struct platform_device s3c_device_hsmmc1 = { | |
399 | .name = "s3c-sdhci", | |
400 | .id = 1, | |
401 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | |
402 | .resource = s3c_hsmmc1_resource, | |
403 | .dev = { | |
404 | .dma_mask = &samsung_device_dma_mask, | |
405 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
406 | .platform_data = &s3c_hsmmc1_def_platdata, | |
407 | }, | |
408 | }; | |
409 | ||
410 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |
411 | { | |
412 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | |
413 | } | |
414 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
415 | ||
416 | /* HSMMC2 */ | |
417 | ||
418 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
419 | static struct resource s3c_hsmmc2_resource[] = { | |
e663cb76 KK |
420 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), |
421 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), | |
bad1e6aa KK |
422 | }; |
423 | ||
424 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | |
425 | .max_width = 4, | |
426 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
427 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
428 | }; |
429 | ||
430 | struct platform_device s3c_device_hsmmc2 = { | |
431 | .name = "s3c-sdhci", | |
432 | .id = 2, | |
433 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | |
434 | .resource = s3c_hsmmc2_resource, | |
435 | .dev = { | |
436 | .dma_mask = &samsung_device_dma_mask, | |
437 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
438 | .platform_data = &s3c_hsmmc2_def_platdata, | |
439 | }, | |
440 | }; | |
441 | ||
442 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |
443 | { | |
444 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | |
445 | } | |
446 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
447 | ||
448 | #ifdef CONFIG_S3C_DEV_HSMMC3 | |
449 | static struct resource s3c_hsmmc3_resource[] = { | |
e663cb76 KK |
450 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), |
451 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), | |
bad1e6aa KK |
452 | }; |
453 | ||
454 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | |
455 | .max_width = 4, | |
456 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
457 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
458 | }; |
459 | ||
460 | struct platform_device s3c_device_hsmmc3 = { | |
461 | .name = "s3c-sdhci", | |
462 | .id = 3, | |
463 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | |
464 | .resource = s3c_hsmmc3_resource, | |
465 | .dev = { | |
466 | .dma_mask = &samsung_device_dma_mask, | |
467 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
468 | .platform_data = &s3c_hsmmc3_def_platdata, | |
469 | }, | |
470 | }; | |
471 | ||
472 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | |
473 | { | |
474 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | |
475 | } | |
476 | #endif /* CONFIG_S3C_DEV_HSMMC3 */ | |
477 | ||
478 | /* I2C */ | |
479 | ||
480 | static struct resource s3c_i2c0_resource[] = { | |
e663cb76 KK |
481 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), |
482 | [1] = DEFINE_RES_IRQ(IRQ_IIC), | |
bad1e6aa KK |
483 | }; |
484 | ||
485 | struct platform_device s3c_device_i2c0 = { | |
486 | .name = "s3c2410-i2c", | |
bad1e6aa | 487 | .id = 0, |
bad1e6aa KK |
488 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), |
489 | .resource = s3c_i2c0_resource, | |
490 | }; | |
491 | ||
492 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | |
493 | .flags = 0, | |
494 | .slave_addr = 0x10, | |
495 | .frequency = 100*1000, | |
496 | .sda_delay = 100, | |
497 | }; | |
498 | ||
499 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
500 | { | |
501 | struct s3c2410_platform_i2c *npd; | |
502 | ||
693cec97 | 503 | if (!pd) { |
bad1e6aa | 504 | pd = &default_i2c_data; |
693cec97 SN |
505 | pd->bus_num = 0; |
506 | } | |
bad1e6aa KK |
507 | |
508 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
509 | &s3c_device_i2c0); | |
510 | ||
511 | if (!npd->cfg_gpio) | |
512 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | |
513 | } | |
514 | ||
515 | #ifdef CONFIG_S3C_DEV_I2C1 | |
516 | static struct resource s3c_i2c1_resource[] = { | |
e663cb76 KK |
517 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), |
518 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), | |
bad1e6aa KK |
519 | }; |
520 | ||
521 | struct platform_device s3c_device_i2c1 = { | |
522 | .name = "s3c2410-i2c", | |
523 | .id = 1, | |
524 | .num_resources = ARRAY_SIZE(s3c_i2c1_resource), | |
525 | .resource = s3c_i2c1_resource, | |
526 | }; | |
527 | ||
528 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
529 | { | |
530 | struct s3c2410_platform_i2c *npd; | |
531 | ||
532 | if (!pd) { | |
533 | pd = &default_i2c_data; | |
534 | pd->bus_num = 1; | |
535 | } | |
536 | ||
537 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
538 | &s3c_device_i2c1); | |
539 | ||
540 | if (!npd->cfg_gpio) | |
541 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | |
542 | } | |
543 | #endif /* CONFIG_S3C_DEV_I2C1 */ | |
544 | ||
545 | #ifdef CONFIG_S3C_DEV_I2C2 | |
546 | static struct resource s3c_i2c2_resource[] = { | |
e663cb76 KK |
547 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), |
548 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), | |
bad1e6aa KK |
549 | }; |
550 | ||
551 | struct platform_device s3c_device_i2c2 = { | |
552 | .name = "s3c2410-i2c", | |
553 | .id = 2, | |
554 | .num_resources = ARRAY_SIZE(s3c_i2c2_resource), | |
555 | .resource = s3c_i2c2_resource, | |
556 | }; | |
557 | ||
558 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
559 | { | |
560 | struct s3c2410_platform_i2c *npd; | |
561 | ||
562 | if (!pd) { | |
563 | pd = &default_i2c_data; | |
564 | pd->bus_num = 2; | |
565 | } | |
566 | ||
567 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
568 | &s3c_device_i2c2); | |
569 | ||
570 | if (!npd->cfg_gpio) | |
571 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | |
572 | } | |
573 | #endif /* CONFIG_S3C_DEV_I2C2 */ | |
574 | ||
575 | #ifdef CONFIG_S3C_DEV_I2C3 | |
576 | static struct resource s3c_i2c3_resource[] = { | |
e663cb76 KK |
577 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), |
578 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), | |
bad1e6aa KK |
579 | }; |
580 | ||
581 | struct platform_device s3c_device_i2c3 = { | |
582 | .name = "s3c2440-i2c", | |
583 | .id = 3, | |
584 | .num_resources = ARRAY_SIZE(s3c_i2c3_resource), | |
585 | .resource = s3c_i2c3_resource, | |
586 | }; | |
587 | ||
588 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | |
589 | { | |
590 | struct s3c2410_platform_i2c *npd; | |
591 | ||
592 | if (!pd) { | |
593 | pd = &default_i2c_data; | |
594 | pd->bus_num = 3; | |
595 | } | |
596 | ||
597 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
598 | &s3c_device_i2c3); | |
599 | ||
600 | if (!npd->cfg_gpio) | |
601 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | |
602 | } | |
603 | #endif /*CONFIG_S3C_DEV_I2C3 */ | |
604 | ||
605 | #ifdef CONFIG_S3C_DEV_I2C4 | |
606 | static struct resource s3c_i2c4_resource[] = { | |
e663cb76 KK |
607 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), |
608 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), | |
bad1e6aa KK |
609 | }; |
610 | ||
611 | struct platform_device s3c_device_i2c4 = { | |
612 | .name = "s3c2440-i2c", | |
613 | .id = 4, | |
614 | .num_resources = ARRAY_SIZE(s3c_i2c4_resource), | |
615 | .resource = s3c_i2c4_resource, | |
616 | }; | |
617 | ||
618 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | |
619 | { | |
620 | struct s3c2410_platform_i2c *npd; | |
621 | ||
622 | if (!pd) { | |
623 | pd = &default_i2c_data; | |
624 | pd->bus_num = 4; | |
625 | } | |
626 | ||
627 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
628 | &s3c_device_i2c4); | |
629 | ||
630 | if (!npd->cfg_gpio) | |
631 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | |
632 | } | |
633 | #endif /*CONFIG_S3C_DEV_I2C4 */ | |
634 | ||
635 | #ifdef CONFIG_S3C_DEV_I2C5 | |
636 | static struct resource s3c_i2c5_resource[] = { | |
e663cb76 KK |
637 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), |
638 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), | |
bad1e6aa KK |
639 | }; |
640 | ||
641 | struct platform_device s3c_device_i2c5 = { | |
642 | .name = "s3c2440-i2c", | |
643 | .id = 5, | |
644 | .num_resources = ARRAY_SIZE(s3c_i2c5_resource), | |
645 | .resource = s3c_i2c5_resource, | |
646 | }; | |
647 | ||
648 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | |
649 | { | |
650 | struct s3c2410_platform_i2c *npd; | |
651 | ||
652 | if (!pd) { | |
653 | pd = &default_i2c_data; | |
654 | pd->bus_num = 5; | |
655 | } | |
656 | ||
657 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
658 | &s3c_device_i2c5); | |
659 | ||
660 | if (!npd->cfg_gpio) | |
661 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | |
662 | } | |
663 | #endif /*CONFIG_S3C_DEV_I2C5 */ | |
664 | ||
665 | #ifdef CONFIG_S3C_DEV_I2C6 | |
666 | static struct resource s3c_i2c6_resource[] = { | |
e663cb76 KK |
667 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), |
668 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), | |
bad1e6aa KK |
669 | }; |
670 | ||
671 | struct platform_device s3c_device_i2c6 = { | |
672 | .name = "s3c2440-i2c", | |
673 | .id = 6, | |
674 | .num_resources = ARRAY_SIZE(s3c_i2c6_resource), | |
675 | .resource = s3c_i2c6_resource, | |
676 | }; | |
677 | ||
678 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | |
679 | { | |
680 | struct s3c2410_platform_i2c *npd; | |
681 | ||
682 | if (!pd) { | |
683 | pd = &default_i2c_data; | |
684 | pd->bus_num = 6; | |
685 | } | |
686 | ||
687 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
688 | &s3c_device_i2c6); | |
689 | ||
690 | if (!npd->cfg_gpio) | |
691 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | |
692 | } | |
693 | #endif /* CONFIG_S3C_DEV_I2C6 */ | |
694 | ||
695 | #ifdef CONFIG_S3C_DEV_I2C7 | |
696 | static struct resource s3c_i2c7_resource[] = { | |
e663cb76 KK |
697 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), |
698 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), | |
bad1e6aa KK |
699 | }; |
700 | ||
701 | struct platform_device s3c_device_i2c7 = { | |
702 | .name = "s3c2440-i2c", | |
703 | .id = 7, | |
704 | .num_resources = ARRAY_SIZE(s3c_i2c7_resource), | |
705 | .resource = s3c_i2c7_resource, | |
706 | }; | |
707 | ||
708 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | |
709 | { | |
710 | struct s3c2410_platform_i2c *npd; | |
711 | ||
712 | if (!pd) { | |
713 | pd = &default_i2c_data; | |
714 | pd->bus_num = 7; | |
715 | } | |
716 | ||
717 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
718 | &s3c_device_i2c7); | |
719 | ||
720 | if (!npd->cfg_gpio) | |
721 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | |
722 | } | |
723 | #endif /* CONFIG_S3C_DEV_I2C7 */ | |
724 | ||
57167149 KK |
725 | /* I2C HDMIPHY */ |
726 | ||
727 | #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY | |
728 | static struct resource s5p_i2c_resource[] = { | |
e663cb76 KK |
729 | [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K), |
730 | [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY), | |
57167149 KK |
731 | }; |
732 | ||
733 | struct platform_device s5p_device_i2c_hdmiphy = { | |
734 | .name = "s3c2440-hdmiphy-i2c", | |
735 | .id = -1, | |
736 | .num_resources = ARRAY_SIZE(s5p_i2c_resource), | |
737 | .resource = s5p_i2c_resource, | |
738 | }; | |
739 | ||
740 | void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) | |
741 | { | |
742 | struct s3c2410_platform_i2c *npd; | |
743 | ||
744 | if (!pd) { | |
745 | pd = &default_i2c_data; | |
746 | ||
70d291b2 SK |
747 | if (soc_is_exynos4210() || |
748 | soc_is_exynos4212() || soc_is_exynos4412()) | |
57167149 KK |
749 | pd->bus_num = 8; |
750 | else if (soc_is_s5pv210()) | |
751 | pd->bus_num = 3; | |
752 | else | |
753 | pd->bus_num = 0; | |
754 | } | |
755 | ||
756 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
757 | &s5p_device_i2c_hdmiphy); | |
758 | } | |
ee21ae68 | 759 | |
a8321393 | 760 | static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata; |
ee21ae68 TB |
761 | |
762 | void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info, | |
763 | struct i2c_board_info *mhl_info, int mhl_bus) | |
764 | { | |
765 | struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata; | |
766 | ||
767 | if (soc_is_exynos4210() || | |
768 | soc_is_exynos4212() || soc_is_exynos4412()) | |
769 | pd->hdmiphy_bus = 8; | |
770 | else if (soc_is_s5pv210()) | |
771 | pd->hdmiphy_bus = 3; | |
772 | else | |
773 | pd->hdmiphy_bus = 0; | |
774 | ||
775 | pd->hdmiphy_info = hdmiphy_info; | |
776 | pd->mhl_info = mhl_info; | |
777 | pd->mhl_bus = mhl_bus; | |
778 | ||
779 | s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data), | |
780 | &s5p_device_hdmi); | |
781 | } | |
782 | ||
57167149 KK |
783 | #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ |
784 | ||
61c542bf KK |
785 | /* I2S */ |
786 | ||
787 | #ifdef CONFIG_PLAT_S3C24XX | |
788 | static struct resource s3c_iis_resource[] = { | |
e663cb76 | 789 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), |
61c542bf KK |
790 | }; |
791 | ||
792 | struct platform_device s3c_device_iis = { | |
793 | .name = "s3c24xx-iis", | |
794 | .id = -1, | |
795 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | |
796 | .resource = s3c_iis_resource, | |
797 | .dev = { | |
798 | .dma_mask = &samsung_device_dma_mask, | |
799 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
800 | } | |
801 | }; | |
802 | #endif /* CONFIG_PLAT_S3C24XX */ | |
803 | ||
bad1e6aa KK |
804 | /* IDE CFCON */ |
805 | ||
806 | #ifdef CONFIG_SAMSUNG_DEV_IDE | |
807 | static struct resource s3c_cfcon_resource[] = { | |
e663cb76 KK |
808 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), |
809 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), | |
bad1e6aa KK |
810 | }; |
811 | ||
812 | struct platform_device s3c_device_cfcon = { | |
813 | .id = 0, | |
814 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | |
815 | .resource = s3c_cfcon_resource, | |
816 | }; | |
817 | ||
eff4c58d | 818 | void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) |
bad1e6aa KK |
819 | { |
820 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | |
821 | &s3c_device_cfcon); | |
822 | } | |
823 | #endif /* CONFIG_SAMSUNG_DEV_IDE */ | |
824 | ||
825 | /* KEYPAD */ | |
826 | ||
827 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | |
828 | static struct resource samsung_keypad_resources[] = { | |
e663cb76 KK |
829 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), |
830 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), | |
bad1e6aa KK |
831 | }; |
832 | ||
833 | struct platform_device samsung_device_keypad = { | |
834 | .name = "samsung-keypad", | |
835 | .id = -1, | |
836 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | |
837 | .resource = samsung_keypad_resources, | |
838 | }; | |
839 | ||
840 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | |
841 | { | |
842 | struct samsung_keypad_platdata *npd; | |
843 | ||
844 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | |
845 | &samsung_device_keypad); | |
846 | ||
847 | if (!npd->cfg_gpio) | |
848 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | |
849 | } | |
850 | #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ | |
851 | ||
61c542bf KK |
852 | /* LCD Controller */ |
853 | ||
854 | #ifdef CONFIG_PLAT_S3C24XX | |
855 | static struct resource s3c_lcd_resource[] = { | |
e663cb76 KK |
856 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), |
857 | [1] = DEFINE_RES_IRQ(IRQ_LCD), | |
61c542bf KK |
858 | }; |
859 | ||
860 | struct platform_device s3c_device_lcd = { | |
861 | .name = "s3c2410-lcd", | |
862 | .id = -1, | |
863 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | |
864 | .resource = s3c_lcd_resource, | |
865 | .dev = { | |
866 | .dma_mask = &samsung_device_dma_mask, | |
867 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
868 | } | |
869 | }; | |
870 | ||
871 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |
872 | { | |
873 | struct s3c2410fb_mach_info *npd; | |
874 | ||
875 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | |
876 | if (npd) { | |
877 | npd->displays = kmemdup(pd->displays, | |
878 | sizeof(struct s3c2410fb_display) * npd->num_displays, | |
879 | GFP_KERNEL); | |
880 | if (!npd->displays) | |
881 | printk(KERN_ERR "no memory for LCD display data\n"); | |
882 | } else { | |
883 | printk(KERN_ERR "no memory for LCD platform data\n"); | |
884 | } | |
885 | } | |
886 | #endif /* CONFIG_PLAT_S3C24XX */ | |
887 | ||
57167149 KK |
888 | /* MIPI CSIS */ |
889 | ||
890 | #ifdef CONFIG_S5P_DEV_CSIS0 | |
891 | static struct resource s5p_mipi_csis0_resource[] = { | |
75ac7284 | 892 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K), |
e663cb76 | 893 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0), |
57167149 KK |
894 | }; |
895 | ||
896 | struct platform_device s5p_device_mipi_csis0 = { | |
897 | .name = "s5p-mipi-csis", | |
898 | .id = 0, | |
899 | .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), | |
900 | .resource = s5p_mipi_csis0_resource, | |
901 | }; | |
902 | #endif /* CONFIG_S5P_DEV_CSIS0 */ | |
903 | ||
904 | #ifdef CONFIG_S5P_DEV_CSIS1 | |
905 | static struct resource s5p_mipi_csis1_resource[] = { | |
75ac7284 | 906 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K), |
e663cb76 | 907 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1), |
57167149 KK |
908 | }; |
909 | ||
910 | struct platform_device s5p_device_mipi_csis1 = { | |
911 | .name = "s5p-mipi-csis", | |
912 | .id = 1, | |
913 | .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), | |
914 | .resource = s5p_mipi_csis1_resource, | |
915 | }; | |
916 | #endif | |
917 | ||
bad1e6aa KK |
918 | /* NAND */ |
919 | ||
920 | #ifdef CONFIG_S3C_DEV_NAND | |
921 | static struct resource s3c_nand_resource[] = { | |
e663cb76 | 922 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), |
bad1e6aa KK |
923 | }; |
924 | ||
925 | struct platform_device s3c_device_nand = { | |
926 | .name = "s3c2410-nand", | |
927 | .id = -1, | |
928 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | |
929 | .resource = s3c_nand_resource, | |
930 | }; | |
931 | ||
932 | /* | |
933 | * s3c_nand_copy_set() - copy nand set data | |
934 | * @set: The new structure, directly copied from the old. | |
935 | * | |
936 | * Copy all the fields from the NAND set field from what is probably __initdata | |
937 | * to new kernel memory. The code returns 0 if the copy happened correctly or | |
938 | * an error code for the calling function to display. | |
939 | * | |
940 | * Note, we currently do not try and look to see if we've already copied the | |
941 | * data in a previous set. | |
942 | */ | |
943 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | |
944 | { | |
945 | void *ptr; | |
946 | int size; | |
947 | ||
948 | size = sizeof(struct mtd_partition) * set->nr_partitions; | |
949 | if (size) { | |
950 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | |
951 | set->partitions = ptr; | |
952 | ||
953 | if (!ptr) | |
954 | return -ENOMEM; | |
955 | } | |
956 | ||
957 | if (set->nr_map && set->nr_chips) { | |
958 | size = sizeof(int) * set->nr_chips; | |
959 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | |
960 | set->nr_map = ptr; | |
961 | ||
962 | if (!ptr) | |
963 | return -ENOMEM; | |
964 | } | |
965 | ||
966 | if (set->ecc_layout) { | |
967 | ptr = kmemdup(set->ecc_layout, | |
968 | sizeof(struct nand_ecclayout), GFP_KERNEL); | |
969 | set->ecc_layout = ptr; | |
970 | ||
971 | if (!ptr) | |
972 | return -ENOMEM; | |
973 | } | |
974 | ||
975 | return 0; | |
976 | } | |
977 | ||
978 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |
979 | { | |
980 | struct s3c2410_platform_nand *npd; | |
981 | int size; | |
982 | int ret; | |
983 | ||
984 | /* note, if we get a failure in allocation, we simply drop out of the | |
985 | * function. If there is so little memory available at initialisation | |
986 | * time then there is little chance the system is going to run. | |
987 | */ | |
988 | ||
989 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | |
990 | &s3c_device_nand); | |
991 | if (!npd) | |
992 | return; | |
993 | ||
994 | /* now see if we need to copy any of the nand set data */ | |
995 | ||
996 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | |
997 | if (size) { | |
998 | struct s3c2410_nand_set *from = npd->sets; | |
999 | struct s3c2410_nand_set *to; | |
1000 | int i; | |
1001 | ||
1002 | to = kmemdup(from, size, GFP_KERNEL); | |
1003 | npd->sets = to; /* set, even if we failed */ | |
1004 | ||
1005 | if (!to) { | |
1006 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | |
1007 | return; | |
1008 | } | |
1009 | ||
1010 | for (i = 0; i < npd->nr_sets; i++) { | |
1011 | ret = s3c_nand_copy_set(to); | |
1012 | if (ret) { | |
1013 | printk(KERN_ERR "%s: failed to copy set %d\n", | |
1014 | __func__, i); | |
1015 | return; | |
1016 | } | |
1017 | to++; | |
1018 | } | |
1019 | } | |
1020 | } | |
1021 | #endif /* CONFIG_S3C_DEV_NAND */ | |
1022 | ||
1023 | /* ONENAND */ | |
1024 | ||
1025 | #ifdef CONFIG_S3C_DEV_ONENAND | |
1026 | static struct resource s3c_onenand_resources[] = { | |
e663cb76 KK |
1027 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), |
1028 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), | |
1029 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), | |
bad1e6aa KK |
1030 | }; |
1031 | ||
1032 | struct platform_device s3c_device_onenand = { | |
1033 | .name = "samsung-onenand", | |
1034 | .id = 0, | |
1035 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | |
1036 | .resource = s3c_onenand_resources, | |
1037 | }; | |
1038 | #endif /* CONFIG_S3C_DEV_ONENAND */ | |
1039 | ||
0523ec3a KK |
1040 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 |
1041 | static struct resource s3c64xx_onenand1_resources[] = { | |
e663cb76 KK |
1042 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), |
1043 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), | |
1044 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), | |
0523ec3a KK |
1045 | }; |
1046 | ||
1047 | struct platform_device s3c64xx_device_onenand1 = { | |
1048 | .name = "samsung-onenand", | |
1049 | .id = 1, | |
1050 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | |
1051 | .resource = s3c64xx_onenand1_resources, | |
1052 | }; | |
1053 | ||
eff4c58d | 1054 | void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) |
0523ec3a KK |
1055 | { |
1056 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | |
1057 | &s3c64xx_device_onenand1); | |
1058 | } | |
1059 | #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ | |
1060 | ||
57167149 KK |
1061 | #ifdef CONFIG_S5P_DEV_ONENAND |
1062 | static struct resource s5p_onenand_resources[] = { | |
e663cb76 KK |
1063 | [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K), |
1064 | [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K), | |
1065 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI), | |
57167149 KK |
1066 | }; |
1067 | ||
1068 | struct platform_device s5p_device_onenand = { | |
1069 | .name = "s5pc110-onenand", | |
1070 | .id = -1, | |
1071 | .num_resources = ARRAY_SIZE(s5p_onenand_resources), | |
1072 | .resource = s5p_onenand_resources, | |
1073 | }; | |
1074 | #endif /* CONFIG_S5P_DEV_ONENAND */ | |
1075 | ||
1076 | /* PMU */ | |
1077 | ||
b7bbdbee | 1078 | #if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS) |
e663cb76 KK |
1079 | static struct resource s5p_pmu_resource[] = { |
1080 | DEFINE_RES_IRQ(IRQ_PMU) | |
57167149 KK |
1081 | }; |
1082 | ||
6d259a25 | 1083 | static struct platform_device s5p_device_pmu = { |
57167149 | 1084 | .name = "arm-pmu", |
df3d17e0 | 1085 | .id = -1, |
e663cb76 KK |
1086 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), |
1087 | .resource = s5p_pmu_resource, | |
57167149 KK |
1088 | }; |
1089 | ||
1090 | static int __init s5p_pmu_init(void) | |
1091 | { | |
1092 | platform_device_register(&s5p_device_pmu); | |
1093 | return 0; | |
1094 | } | |
1095 | arch_initcall(s5p_pmu_init); | |
1096 | #endif /* CONFIG_PLAT_S5P */ | |
1097 | ||
bad1e6aa KK |
1098 | /* PWM Timer */ |
1099 | ||
1100 | #ifdef CONFIG_SAMSUNG_DEV_PWM | |
95e43d46 TF |
1101 | static struct resource samsung_pwm_resource[] = { |
1102 | DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K), | |
1103 | }; | |
1104 | ||
1105 | struct platform_device samsung_device_pwm = { | |
1106 | .name = "samsung-pwm", | |
1107 | .id = -1, | |
1108 | .num_resources = ARRAY_SIZE(samsung_pwm_resource), | |
1109 | .resource = samsung_pwm_resource, | |
1110 | }; | |
1111 | ||
1112 | void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) | |
1113 | { | |
1114 | samsung_device_pwm.dev.platform_data = pd; | |
1115 | } | |
bad1e6aa KK |
1116 | #endif /* CONFIG_SAMSUNG_DEV_PWM */ |
1117 | ||
61c542bf KK |
1118 | /* RTC */ |
1119 | ||
1120 | #ifdef CONFIG_PLAT_S3C24XX | |
1121 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
1122 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), |
1123 | [1] = DEFINE_RES_IRQ(IRQ_RTC), | |
1124 | [2] = DEFINE_RES_IRQ(IRQ_TICK), | |
61c542bf KK |
1125 | }; |
1126 | ||
1127 | struct platform_device s3c_device_rtc = { | |
1128 | .name = "s3c2410-rtc", | |
1129 | .id = -1, | |
1130 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
1131 | .resource = s3c_rtc_resource, | |
1132 | }; | |
1133 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1134 | ||
bad1e6aa KK |
1135 | #ifdef CONFIG_S3C_DEV_RTC |
1136 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
1137 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), |
1138 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), | |
1139 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), | |
bad1e6aa KK |
1140 | }; |
1141 | ||
1142 | struct platform_device s3c_device_rtc = { | |
1143 | .name = "s3c64xx-rtc", | |
1144 | .id = -1, | |
1145 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
1146 | .resource = s3c_rtc_resource, | |
1147 | }; | |
1148 | #endif /* CONFIG_S3C_DEV_RTC */ | |
1149 | ||
61c542bf KK |
1150 | /* SDI */ |
1151 | ||
1152 | #ifdef CONFIG_PLAT_S3C24XX | |
1153 | static struct resource s3c_sdi_resource[] = { | |
e663cb76 KK |
1154 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), |
1155 | [1] = DEFINE_RES_IRQ(IRQ_SDI), | |
61c542bf KK |
1156 | }; |
1157 | ||
1158 | struct platform_device s3c_device_sdi = { | |
1159 | .name = "s3c2410-sdi", | |
1160 | .id = -1, | |
1161 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | |
1162 | .resource = s3c_sdi_resource, | |
1163 | }; | |
1164 | ||
1165 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | |
1166 | { | |
1167 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | |
1168 | &s3c_device_sdi); | |
1169 | } | |
1170 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1171 | ||
1172 | /* SPI */ | |
1173 | ||
1174 | #ifdef CONFIG_PLAT_S3C24XX | |
1175 | static struct resource s3c_spi0_resource[] = { | |
e663cb76 KK |
1176 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), |
1177 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), | |
61c542bf KK |
1178 | }; |
1179 | ||
1180 | struct platform_device s3c_device_spi0 = { | |
1181 | .name = "s3c2410-spi", | |
1182 | .id = 0, | |
1183 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | |
1184 | .resource = s3c_spi0_resource, | |
1185 | .dev = { | |
1186 | .dma_mask = &samsung_device_dma_mask, | |
1187 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1188 | } | |
1189 | }; | |
1190 | ||
1191 | static struct resource s3c_spi1_resource[] = { | |
e663cb76 KK |
1192 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), |
1193 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), | |
61c542bf KK |
1194 | }; |
1195 | ||
1196 | struct platform_device s3c_device_spi1 = { | |
1197 | .name = "s3c2410-spi", | |
1198 | .id = 1, | |
1199 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | |
1200 | .resource = s3c_spi1_resource, | |
1201 | .dev = { | |
1202 | .dma_mask = &samsung_device_dma_mask, | |
1203 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1204 | } | |
1205 | }; | |
1206 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1207 | ||
1208 | /* Touchscreen */ | |
1209 | ||
1210 | #ifdef CONFIG_PLAT_S3C24XX | |
1211 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
1212 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
1213 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
61c542bf KK |
1214 | }; |
1215 | ||
1216 | struct platform_device s3c_device_ts = { | |
1217 | .name = "s3c2410-ts", | |
1218 | .id = -1, | |
1219 | .dev.parent = &s3c_device_adc.dev, | |
1220 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
1221 | .resource = s3c_ts_resource, | |
1222 | }; | |
1223 | ||
1224 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | |
1225 | { | |
1226 | s3c_set_platdata(hard_s3c2410ts_info, | |
1227 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | |
1228 | } | |
1229 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1230 | ||
bad1e6aa KK |
1231 | #ifdef CONFIG_SAMSUNG_DEV_TS |
1232 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
1233 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
1234 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
bad1e6aa KK |
1235 | }; |
1236 | ||
1237 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | |
1238 | .delay = 10000, | |
1239 | .presc = 49, | |
1240 | .oversampling_shift = 2, | |
1241 | }; | |
1242 | ||
1243 | struct platform_device s3c_device_ts = { | |
1244 | .name = "s3c64xx-ts", | |
1245 | .id = -1, | |
1246 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
1247 | .resource = s3c_ts_resource, | |
1248 | }; | |
1249 | ||
1250 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |
1251 | { | |
1252 | if (!pd) | |
1253 | pd = &default_ts_data; | |
1254 | ||
1255 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | |
1256 | &s3c_device_ts); | |
1257 | } | |
1258 | #endif /* CONFIG_SAMSUNG_DEV_TS */ | |
1259 | ||
57167149 KK |
1260 | /* TV */ |
1261 | ||
1262 | #ifdef CONFIG_S5P_DEV_TV | |
1263 | ||
1264 | static struct resource s5p_hdmi_resources[] = { | |
e663cb76 KK |
1265 | [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M), |
1266 | [1] = DEFINE_RES_IRQ(IRQ_HDMI), | |
57167149 KK |
1267 | }; |
1268 | ||
1269 | struct platform_device s5p_device_hdmi = { | |
1270 | .name = "s5p-hdmi", | |
1271 | .id = -1, | |
1272 | .num_resources = ARRAY_SIZE(s5p_hdmi_resources), | |
1273 | .resource = s5p_hdmi_resources, | |
1274 | }; | |
1275 | ||
1276 | static struct resource s5p_sdo_resources[] = { | |
e663cb76 KK |
1277 | [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K), |
1278 | [1] = DEFINE_RES_IRQ(IRQ_SDO), | |
57167149 KK |
1279 | }; |
1280 | ||
1281 | struct platform_device s5p_device_sdo = { | |
1282 | .name = "s5p-sdo", | |
1283 | .id = -1, | |
1284 | .num_resources = ARRAY_SIZE(s5p_sdo_resources), | |
1285 | .resource = s5p_sdo_resources, | |
1286 | }; | |
1287 | ||
1288 | static struct resource s5p_mixer_resources[] = { | |
e663cb76 KK |
1289 | [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"), |
1290 | [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"), | |
1291 | [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"), | |
57167149 KK |
1292 | }; |
1293 | ||
1294 | struct platform_device s5p_device_mixer = { | |
1295 | .name = "s5p-mixer", | |
1296 | .id = -1, | |
1297 | .num_resources = ARRAY_SIZE(s5p_mixer_resources), | |
1298 | .resource = s5p_mixer_resources, | |
1299 | .dev = { | |
1300 | .dma_mask = &samsung_device_dma_mask, | |
1301 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1302 | } | |
1303 | }; | |
1304 | #endif /* CONFIG_S5P_DEV_TV */ | |
1305 | ||
bad1e6aa KK |
1306 | /* USB */ |
1307 | ||
1308 | #ifdef CONFIG_S3C_DEV_USB_HOST | |
1309 | static struct resource s3c_usb_resource[] = { | |
e663cb76 KK |
1310 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), |
1311 | [1] = DEFINE_RES_IRQ(IRQ_USBH), | |
bad1e6aa KK |
1312 | }; |
1313 | ||
1314 | struct platform_device s3c_device_ohci = { | |
1315 | .name = "s3c2410-ohci", | |
1316 | .id = -1, | |
1317 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | |
1318 | .resource = s3c_usb_resource, | |
1319 | .dev = { | |
1320 | .dma_mask = &samsung_device_dma_mask, | |
1321 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1322 | } | |
1323 | }; | |
1324 | ||
1325 | /* | |
1326 | * s3c_ohci_set_platdata - initialise OHCI device platform data | |
1327 | * @info: The platform data. | |
1328 | * | |
1329 | * This call copies the @info passed in and sets the device .platform_data | |
1330 | * field to that copy. The @info is copied so that the original can be marked | |
1331 | * __initdata. | |
1332 | */ | |
1333 | ||
1334 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | |
1335 | { | |
1336 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | |
1337 | &s3c_device_ohci); | |
1338 | } | |
1339 | #endif /* CONFIG_S3C_DEV_USB_HOST */ | |
1340 | ||
61c542bf KK |
1341 | /* USB Device (Gadget) */ |
1342 | ||
1343 | #ifdef CONFIG_PLAT_S3C24XX | |
1344 | static struct resource s3c_usbgadget_resource[] = { | |
e663cb76 KK |
1345 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), |
1346 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1347 | }; |
1348 | ||
1349 | struct platform_device s3c_device_usbgadget = { | |
1350 | .name = "s3c2410-usbgadget", | |
1351 | .id = -1, | |
1352 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | |
1353 | .resource = s3c_usbgadget_resource, | |
1354 | }; | |
1355 | ||
1356 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |
1357 | { | |
1358 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | |
1359 | } | |
1360 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1361 | ||
bad1e6aa KK |
1362 | /* USB HSOTG */ |
1363 | ||
1364 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | |
1365 | static struct resource s3c_usb_hsotg_resources[] = { | |
c65d8ef2 | 1366 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), |
e663cb76 | 1367 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
bad1e6aa KK |
1368 | }; |
1369 | ||
1370 | struct platform_device s3c_device_usb_hsotg = { | |
1371 | .name = "s3c-hsotg", | |
1372 | .id = -1, | |
1373 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | |
1374 | .resource = s3c_usb_hsotg_resources, | |
1375 | .dev = { | |
1376 | .dma_mask = &samsung_device_dma_mask, | |
1377 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1378 | }, | |
1379 | }; | |
99f6e1f5 JS |
1380 | |
1381 | void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd) | |
1382 | { | |
1383 | struct s3c_hsotg_plat *npd; | |
1384 | ||
1385 | npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat), | |
1386 | &s3c_device_usb_hsotg); | |
1387 | ||
1388 | if (!npd->phy_init) | |
1389 | npd->phy_init = s5p_usb_phy_init; | |
1390 | if (!npd->phy_exit) | |
1391 | npd->phy_exit = s5p_usb_phy_exit; | |
1392 | } | |
bad1e6aa KK |
1393 | #endif /* CONFIG_S3C_DEV_USB_HSOTG */ |
1394 | ||
61c542bf KK |
1395 | /* USB High Spped 2.0 Device (Gadget) */ |
1396 | ||
1397 | #ifdef CONFIG_PLAT_S3C24XX | |
1398 | static struct resource s3c_hsudc_resource[] = { | |
e663cb76 KK |
1399 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), |
1400 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1401 | }; |
1402 | ||
1403 | struct platform_device s3c_device_usb_hsudc = { | |
1404 | .name = "s3c-hsudc", | |
1405 | .id = -1, | |
1406 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | |
1407 | .resource = s3c_hsudc_resource, | |
1408 | .dev = { | |
1409 | .dma_mask = &samsung_device_dma_mask, | |
1410 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1411 | }, | |
1412 | }; | |
1413 | ||
1414 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | |
1415 | { | |
1416 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | |
1417 | } | |
1418 | #endif /* CONFIG_PLAT_S3C24XX */ | |
bad1e6aa KK |
1419 | |
1420 | /* WDT */ | |
1421 | ||
1422 | #ifdef CONFIG_S3C_DEV_WDT | |
1423 | static struct resource s3c_wdt_resource[] = { | |
e663cb76 KK |
1424 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), |
1425 | [1] = DEFINE_RES_IRQ(IRQ_WDT), | |
bad1e6aa KK |
1426 | }; |
1427 | ||
1428 | struct platform_device s3c_device_wdt = { | |
1429 | .name = "s3c2410-wdt", | |
1430 | .id = -1, | |
1431 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | |
1432 | .resource = s3c_wdt_resource, | |
1433 | }; | |
1434 | #endif /* CONFIG_S3C_DEV_WDT */ | |
875a5937 PV |
1435 | |
1436 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | |
1437 | static struct resource s3c64xx_spi0_resource[] = { | |
1438 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | |
1439 | [1] = DEFINE_RES_DMA(DMACH_SPI0_TX), | |
1440 | [2] = DEFINE_RES_DMA(DMACH_SPI0_RX), | |
1441 | [3] = DEFINE_RES_IRQ(IRQ_SPI0), | |
1442 | }; | |
1443 | ||
1444 | struct platform_device s3c64xx_device_spi0 = { | |
4d0efdd5 | 1445 | .name = "s3c6410-spi", |
875a5937 PV |
1446 | .id = 0, |
1447 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | |
1448 | .resource = s3c64xx_spi0_resource, | |
1449 | .dev = { | |
1450 | .dma_mask = &samsung_device_dma_mask, | |
1451 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1452 | }, | |
1453 | }; | |
1454 | ||
4d0efdd5 TA |
1455 | void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1456 | int num_cs) | |
875a5937 | 1457 | { |
4d0efdd5 | 1458 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1459 | |
1460 | /* Reject invalid configuration */ | |
1461 | if (!num_cs || src_clk_nr < 0) { | |
1462 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1463 | return; | |
1464 | } | |
1465 | ||
4d0efdd5 TA |
1466 | pd.num_cs = num_cs; |
1467 | pd.src_clk_nr = src_clk_nr; | |
1468 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | |
7f99ef22 | 1469 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1470 | pd.filter = pl330_filter; |
1db0287a TF |
1471 | #elif defined(CONFIG_S3C64XX_PL080) |
1472 | pd.filter = pl08x_filter_id; | |
7f99ef22 HS |
1473 | #elif defined(CONFIG_S3C24XX_DMAC) |
1474 | pd.filter = s3c24xx_dma_filter; | |
78843727 | 1475 | #endif |
4566c7f7 | 1476 | |
4d0efdd5 | 1477 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); |
875a5937 PV |
1478 | } |
1479 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | |
1480 | ||
1481 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | |
1482 | static struct resource s3c64xx_spi1_resource[] = { | |
1483 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | |
1484 | [1] = DEFINE_RES_DMA(DMACH_SPI1_TX), | |
1485 | [2] = DEFINE_RES_DMA(DMACH_SPI1_RX), | |
1486 | [3] = DEFINE_RES_IRQ(IRQ_SPI1), | |
1487 | }; | |
1488 | ||
1489 | struct platform_device s3c64xx_device_spi1 = { | |
4d0efdd5 | 1490 | .name = "s3c6410-spi", |
875a5937 PV |
1491 | .id = 1, |
1492 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | |
1493 | .resource = s3c64xx_spi1_resource, | |
1494 | .dev = { | |
1495 | .dma_mask = &samsung_device_dma_mask, | |
1496 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1497 | }, | |
1498 | }; | |
1499 | ||
4d0efdd5 TA |
1500 | void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1501 | int num_cs) | |
875a5937 | 1502 | { |
fb997a46 SN |
1503 | struct s3c64xx_spi_info pd; |
1504 | ||
875a5937 PV |
1505 | /* Reject invalid configuration */ |
1506 | if (!num_cs || src_clk_nr < 0) { | |
1507 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1508 | return; | |
1509 | } | |
1510 | ||
4d0efdd5 TA |
1511 | pd.num_cs = num_cs; |
1512 | pd.src_clk_nr = src_clk_nr; | |
1513 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | |
1db0287a | 1514 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1515 | pd.filter = pl330_filter; |
1db0287a TF |
1516 | #elif defined(CONFIG_S3C64XX_PL080) |
1517 | pd.filter = pl08x_filter_id; | |
78843727 | 1518 | #endif |
4566c7f7 | 1519 | |
4d0efdd5 | 1520 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
875a5937 PV |
1521 | } |
1522 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | |
1523 | ||
1524 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | |
1525 | static struct resource s3c64xx_spi2_resource[] = { | |
1526 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | |
1527 | [1] = DEFINE_RES_DMA(DMACH_SPI2_TX), | |
1528 | [2] = DEFINE_RES_DMA(DMACH_SPI2_RX), | |
1529 | [3] = DEFINE_RES_IRQ(IRQ_SPI2), | |
1530 | }; | |
1531 | ||
1532 | struct platform_device s3c64xx_device_spi2 = { | |
4d0efdd5 | 1533 | .name = "s3c6410-spi", |
875a5937 PV |
1534 | .id = 2, |
1535 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | |
1536 | .resource = s3c64xx_spi2_resource, | |
1537 | .dev = { | |
1538 | .dma_mask = &samsung_device_dma_mask, | |
1539 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1540 | }, | |
1541 | }; | |
1542 | ||
4d0efdd5 TA |
1543 | void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1544 | int num_cs) | |
875a5937 | 1545 | { |
4d0efdd5 | 1546 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1547 | |
1548 | /* Reject invalid configuration */ | |
1549 | if (!num_cs || src_clk_nr < 0) { | |
1550 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1551 | return; | |
1552 | } | |
1553 | ||
4d0efdd5 TA |
1554 | pd.num_cs = num_cs; |
1555 | pd.src_clk_nr = src_clk_nr; | |
1556 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | |
1db0287a | 1557 | #if defined(CONFIG_PL330_DMA) |
78843727 | 1558 | pd.filter = pl330_filter; |
1db0287a TF |
1559 | #elif defined(CONFIG_S3C64XX_PL080) |
1560 | pd.filter = pl08x_filter_id; | |
78843727 | 1561 | #endif |
323d7717 | 1562 | |
4d0efdd5 | 1563 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
875a5937 PV |
1564 | } |
1565 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ |