ARM: S5P: To merge devs.c files to one devs.c
[deliverable/linux.git] / arch / arm / plat-samsung / devs.c
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1/* linux/arch/arm/plat-samsung/devs.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Base SAMSUNG platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/slab.h>
23#include <linux/string.h>
24#include <linux/dma-mapping.h>
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25#include <linux/fb.h>
26#include <linux/gfp.h>
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27#include <linux/mtd/mtd.h>
28#include <linux/mtd/onenand.h>
57167149 29#include <linux/ioport.h>
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30
31#include <asm/irq.h>
57167149 32#include <asm/pmu.h>
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33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/irq.h>
36
37#include <mach/hardware.h>
38#include <mach/dma.h>
39#include <mach/irqs.h>
40#include <mach/map.h>
41
42#include <plat/cpu.h>
43#include <plat/devs.h>
57167149 44#include <plat/ehci.h>
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45#include <plat/fb.h>
46#include <plat/fb-s3c2410.h>
57167149 47#include <plat/iic.h>
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48#include <plat/mci.h>
49#include <plat/ts.h>
50#include <plat/udc.h>
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51#include <plat/usb-phy.h>
52#include <plat/regs-iic.h>
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53#include <plat/regs-serial.h>
54#include <plat/regs-spi.h>
55
56static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
57
58/* AC97 */
59#ifdef CONFIG_CPU_S3C2440
60static struct resource s3c_ac97_resource[] = {
61 [0] = {
62 .start = S3C2440_PA_AC97,
63 .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = IRQ_S3C244x_AC97,
68 .end = IRQ_S3C244x_AC97,
69 .flags = IORESOURCE_IRQ,
70 },
71 [2] = {
72 .name = "PCM out",
73 .start = DMACH_PCM_OUT,
74 .end = DMACH_PCM_OUT,
75 .flags = IORESOURCE_DMA,
76 },
77 [3] = {
78 .name = "PCM in",
79 .start = DMACH_PCM_IN,
80 .end = DMACH_PCM_IN,
81 .flags = IORESOURCE_DMA,
82 },
83 [4] = {
84 .name = "Mic in",
85 .start = DMACH_MIC_IN,
86 .end = DMACH_MIC_IN,
87 .flags = IORESOURCE_DMA,
88 },
89};
90
91struct platform_device s3c_device_ac97 = {
92 .name = "samsung-ac97",
93 .id = -1,
94 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
95 .resource = s3c_ac97_resource,
96 .dev = {
97 .dma_mask = &samsung_device_dma_mask,
98 .coherent_dma_mask = DMA_BIT_MASK(32),
99 }
100};
101#endif /* CONFIG_CPU_S3C2440 */
102
103/* ADC */
104
105#ifdef CONFIG_PLAT_S3C24XX
106static struct resource s3c_adc_resource[] = {
107 [0] = {
108 .start = S3C24XX_PA_ADC,
109 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
110 .flags = IORESOURCE_MEM,
111 },
112 [1] = {
113 .start = IRQ_TC,
114 .end = IRQ_TC,
115 .flags = IORESOURCE_IRQ,
116 },
117 [2] = {
118 .start = IRQ_ADC,
119 .end = IRQ_ADC,
120 .flags = IORESOURCE_IRQ,
121 }
122};
123
124struct platform_device s3c_device_adc = {
125 .name = "s3c24xx-adc",
126 .id = -1,
127 .num_resources = ARRAY_SIZE(s3c_adc_resource),
128 .resource = s3c_adc_resource,
129};
130#endif /* CONFIG_PLAT_S3C24XX */
131
132/* Camif Controller */
133
134#ifdef CONFIG_CPU_S3C2440
135static struct resource s3c_camif_resource[] = {
136 [0] = {
137 .start = S3C2440_PA_CAMIF,
138 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
139 .flags = IORESOURCE_MEM,
140 },
141 [1] = {
142 .start = IRQ_CAM,
143 .end = IRQ_CAM,
144 .flags = IORESOURCE_IRQ,
145 }
146};
147
148struct platform_device s3c_device_camif = {
149 .name = "s3c2440-camif",
150 .id = -1,
151 .num_resources = ARRAY_SIZE(s3c_camif_resource),
152 .resource = s3c_camif_resource,
153 .dev = {
154 .dma_mask = &samsung_device_dma_mask,
155 .coherent_dma_mask = DMA_BIT_MASK(32),
156 }
157};
158#endif /* CONFIG_CPU_S3C2440 */
159
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160/* FIMC */
161
162#ifdef CONFIG_S5P_DEV_FIMC0
163static struct resource s5p_fimc0_resource[] = {
164 [0] = {
165 .start = S5P_PA_FIMC0,
166 .end = S5P_PA_FIMC0 + SZ_4K - 1,
167 .flags = IORESOURCE_MEM,
168 },
169 [1] = {
170 .start = IRQ_FIMC0,
171 .end = IRQ_FIMC0,
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176struct platform_device s5p_device_fimc0 = {
177 .name = "s5p-fimc",
178 .id = 0,
179 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
180 .resource = s5p_fimc0_resource,
181 .dev = {
182 .dma_mask = &samsung_device_dma_mask,
183 .coherent_dma_mask = DMA_BIT_MASK(32),
184 },
185};
186#endif /* CONFIG_S5P_DEV_FIMC0 */
187
188#ifdef CONFIG_S5P_DEV_FIMC1
189static struct resource s5p_fimc1_resource[] = {
190 [0] = {
191 .start = S5P_PA_FIMC1,
192 .end = S5P_PA_FIMC1 + SZ_4K - 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [1] = {
196 .start = IRQ_FIMC1,
197 .end = IRQ_FIMC1,
198 .flags = IORESOURCE_IRQ,
199 },
200};
201
202struct platform_device s5p_device_fimc1 = {
203 .name = "s5p-fimc",
204 .id = 1,
205 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
206 .resource = s5p_fimc1_resource,
207 .dev = {
208 .dma_mask = &samsung_device_dma_mask,
209 .coherent_dma_mask = DMA_BIT_MASK(32),
210 },
211};
212#endif /* CONFIG_S5P_DEV_FIMC1 */
213
214#ifdef CONFIG_S5P_DEV_FIMC2
215static struct resource s5p_fimc2_resource[] = {
216 [0] = {
217 .start = S5P_PA_FIMC2,
218 .end = S5P_PA_FIMC2 + SZ_4K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 [1] = {
222 .start = IRQ_FIMC2,
223 .end = IRQ_FIMC2,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228struct platform_device s5p_device_fimc2 = {
229 .name = "s5p-fimc",
230 .id = 2,
231 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
232 .resource = s5p_fimc2_resource,
233 .dev = {
234 .dma_mask = &samsung_device_dma_mask,
235 .coherent_dma_mask = DMA_BIT_MASK(32),
236 },
237};
238#endif /* CONFIG_S5P_DEV_FIMC2 */
239
240#ifdef CONFIG_S5P_DEV_FIMC3
241static struct resource s5p_fimc3_resource[] = {
242 [0] = {
243 .start = S5P_PA_FIMC3,
244 .end = S5P_PA_FIMC3 + SZ_4K - 1,
245 .flags = IORESOURCE_MEM,
246 },
247 [1] = {
248 .start = IRQ_FIMC3,
249 .end = IRQ_FIMC3,
250 .flags = IORESOURCE_IRQ,
251 },
252};
253
254struct platform_device s5p_device_fimc3 = {
255 .name = "s5p-fimc",
256 .id = 3,
257 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
258 .resource = s5p_fimc3_resource,
259 .dev = {
260 .dma_mask = &samsung_device_dma_mask,
261 .coherent_dma_mask = DMA_BIT_MASK(32),
262 },
263};
264#endif /* CONFIG_S5P_DEV_FIMC3 */
265
266/* FIMD0 */
267
268#ifdef CONFIG_S5P_DEV_FIMD0
269static struct resource s5p_fimd0_resource[] = {
270 [0] = {
271 .start = S5P_PA_FIMD0,
272 .end = S5P_PA_FIMD0 + SZ_32K - 1,
273 .flags = IORESOURCE_MEM,
274 },
275 [1] = {
276 .start = IRQ_FIMD0_VSYNC,
277 .end = IRQ_FIMD0_VSYNC,
278 .flags = IORESOURCE_IRQ,
279 },
280 [2] = {
281 .start = IRQ_FIMD0_FIFO,
282 .end = IRQ_FIMD0_FIFO,
283 .flags = IORESOURCE_IRQ,
284 },
285 [3] = {
286 .start = IRQ_FIMD0_SYSTEM,
287 .end = IRQ_FIMD0_SYSTEM,
288 .flags = IORESOURCE_IRQ,
289 },
290};
291
292struct platform_device s5p_device_fimd0 = {
293 .name = "s5p-fb",
294 .id = 0,
295 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
296 .resource = s5p_fimd0_resource,
297 .dev = {
298 .dma_mask = &samsung_device_dma_mask,
299 .coherent_dma_mask = DMA_BIT_MASK(32),
300 },
301};
302
303void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
304{
305 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
306 &s5p_device_fimd0);
307}
308#endif /* CONFIG_S5P_DEV_FIMD0 */
309
310/* I2C HDMIPHY */
311
312#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
313static struct resource s5p_i2c_resource[] = {
314 [0] = {
315 .start = S5P_PA_IIC_HDMIPHY,
316 .end = S5P_PA_IIC_HDMIPHY + SZ_4K - 1,
317 .flags = IORESOURCE_MEM,
318 },
319 [1] = {
320 .start = IRQ_IIC_HDMIPHY,
321 .end = IRQ_IIC_HDMIPHY,
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326struct platform_device s5p_device_i2c_hdmiphy = {
327 .name = "s3c2440-hdmiphy-i2c",
328 .id = -1,
329 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
330 .resource = s5p_i2c_resource,
331};
332
333void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
334{
335 struct s3c2410_platform_i2c *npd;
336
337 if (!pd) {
338 pd = &default_i2c_data;
339
340 if (soc_is_exynos4210())
341 pd->bus_num = 8;
342 else if (soc_is_s5pv210())
343 pd->bus_num = 3;
344 else
345 pd->bus_num = 0;
346 }
347
348 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
349 &s5p_device_i2c_hdmiphy);
350}
351#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
352
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353/* I2S */
354
355#ifdef CONFIG_PLAT_S3C24XX
356static struct resource s3c_iis_resource[] = {
357 [0] = {
358 .start = S3C24XX_PA_IIS,
359 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS - 1,
360 .flags = IORESOURCE_MEM,
361 }
362};
363
364struct platform_device s3c_device_iis = {
365 .name = "s3c24xx-iis",
366 .id = -1,
367 .num_resources = ARRAY_SIZE(s3c_iis_resource),
368 .resource = s3c_iis_resource,
369 .dev = {
370 .dma_mask = &samsung_device_dma_mask,
371 .coherent_dma_mask = DMA_BIT_MASK(32),
372 }
373};
374#endif /* CONFIG_PLAT_S3C24XX */
375
376#ifdef CONFIG_CPU_S3C2440
377struct platform_device s3c2412_device_iis = {
378 .name = "s3c2412-iis",
379 .id = -1,
380 .dev = {
381 .dma_mask = &samsung_device_dma_mask,
382 .coherent_dma_mask = DMA_BIT_MASK(32),
383 }
384};
385#endif /* CONFIG_CPU_S3C2440 */
386
387/* LCD Controller */
388
389#ifdef CONFIG_PLAT_S3C24XX
390static struct resource s3c_lcd_resource[] = {
391 [0] = {
392 .start = S3C24XX_PA_LCD,
393 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
394 .flags = IORESOURCE_MEM,
395 },
396 [1] = {
397 .start = IRQ_LCD,
398 .end = IRQ_LCD,
399 .flags = IORESOURCE_IRQ,
400 }
401};
402
403struct platform_device s3c_device_lcd = {
404 .name = "s3c2410-lcd",
405 .id = -1,
406 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
407 .resource = s3c_lcd_resource,
408 .dev = {
409 .dma_mask = &samsung_device_dma_mask,
410 .coherent_dma_mask = DMA_BIT_MASK(32),
411 }
412};
413
414void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
415{
416 struct s3c2410fb_mach_info *npd;
417
418 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
419 if (npd) {
420 npd->displays = kmemdup(pd->displays,
421 sizeof(struct s3c2410fb_display) * npd->num_displays,
422 GFP_KERNEL);
423 if (!npd->displays)
424 printk(KERN_ERR "no memory for LCD display data\n");
425 } else {
426 printk(KERN_ERR "no memory for LCD platform data\n");
427 }
428}
429#endif /* CONFIG_PLAT_S3C24XX */
430
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431/* MFC */
432
433#ifdef CONFIG_S5P_DEV_MFC
434static struct resource s5p_mfc_resource[] = {
435 [0] = {
436 .start = S5P_PA_MFC,
437 .end = S5P_PA_MFC + SZ_64K - 1,
438 .flags = IORESOURCE_MEM,
439 },
440 [1] = {
441 .start = IRQ_MFC,
442 .end = IRQ_MFC,
443 .flags = IORESOURCE_IRQ,
444 }
445};
446
447struct platform_device s5p_device_mfc = {
448 .name = "s5p-mfc",
449 .id = -1,
450 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
451 .resource = s5p_mfc_resource,
452};
453
454/*
455 * MFC hardware has 2 memory interfaces which are modelled as two separate
456 * platform devices to let dma-mapping distinguish between them.
457 *
458 * MFC parent device (s5p_device_mfc) must be registered before memory
459 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
460 */
461
462struct platform_device s5p_device_mfc_l = {
463 .name = "s5p-mfc-l",
464 .id = -1,
465 .dev = {
466 .parent = &s5p_device_mfc.dev,
467 .dma_mask = &samsung_device_dma_mask,
468 .coherent_dma_mask = DMA_BIT_MASK(32),
469 },
470};
471
472struct platform_device s5p_device_mfc_r = {
473 .name = "s5p-mfc-r",
474 .id = -1,
475 .dev = {
476 .parent = &s5p_device_mfc.dev,
477 .dma_mask = &samsung_device_dma_mask,
478 .coherent_dma_mask = DMA_BIT_MASK(32),
479 },
480};
481#endif /* CONFIG_S5P_DEV_MFC */
482
483/* MIPI CSIS */
484
485#ifdef CONFIG_S5P_DEV_CSIS0
486static struct resource s5p_mipi_csis0_resource[] = {
487 [0] = {
488 .start = S5P_PA_MIPI_CSIS0,
489 .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1,
490 .flags = IORESOURCE_MEM,
491 },
492 [1] = {
493 .start = IRQ_MIPI_CSIS0,
494 .end = IRQ_MIPI_CSIS0,
495 .flags = IORESOURCE_IRQ,
496 }
497};
498
499struct platform_device s5p_device_mipi_csis0 = {
500 .name = "s5p-mipi-csis",
501 .id = 0,
502 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
503 .resource = s5p_mipi_csis0_resource,
504};
505#endif /* CONFIG_S5P_DEV_CSIS0 */
506
507#ifdef CONFIG_S5P_DEV_CSIS1
508static struct resource s5p_mipi_csis1_resource[] = {
509 [0] = {
510 .start = S5P_PA_MIPI_CSIS1,
511 .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1,
512 .flags = IORESOURCE_MEM,
513 },
514 [1] = {
515 .start = IRQ_MIPI_CSIS1,
516 .end = IRQ_MIPI_CSIS1,
517 .flags = IORESOURCE_IRQ,
518 },
519};
520
521struct platform_device s5p_device_mipi_csis1 = {
522 .name = "s5p-mipi-csis",
523 .id = 1,
524 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
525 .resource = s5p_mipi_csis1_resource,
526};
527#endif
528
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529#ifdef CONFIG_S3C64XX_DEV_ONENAND1
530static struct resource s3c64xx_onenand1_resources[] = {
531 [0] = {
532 .start = S3C64XX_PA_ONENAND1,
533 .end = S3C64XX_PA_ONENAND1 + 0x400 - 1,
534 .flags = IORESOURCE_MEM,
535 },
536 [1] = {
537 .start = S3C64XX_PA_ONENAND1_BUF,
538 .end = S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1,
539 .flags = IORESOURCE_MEM,
540 },
541 [2] = {
542 .start = IRQ_ONENAND1,
543 .end = IRQ_ONENAND1,
544 .flags = IORESOURCE_IRQ,
545 },
546};
547
548struct platform_device s3c64xx_device_onenand1 = {
549 .name = "samsung-onenand",
550 .id = 1,
551 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
552 .resource = s3c64xx_onenand1_resources,
553};
554
555void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
556{
557 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
558 &s3c64xx_device_onenand1);
559}
560#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
561
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562#ifdef CONFIG_S5P_DEV_ONENAND
563static struct resource s5p_onenand_resources[] = {
564 [0] = {
565 .start = S5P_PA_ONENAND,
566 .end = S5P_PA_ONENAND + SZ_128K - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .start = S5P_PA_ONENAND_DMA,
571 .end = S5P_PA_ONENAND_DMA + SZ_8K - 1,
572 .flags = IORESOURCE_MEM,
573 },
574 [2] = {
575 .start = IRQ_ONENAND_AUDI,
576 .end = IRQ_ONENAND_AUDI,
577 .flags = IORESOURCE_IRQ,
578 },
579};
580
581struct platform_device s5p_device_onenand = {
582 .name = "s5pc110-onenand",
583 .id = -1,
584 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
585 .resource = s5p_onenand_resources,
586};
587#endif /* CONFIG_S5P_DEV_ONENAND */
588
589/* PMU */
590
591#ifdef CONFIG_PLAT_S5P
592static struct resource s5p_pmu_resource = {
593 .start = IRQ_PMU,
594 .end = IRQ_PMU,
595 .flags = IORESOURCE_IRQ,
596};
597
598struct platform_device s5p_device_pmu = {
599 .name = "arm-pmu",
600 .id = ARM_PMU_DEVICE_CPU,
601 .num_resources = 1,
602 .resource = &s5p_pmu_resource,
603};
604
605static int __init s5p_pmu_init(void)
606{
607 platform_device_register(&s5p_device_pmu);
608 return 0;
609}
610arch_initcall(s5p_pmu_init);
611#endif /* CONFIG_PLAT_S5P */
612
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613/* RTC */
614
615#ifdef CONFIG_PLAT_S3C24XX
616static struct resource s3c_rtc_resource[] = {
617 [0] = {
618 .start = S3C24XX_PA_RTC,
619 .end = S3C24XX_PA_RTC + 0xff,
620 .flags = IORESOURCE_MEM,
621 },
622 [1] = {
623 .start = IRQ_RTC,
624 .end = IRQ_RTC,
625 .flags = IORESOURCE_IRQ,
626 },
627 [2] = {
628 .start = IRQ_TICK,
629 .end = IRQ_TICK,
630 .flags = IORESOURCE_IRQ
631 }
632};
633
634struct platform_device s3c_device_rtc = {
635 .name = "s3c2410-rtc",
636 .id = -1,
637 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
638 .resource = s3c_rtc_resource,
639};
640#endif /* CONFIG_PLAT_S3C24XX */
641
642/* SDI */
643
644#ifdef CONFIG_PLAT_S3C24XX
645static struct resource s3c_sdi_resource[] = {
646 [0] = {
647 .start = S3C24XX_PA_SDI,
648 .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
649 .flags = IORESOURCE_MEM,
650 },
651 [1] = {
652 .start = IRQ_SDI,
653 .end = IRQ_SDI,
654 .flags = IORESOURCE_IRQ,
655 }
656};
657
658struct platform_device s3c_device_sdi = {
659 .name = "s3c2410-sdi",
660 .id = -1,
661 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
662 .resource = s3c_sdi_resource,
663};
664
665void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
666{
667 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
668 &s3c_device_sdi);
669}
670#endif /* CONFIG_PLAT_S3C24XX */
671
672/* SPI */
673
674#ifdef CONFIG_PLAT_S3C24XX
675static struct resource s3c_spi0_resource[] = {
676 [0] = {
677 .start = S3C24XX_PA_SPI,
678 .end = S3C24XX_PA_SPI + 0x1f,
679 .flags = IORESOURCE_MEM,
680 },
681 [1] = {
682 .start = IRQ_SPI0,
683 .end = IRQ_SPI0,
684 .flags = IORESOURCE_IRQ,
685 }
686};
687
688struct platform_device s3c_device_spi0 = {
689 .name = "s3c2410-spi",
690 .id = 0,
691 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
692 .resource = s3c_spi0_resource,
693 .dev = {
694 .dma_mask = &samsung_device_dma_mask,
695 .coherent_dma_mask = DMA_BIT_MASK(32),
696 }
697};
698
699static struct resource s3c_spi1_resource[] = {
700 [0] = {
701 .start = S3C24XX_PA_SPI + S3C2410_SPI1,
702 .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
703 .flags = IORESOURCE_MEM,
704 },
705 [1] = {
706 .start = IRQ_SPI1,
707 .end = IRQ_SPI1,
708 .flags = IORESOURCE_IRQ,
709 }
710};
711
712struct platform_device s3c_device_spi1 = {
713 .name = "s3c2410-spi",
714 .id = 1,
715 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
716 .resource = s3c_spi1_resource,
717 .dev = {
718 .dma_mask = &samsung_device_dma_mask,
719 .coherent_dma_mask = DMA_BIT_MASK(32),
720 }
721};
722#endif /* CONFIG_PLAT_S3C24XX */
723
724/* Touchscreen */
725
726#ifdef CONFIG_PLAT_S3C24XX
727static struct resource s3c_ts_resource[] = {
728 [0] = {
729 .start = S3C24XX_PA_ADC,
730 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
731 .flags = IORESOURCE_MEM,
732 },
733 [1] = {
734 .start = IRQ_TC,
735 .end = IRQ_TC,
736 .flags = IORESOURCE_IRQ,
737 },
738
739};
740
741struct platform_device s3c_device_ts = {
742 .name = "s3c2410-ts",
743 .id = -1,
744 .dev.parent = &s3c_device_adc.dev,
745 .num_resources = ARRAY_SIZE(s3c_ts_resource),
746 .resource = s3c_ts_resource,
747};
748
749void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
750{
751 s3c_set_platdata(hard_s3c2410ts_info,
752 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
753}
754#endif /* CONFIG_PLAT_S3C24XX */
755
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756/* TV */
757
758#ifdef CONFIG_S5P_DEV_TV
759
760static struct resource s5p_hdmi_resources[] = {
761 [0] = {
762 .start = S5P_PA_HDMI,
763 .end = S5P_PA_HDMI + SZ_1M - 1,
764 .flags = IORESOURCE_MEM,
765 },
766 [1] = {
767 .start = IRQ_HDMI,
768 .end = IRQ_HDMI,
769 .flags = IORESOURCE_IRQ,
770 },
771};
772
773struct platform_device s5p_device_hdmi = {
774 .name = "s5p-hdmi",
775 .id = -1,
776 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
777 .resource = s5p_hdmi_resources,
778};
779
780static struct resource s5p_sdo_resources[] = {
781 [0] = {
782 .start = S5P_PA_SDO,
783 .end = S5P_PA_SDO + SZ_64K - 1,
784 .flags = IORESOURCE_MEM,
785 },
786 [1] = {
787 .start = IRQ_SDO,
788 .end = IRQ_SDO,
789 .flags = IORESOURCE_IRQ,
790 }
791};
792
793struct platform_device s5p_device_sdo = {
794 .name = "s5p-sdo",
795 .id = -1,
796 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
797 .resource = s5p_sdo_resources,
798};
799
800static struct resource s5p_mixer_resources[] = {
801 [0] = {
802 .start = S5P_PA_MIXER,
803 .end = S5P_PA_MIXER + SZ_64K - 1,
804 .flags = IORESOURCE_MEM,
805 .name = "mxr"
806 },
807 [1] = {
808 .start = S5P_PA_VP,
809 .end = S5P_PA_VP + SZ_64K - 1,
810 .flags = IORESOURCE_MEM,
811 .name = "vp"
812 },
813 [2] = {
814 .start = IRQ_MIXER,
815 .end = IRQ_MIXER,
816 .flags = IORESOURCE_IRQ,
817 .name = "irq"
818 }
819};
820
821struct platform_device s5p_device_mixer = {
822 .name = "s5p-mixer",
823 .id = -1,
824 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
825 .resource = s5p_mixer_resources,
826 .dev = {
827 .dma_mask = &samsung_device_dma_mask,
828 .coherent_dma_mask = DMA_BIT_MASK(32),
829 }
830};
831#endif /* CONFIG_S5P_DEV_TV */
832
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833/* USB Device (Gadget) */
834
835#ifdef CONFIG_PLAT_S3C24XX
836static struct resource s3c_usbgadget_resource[] = {
837 [0] = {
838 .start = S3C24XX_PA_USBDEV,
839 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
840 .flags = IORESOURCE_MEM,
841 },
842 [1] = {
843 .start = IRQ_USBD,
844 .end = IRQ_USBD,
845 .flags = IORESOURCE_IRQ,
846 }
847};
848
849struct platform_device s3c_device_usbgadget = {
850 .name = "s3c2410-usbgadget",
851 .id = -1,
852 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
853 .resource = s3c_usbgadget_resource,
854};
855
856void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
857{
858 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
859}
860#endif /* CONFIG_PLAT_S3C24XX */
861
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862/* USB EHCI Host Controller */
863
864#ifdef CONFIG_S5P_DEV_USB_EHCI
865static struct resource s5p_ehci_resource[] = {
866 [0] = {
867 .start = S5P_PA_EHCI,
868 .end = S5P_PA_EHCI + SZ_256 - 1,
869 .flags = IORESOURCE_MEM,
870 },
871 [1] = {
872 .start = IRQ_USB_HOST,
873 .end = IRQ_USB_HOST,
874 .flags = IORESOURCE_IRQ,
875 }
876};
877
878struct platform_device s5p_device_ehci = {
879 .name = "s5p-ehci",
880 .id = -1,
881 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
882 .resource = s5p_ehci_resource,
883 .dev = {
884 .dma_mask = &samsung_device_dma_mask,
885 .coherent_dma_mask = DMA_BIT_MASK(32),
886 }
887};
888
889void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
890{
891 struct s5p_ehci_platdata *npd;
892
893 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
894 &s5p_device_ehci);
895
896 if (!npd->phy_init)
897 npd->phy_init = s5p_usb_phy_init;
898 if (!npd->phy_exit)
899 npd->phy_exit = s5p_usb_phy_exit;
900}
901#endif /* CONFIG_S5P_DEV_USB_EHCI */
902
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903/* USB High Spped 2.0 Device (Gadget) */
904
905#ifdef CONFIG_PLAT_S3C24XX
906static struct resource s3c_hsudc_resource[] = {
907 [0] = {
908 .start = S3C2416_PA_HSUDC,
909 .end = S3C2416_PA_HSUDC + S3C2416_SZ_HSUDC - 1,
910 .flags = IORESOURCE_MEM,
911 },
912 [1] = {
913 .start = IRQ_USBD,
914 .end = IRQ_USBD,
915 .flags = IORESOURCE_IRQ,
916 }
917};
918
919struct platform_device s3c_device_usb_hsudc = {
920 .name = "s3c-hsudc",
921 .id = -1,
922 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
923 .resource = s3c_hsudc_resource,
924 .dev = {
925 .dma_mask = &samsung_device_dma_mask,
926 .coherent_dma_mask = DMA_BIT_MASK(32),
927 },
928};
929
930void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
931{
932 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
933}
934#endif /* CONFIG_PLAT_S3C24XX */
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