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61c542bf KK |
1 | /* linux/arch/arm/plat-samsung/devs.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Base SAMSUNG platform device definitions | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/serial_core.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/string.h> | |
24 | #include <linux/dma-mapping.h> | |
57167149 KK |
25 | #include <linux/fb.h> |
26 | #include <linux/gfp.h> | |
0523ec3a KK |
27 | #include <linux/mtd/mtd.h> |
28 | #include <linux/mtd/onenand.h> | |
bad1e6aa KK |
29 | #include <linux/mtd/partitions.h> |
30 | #include <linux/mmc/host.h> | |
57167149 | 31 | #include <linux/ioport.h> |
715a3e41 | 32 | #include <linux/platform_data/s3c-hsudc.h> |
126625e1 | 33 | #include <linux/platform_data/s3c-hsotg.h> |
61c542bf | 34 | |
ee21ae68 TB |
35 | #include <media/s5p_hdmi.h> |
36 | ||
61c542bf | 37 | #include <asm/irq.h> |
57167149 | 38 | #include <asm/pmu.h> |
61c542bf KK |
39 | #include <asm/mach/arch.h> |
40 | #include <asm/mach/map.h> | |
41 | #include <asm/mach/irq.h> | |
42 | ||
43 | #include <mach/hardware.h> | |
44 | #include <mach/dma.h> | |
45 | #include <mach/irqs.h> | |
46 | #include <mach/map.h> | |
47 | ||
48 | #include <plat/cpu.h> | |
49 | #include <plat/devs.h> | |
bad1e6aa KK |
50 | #include <plat/adc.h> |
51 | #include <plat/ata.h> | |
57167149 | 52 | #include <plat/ehci.h> |
61c542bf KK |
53 | #include <plat/fb.h> |
54 | #include <plat/fb-s3c2410.h> | |
bad1e6aa | 55 | #include <plat/hwmon.h> |
57167149 | 56 | #include <plat/iic.h> |
bad1e6aa | 57 | #include <plat/keypad.h> |
61c542bf | 58 | #include <plat/mci.h> |
bad1e6aa KK |
59 | #include <plat/nand.h> |
60 | #include <plat/sdhci.h> | |
61c542bf KK |
61 | #include <plat/ts.h> |
62 | #include <plat/udc.h> | |
bad1e6aa | 63 | #include <plat/usb-control.h> |
57167149 KK |
64 | #include <plat/usb-phy.h> |
65 | #include <plat/regs-iic.h> | |
61c542bf KK |
66 | #include <plat/regs-serial.h> |
67 | #include <plat/regs-spi.h> | |
875a5937 | 68 | #include <plat/s3c64xx-spi.h> |
61c542bf KK |
69 | |
70 | static u64 samsung_device_dma_mask = DMA_BIT_MASK(32); | |
71 | ||
72 | /* AC97 */ | |
73 | #ifdef CONFIG_CPU_S3C2440 | |
74 | static struct resource s3c_ac97_resource[] = { | |
e663cb76 KK |
75 | [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), |
76 | [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), | |
77 | [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"), | |
78 | [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"), | |
79 | [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"), | |
61c542bf KK |
80 | }; |
81 | ||
82 | struct platform_device s3c_device_ac97 = { | |
83 | .name = "samsung-ac97", | |
84 | .id = -1, | |
85 | .num_resources = ARRAY_SIZE(s3c_ac97_resource), | |
86 | .resource = s3c_ac97_resource, | |
87 | .dev = { | |
88 | .dma_mask = &samsung_device_dma_mask, | |
89 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
90 | } | |
91 | }; | |
92 | #endif /* CONFIG_CPU_S3C2440 */ | |
93 | ||
94 | /* ADC */ | |
95 | ||
96 | #ifdef CONFIG_PLAT_S3C24XX | |
97 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
98 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
99 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
100 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
61c542bf KK |
101 | }; |
102 | ||
103 | struct platform_device s3c_device_adc = { | |
104 | .name = "s3c24xx-adc", | |
105 | .id = -1, | |
106 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
107 | .resource = s3c_adc_resource, | |
108 | }; | |
109 | #endif /* CONFIG_PLAT_S3C24XX */ | |
110 | ||
bad1e6aa KK |
111 | #if defined(CONFIG_SAMSUNG_DEV_ADC) |
112 | static struct resource s3c_adc_resource[] = { | |
e663cb76 KK |
113 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
114 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
115 | [2] = DEFINE_RES_IRQ(IRQ_ADC), | |
bad1e6aa KK |
116 | }; |
117 | ||
118 | struct platform_device s3c_device_adc = { | |
119 | .name = "samsung-adc", | |
120 | .id = -1, | |
121 | .num_resources = ARRAY_SIZE(s3c_adc_resource), | |
122 | .resource = s3c_adc_resource, | |
123 | }; | |
124 | #endif /* CONFIG_SAMSUNG_DEV_ADC */ | |
125 | ||
61c542bf KK |
126 | /* Camif Controller */ |
127 | ||
128 | #ifdef CONFIG_CPU_S3C2440 | |
129 | static struct resource s3c_camif_resource[] = { | |
e663cb76 | 130 | [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), |
705c75e3 SN |
131 | [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), |
132 | [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), | |
61c542bf KK |
133 | }; |
134 | ||
135 | struct platform_device s3c_device_camif = { | |
136 | .name = "s3c2440-camif", | |
137 | .id = -1, | |
138 | .num_resources = ARRAY_SIZE(s3c_camif_resource), | |
139 | .resource = s3c_camif_resource, | |
140 | .dev = { | |
141 | .dma_mask = &samsung_device_dma_mask, | |
142 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
143 | } | |
144 | }; | |
145 | #endif /* CONFIG_CPU_S3C2440 */ | |
146 | ||
bad1e6aa KK |
147 | /* ASOC DMA */ |
148 | ||
149 | struct platform_device samsung_asoc_dma = { | |
150 | .name = "samsung-audio", | |
151 | .id = -1, | |
152 | .dev = { | |
153 | .dma_mask = &samsung_device_dma_mask, | |
154 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
155 | } | |
156 | }; | |
157 | ||
158 | struct platform_device samsung_asoc_idma = { | |
159 | .name = "samsung-idma", | |
160 | .id = -1, | |
161 | .dev = { | |
162 | .dma_mask = &samsung_device_dma_mask, | |
163 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
164 | } | |
165 | }; | |
166 | ||
167 | /* FB */ | |
168 | ||
169 | #ifdef CONFIG_S3C_DEV_FB | |
170 | static struct resource s3c_fb_resource[] = { | |
e663cb76 KK |
171 | [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), |
172 | [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), | |
173 | [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), | |
174 | [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), | |
bad1e6aa KK |
175 | }; |
176 | ||
177 | struct platform_device s3c_device_fb = { | |
178 | .name = "s3c-fb", | |
179 | .id = -1, | |
180 | .num_resources = ARRAY_SIZE(s3c_fb_resource), | |
181 | .resource = s3c_fb_resource, | |
182 | .dev = { | |
183 | .dma_mask = &samsung_device_dma_mask, | |
184 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
185 | }, | |
186 | }; | |
187 | ||
188 | void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) | |
189 | { | |
190 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
191 | &s3c_device_fb); | |
192 | } | |
193 | #endif /* CONFIG_S3C_DEV_FB */ | |
194 | ||
57167149 KK |
195 | /* FIMC */ |
196 | ||
197 | #ifdef CONFIG_S5P_DEV_FIMC0 | |
198 | static struct resource s5p_fimc0_resource[] = { | |
e663cb76 KK |
199 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K), |
200 | [1] = DEFINE_RES_IRQ(IRQ_FIMC0), | |
57167149 KK |
201 | }; |
202 | ||
203 | struct platform_device s5p_device_fimc0 = { | |
204 | .name = "s5p-fimc", | |
205 | .id = 0, | |
206 | .num_resources = ARRAY_SIZE(s5p_fimc0_resource), | |
207 | .resource = s5p_fimc0_resource, | |
208 | .dev = { | |
209 | .dma_mask = &samsung_device_dma_mask, | |
210 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
211 | }, | |
212 | }; | |
07e87e15 SN |
213 | |
214 | struct platform_device s5p_device_fimc_md = { | |
215 | .name = "s5p-fimc-md", | |
216 | .id = -1, | |
217 | }; | |
57167149 KK |
218 | #endif /* CONFIG_S5P_DEV_FIMC0 */ |
219 | ||
220 | #ifdef CONFIG_S5P_DEV_FIMC1 | |
221 | static struct resource s5p_fimc1_resource[] = { | |
e663cb76 KK |
222 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K), |
223 | [1] = DEFINE_RES_IRQ(IRQ_FIMC1), | |
57167149 KK |
224 | }; |
225 | ||
226 | struct platform_device s5p_device_fimc1 = { | |
227 | .name = "s5p-fimc", | |
228 | .id = 1, | |
229 | .num_resources = ARRAY_SIZE(s5p_fimc1_resource), | |
230 | .resource = s5p_fimc1_resource, | |
231 | .dev = { | |
232 | .dma_mask = &samsung_device_dma_mask, | |
233 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
234 | }, | |
235 | }; | |
236 | #endif /* CONFIG_S5P_DEV_FIMC1 */ | |
237 | ||
238 | #ifdef CONFIG_S5P_DEV_FIMC2 | |
239 | static struct resource s5p_fimc2_resource[] = { | |
e663cb76 KK |
240 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K), |
241 | [1] = DEFINE_RES_IRQ(IRQ_FIMC2), | |
57167149 KK |
242 | }; |
243 | ||
244 | struct platform_device s5p_device_fimc2 = { | |
245 | .name = "s5p-fimc", | |
246 | .id = 2, | |
247 | .num_resources = ARRAY_SIZE(s5p_fimc2_resource), | |
248 | .resource = s5p_fimc2_resource, | |
249 | .dev = { | |
250 | .dma_mask = &samsung_device_dma_mask, | |
251 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
252 | }, | |
253 | }; | |
254 | #endif /* CONFIG_S5P_DEV_FIMC2 */ | |
255 | ||
256 | #ifdef CONFIG_S5P_DEV_FIMC3 | |
257 | static struct resource s5p_fimc3_resource[] = { | |
e663cb76 KK |
258 | [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K), |
259 | [1] = DEFINE_RES_IRQ(IRQ_FIMC3), | |
57167149 KK |
260 | }; |
261 | ||
262 | struct platform_device s5p_device_fimc3 = { | |
263 | .name = "s5p-fimc", | |
264 | .id = 3, | |
265 | .num_resources = ARRAY_SIZE(s5p_fimc3_resource), | |
266 | .resource = s5p_fimc3_resource, | |
267 | .dev = { | |
268 | .dma_mask = &samsung_device_dma_mask, | |
269 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
270 | }, | |
271 | }; | |
272 | #endif /* CONFIG_S5P_DEV_FIMC3 */ | |
273 | ||
561ab530 KD |
274 | /* G2D */ |
275 | ||
276 | #ifdef CONFIG_S5P_DEV_G2D | |
277 | static struct resource s5p_g2d_resource[] = { | |
24eec601 TB |
278 | [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K), |
279 | [1] = DEFINE_RES_IRQ(IRQ_2D), | |
561ab530 KD |
280 | }; |
281 | ||
282 | struct platform_device s5p_device_g2d = { | |
283 | .name = "s5p-g2d", | |
284 | .id = 0, | |
285 | .num_resources = ARRAY_SIZE(s5p_g2d_resource), | |
286 | .resource = s5p_g2d_resource, | |
287 | .dev = { | |
288 | .dma_mask = &samsung_device_dma_mask, | |
289 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
290 | }, | |
291 | }; | |
292 | #endif /* CONFIG_S5P_DEV_G2D */ | |
293 | ||
3dbe6d4c AP |
294 | #ifdef CONFIG_S5P_DEV_JPEG |
295 | static struct resource s5p_jpeg_resource[] = { | |
296 | [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K), | |
297 | [1] = DEFINE_RES_IRQ(IRQ_JPEG), | |
298 | }; | |
299 | ||
300 | struct platform_device s5p_device_jpeg = { | |
301 | .name = "s5p-jpeg", | |
302 | .id = 0, | |
303 | .num_resources = ARRAY_SIZE(s5p_jpeg_resource), | |
304 | .resource = s5p_jpeg_resource, | |
305 | .dev = { | |
306 | .dma_mask = &samsung_device_dma_mask, | |
307 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
308 | }, | |
309 | }; | |
310 | #endif /* CONFIG_S5P_DEV_JPEG */ | |
311 | ||
57167149 KK |
312 | /* FIMD0 */ |
313 | ||
314 | #ifdef CONFIG_S5P_DEV_FIMD0 | |
315 | static struct resource s5p_fimd0_resource[] = { | |
e663cb76 KK |
316 | [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K), |
317 | [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC), | |
318 | [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO), | |
319 | [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM), | |
57167149 KK |
320 | }; |
321 | ||
322 | struct platform_device s5p_device_fimd0 = { | |
323 | .name = "s5p-fb", | |
324 | .id = 0, | |
325 | .num_resources = ARRAY_SIZE(s5p_fimd0_resource), | |
326 | .resource = s5p_fimd0_resource, | |
327 | .dev = { | |
328 | .dma_mask = &samsung_device_dma_mask, | |
329 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
330 | }, | |
331 | }; | |
332 | ||
333 | void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd) | |
334 | { | |
335 | s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), | |
336 | &s5p_device_fimd0); | |
337 | } | |
338 | #endif /* CONFIG_S5P_DEV_FIMD0 */ | |
339 | ||
bad1e6aa KK |
340 | /* HWMON */ |
341 | ||
342 | #ifdef CONFIG_S3C_DEV_HWMON | |
343 | struct platform_device s3c_device_hwmon = { | |
344 | .name = "s3c-hwmon", | |
345 | .id = -1, | |
346 | .dev.parent = &s3c_device_adc.dev, | |
347 | }; | |
348 | ||
349 | void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) | |
350 | { | |
351 | s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), | |
352 | &s3c_device_hwmon); | |
353 | } | |
354 | #endif /* CONFIG_S3C_DEV_HWMON */ | |
355 | ||
356 | /* HSMMC */ | |
357 | ||
bad1e6aa KK |
358 | #ifdef CONFIG_S3C_DEV_HSMMC |
359 | static struct resource s3c_hsmmc_resource[] = { | |
e663cb76 KK |
360 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), |
361 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), | |
bad1e6aa KK |
362 | }; |
363 | ||
364 | struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { | |
365 | .max_width = 4, | |
366 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
367 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
368 | }; |
369 | ||
370 | struct platform_device s3c_device_hsmmc0 = { | |
371 | .name = "s3c-sdhci", | |
372 | .id = 0, | |
373 | .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), | |
374 | .resource = s3c_hsmmc_resource, | |
375 | .dev = { | |
376 | .dma_mask = &samsung_device_dma_mask, | |
377 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
378 | .platform_data = &s3c_hsmmc0_def_platdata, | |
379 | }, | |
380 | }; | |
381 | ||
382 | void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) | |
383 | { | |
384 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); | |
385 | } | |
386 | #endif /* CONFIG_S3C_DEV_HSMMC */ | |
387 | ||
388 | #ifdef CONFIG_S3C_DEV_HSMMC1 | |
389 | static struct resource s3c_hsmmc1_resource[] = { | |
e663cb76 KK |
390 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), |
391 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), | |
bad1e6aa KK |
392 | }; |
393 | ||
394 | struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { | |
395 | .max_width = 4, | |
396 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
397 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
398 | }; |
399 | ||
400 | struct platform_device s3c_device_hsmmc1 = { | |
401 | .name = "s3c-sdhci", | |
402 | .id = 1, | |
403 | .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), | |
404 | .resource = s3c_hsmmc1_resource, | |
405 | .dev = { | |
406 | .dma_mask = &samsung_device_dma_mask, | |
407 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
408 | .platform_data = &s3c_hsmmc1_def_platdata, | |
409 | }, | |
410 | }; | |
411 | ||
412 | void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) | |
413 | { | |
414 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); | |
415 | } | |
416 | #endif /* CONFIG_S3C_DEV_HSMMC1 */ | |
417 | ||
418 | /* HSMMC2 */ | |
419 | ||
420 | #ifdef CONFIG_S3C_DEV_HSMMC2 | |
421 | static struct resource s3c_hsmmc2_resource[] = { | |
e663cb76 KK |
422 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), |
423 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), | |
bad1e6aa KK |
424 | }; |
425 | ||
426 | struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { | |
427 | .max_width = 4, | |
428 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
429 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
430 | }; |
431 | ||
432 | struct platform_device s3c_device_hsmmc2 = { | |
433 | .name = "s3c-sdhci", | |
434 | .id = 2, | |
435 | .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), | |
436 | .resource = s3c_hsmmc2_resource, | |
437 | .dev = { | |
438 | .dma_mask = &samsung_device_dma_mask, | |
439 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
440 | .platform_data = &s3c_hsmmc2_def_platdata, | |
441 | }, | |
442 | }; | |
443 | ||
444 | void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) | |
445 | { | |
446 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); | |
447 | } | |
448 | #endif /* CONFIG_S3C_DEV_HSMMC2 */ | |
449 | ||
450 | #ifdef CONFIG_S3C_DEV_HSMMC3 | |
451 | static struct resource s3c_hsmmc3_resource[] = { | |
e663cb76 KK |
452 | [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), |
453 | [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), | |
bad1e6aa KK |
454 | }; |
455 | ||
456 | struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { | |
457 | .max_width = 4, | |
458 | .host_caps = (MMC_CAP_4_BIT_DATA | | |
459 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), | |
bad1e6aa KK |
460 | }; |
461 | ||
462 | struct platform_device s3c_device_hsmmc3 = { | |
463 | .name = "s3c-sdhci", | |
464 | .id = 3, | |
465 | .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), | |
466 | .resource = s3c_hsmmc3_resource, | |
467 | .dev = { | |
468 | .dma_mask = &samsung_device_dma_mask, | |
469 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
470 | .platform_data = &s3c_hsmmc3_def_platdata, | |
471 | }, | |
472 | }; | |
473 | ||
474 | void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) | |
475 | { | |
476 | s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); | |
477 | } | |
478 | #endif /* CONFIG_S3C_DEV_HSMMC3 */ | |
479 | ||
480 | /* I2C */ | |
481 | ||
482 | static struct resource s3c_i2c0_resource[] = { | |
e663cb76 KK |
483 | [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), |
484 | [1] = DEFINE_RES_IRQ(IRQ_IIC), | |
bad1e6aa KK |
485 | }; |
486 | ||
487 | struct platform_device s3c_device_i2c0 = { | |
488 | .name = "s3c2410-i2c", | |
489 | #ifdef CONFIG_S3C_DEV_I2C1 | |
490 | .id = 0, | |
491 | #else | |
492 | .id = -1, | |
493 | #endif | |
494 | .num_resources = ARRAY_SIZE(s3c_i2c0_resource), | |
495 | .resource = s3c_i2c0_resource, | |
496 | }; | |
497 | ||
498 | struct s3c2410_platform_i2c default_i2c_data __initdata = { | |
499 | .flags = 0, | |
500 | .slave_addr = 0x10, | |
501 | .frequency = 100*1000, | |
502 | .sda_delay = 100, | |
503 | }; | |
504 | ||
505 | void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) | |
506 | { | |
507 | struct s3c2410_platform_i2c *npd; | |
508 | ||
693cec97 | 509 | if (!pd) { |
bad1e6aa | 510 | pd = &default_i2c_data; |
693cec97 SN |
511 | pd->bus_num = 0; |
512 | } | |
bad1e6aa KK |
513 | |
514 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
515 | &s3c_device_i2c0); | |
516 | ||
517 | if (!npd->cfg_gpio) | |
518 | npd->cfg_gpio = s3c_i2c0_cfg_gpio; | |
519 | } | |
520 | ||
521 | #ifdef CONFIG_S3C_DEV_I2C1 | |
522 | static struct resource s3c_i2c1_resource[] = { | |
e663cb76 KK |
523 | [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), |
524 | [1] = DEFINE_RES_IRQ(IRQ_IIC1), | |
bad1e6aa KK |
525 | }; |
526 | ||
527 | struct platform_device s3c_device_i2c1 = { | |
528 | .name = "s3c2410-i2c", | |
529 | .id = 1, | |
530 | .num_resources = ARRAY_SIZE(s3c_i2c1_resource), | |
531 | .resource = s3c_i2c1_resource, | |
532 | }; | |
533 | ||
534 | void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) | |
535 | { | |
536 | struct s3c2410_platform_i2c *npd; | |
537 | ||
538 | if (!pd) { | |
539 | pd = &default_i2c_data; | |
540 | pd->bus_num = 1; | |
541 | } | |
542 | ||
543 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
544 | &s3c_device_i2c1); | |
545 | ||
546 | if (!npd->cfg_gpio) | |
547 | npd->cfg_gpio = s3c_i2c1_cfg_gpio; | |
548 | } | |
549 | #endif /* CONFIG_S3C_DEV_I2C1 */ | |
550 | ||
551 | #ifdef CONFIG_S3C_DEV_I2C2 | |
552 | static struct resource s3c_i2c2_resource[] = { | |
e663cb76 KK |
553 | [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), |
554 | [1] = DEFINE_RES_IRQ(IRQ_IIC2), | |
bad1e6aa KK |
555 | }; |
556 | ||
557 | struct platform_device s3c_device_i2c2 = { | |
558 | .name = "s3c2410-i2c", | |
559 | .id = 2, | |
560 | .num_resources = ARRAY_SIZE(s3c_i2c2_resource), | |
561 | .resource = s3c_i2c2_resource, | |
562 | }; | |
563 | ||
564 | void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) | |
565 | { | |
566 | struct s3c2410_platform_i2c *npd; | |
567 | ||
568 | if (!pd) { | |
569 | pd = &default_i2c_data; | |
570 | pd->bus_num = 2; | |
571 | } | |
572 | ||
573 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
574 | &s3c_device_i2c2); | |
575 | ||
576 | if (!npd->cfg_gpio) | |
577 | npd->cfg_gpio = s3c_i2c2_cfg_gpio; | |
578 | } | |
579 | #endif /* CONFIG_S3C_DEV_I2C2 */ | |
580 | ||
581 | #ifdef CONFIG_S3C_DEV_I2C3 | |
582 | static struct resource s3c_i2c3_resource[] = { | |
e663cb76 KK |
583 | [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), |
584 | [1] = DEFINE_RES_IRQ(IRQ_IIC3), | |
bad1e6aa KK |
585 | }; |
586 | ||
587 | struct platform_device s3c_device_i2c3 = { | |
588 | .name = "s3c2440-i2c", | |
589 | .id = 3, | |
590 | .num_resources = ARRAY_SIZE(s3c_i2c3_resource), | |
591 | .resource = s3c_i2c3_resource, | |
592 | }; | |
593 | ||
594 | void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) | |
595 | { | |
596 | struct s3c2410_platform_i2c *npd; | |
597 | ||
598 | if (!pd) { | |
599 | pd = &default_i2c_data; | |
600 | pd->bus_num = 3; | |
601 | } | |
602 | ||
603 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
604 | &s3c_device_i2c3); | |
605 | ||
606 | if (!npd->cfg_gpio) | |
607 | npd->cfg_gpio = s3c_i2c3_cfg_gpio; | |
608 | } | |
609 | #endif /*CONFIG_S3C_DEV_I2C3 */ | |
610 | ||
611 | #ifdef CONFIG_S3C_DEV_I2C4 | |
612 | static struct resource s3c_i2c4_resource[] = { | |
e663cb76 KK |
613 | [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), |
614 | [1] = DEFINE_RES_IRQ(IRQ_IIC4), | |
bad1e6aa KK |
615 | }; |
616 | ||
617 | struct platform_device s3c_device_i2c4 = { | |
618 | .name = "s3c2440-i2c", | |
619 | .id = 4, | |
620 | .num_resources = ARRAY_SIZE(s3c_i2c4_resource), | |
621 | .resource = s3c_i2c4_resource, | |
622 | }; | |
623 | ||
624 | void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) | |
625 | { | |
626 | struct s3c2410_platform_i2c *npd; | |
627 | ||
628 | if (!pd) { | |
629 | pd = &default_i2c_data; | |
630 | pd->bus_num = 4; | |
631 | } | |
632 | ||
633 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
634 | &s3c_device_i2c4); | |
635 | ||
636 | if (!npd->cfg_gpio) | |
637 | npd->cfg_gpio = s3c_i2c4_cfg_gpio; | |
638 | } | |
639 | #endif /*CONFIG_S3C_DEV_I2C4 */ | |
640 | ||
641 | #ifdef CONFIG_S3C_DEV_I2C5 | |
642 | static struct resource s3c_i2c5_resource[] = { | |
e663cb76 KK |
643 | [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), |
644 | [1] = DEFINE_RES_IRQ(IRQ_IIC5), | |
bad1e6aa KK |
645 | }; |
646 | ||
647 | struct platform_device s3c_device_i2c5 = { | |
648 | .name = "s3c2440-i2c", | |
649 | .id = 5, | |
650 | .num_resources = ARRAY_SIZE(s3c_i2c5_resource), | |
651 | .resource = s3c_i2c5_resource, | |
652 | }; | |
653 | ||
654 | void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) | |
655 | { | |
656 | struct s3c2410_platform_i2c *npd; | |
657 | ||
658 | if (!pd) { | |
659 | pd = &default_i2c_data; | |
660 | pd->bus_num = 5; | |
661 | } | |
662 | ||
663 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
664 | &s3c_device_i2c5); | |
665 | ||
666 | if (!npd->cfg_gpio) | |
667 | npd->cfg_gpio = s3c_i2c5_cfg_gpio; | |
668 | } | |
669 | #endif /*CONFIG_S3C_DEV_I2C5 */ | |
670 | ||
671 | #ifdef CONFIG_S3C_DEV_I2C6 | |
672 | static struct resource s3c_i2c6_resource[] = { | |
e663cb76 KK |
673 | [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), |
674 | [1] = DEFINE_RES_IRQ(IRQ_IIC6), | |
bad1e6aa KK |
675 | }; |
676 | ||
677 | struct platform_device s3c_device_i2c6 = { | |
678 | .name = "s3c2440-i2c", | |
679 | .id = 6, | |
680 | .num_resources = ARRAY_SIZE(s3c_i2c6_resource), | |
681 | .resource = s3c_i2c6_resource, | |
682 | }; | |
683 | ||
684 | void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) | |
685 | { | |
686 | struct s3c2410_platform_i2c *npd; | |
687 | ||
688 | if (!pd) { | |
689 | pd = &default_i2c_data; | |
690 | pd->bus_num = 6; | |
691 | } | |
692 | ||
693 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
694 | &s3c_device_i2c6); | |
695 | ||
696 | if (!npd->cfg_gpio) | |
697 | npd->cfg_gpio = s3c_i2c6_cfg_gpio; | |
698 | } | |
699 | #endif /* CONFIG_S3C_DEV_I2C6 */ | |
700 | ||
701 | #ifdef CONFIG_S3C_DEV_I2C7 | |
702 | static struct resource s3c_i2c7_resource[] = { | |
e663cb76 KK |
703 | [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), |
704 | [1] = DEFINE_RES_IRQ(IRQ_IIC7), | |
bad1e6aa KK |
705 | }; |
706 | ||
707 | struct platform_device s3c_device_i2c7 = { | |
708 | .name = "s3c2440-i2c", | |
709 | .id = 7, | |
710 | .num_resources = ARRAY_SIZE(s3c_i2c7_resource), | |
711 | .resource = s3c_i2c7_resource, | |
712 | }; | |
713 | ||
714 | void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) | |
715 | { | |
716 | struct s3c2410_platform_i2c *npd; | |
717 | ||
718 | if (!pd) { | |
719 | pd = &default_i2c_data; | |
720 | pd->bus_num = 7; | |
721 | } | |
722 | ||
723 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
724 | &s3c_device_i2c7); | |
725 | ||
726 | if (!npd->cfg_gpio) | |
727 | npd->cfg_gpio = s3c_i2c7_cfg_gpio; | |
728 | } | |
729 | #endif /* CONFIG_S3C_DEV_I2C7 */ | |
730 | ||
57167149 KK |
731 | /* I2C HDMIPHY */ |
732 | ||
733 | #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY | |
734 | static struct resource s5p_i2c_resource[] = { | |
e663cb76 KK |
735 | [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K), |
736 | [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY), | |
57167149 KK |
737 | }; |
738 | ||
739 | struct platform_device s5p_device_i2c_hdmiphy = { | |
740 | .name = "s3c2440-hdmiphy-i2c", | |
741 | .id = -1, | |
742 | .num_resources = ARRAY_SIZE(s5p_i2c_resource), | |
743 | .resource = s5p_i2c_resource, | |
744 | }; | |
745 | ||
746 | void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) | |
747 | { | |
748 | struct s3c2410_platform_i2c *npd; | |
749 | ||
750 | if (!pd) { | |
751 | pd = &default_i2c_data; | |
752 | ||
70d291b2 SK |
753 | if (soc_is_exynos4210() || |
754 | soc_is_exynos4212() || soc_is_exynos4412()) | |
57167149 KK |
755 | pd->bus_num = 8; |
756 | else if (soc_is_s5pv210()) | |
757 | pd->bus_num = 3; | |
758 | else | |
759 | pd->bus_num = 0; | |
760 | } | |
761 | ||
762 | npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), | |
763 | &s5p_device_i2c_hdmiphy); | |
764 | } | |
ee21ae68 TB |
765 | |
766 | struct s5p_hdmi_platform_data s5p_hdmi_def_platdata; | |
767 | ||
768 | void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info, | |
769 | struct i2c_board_info *mhl_info, int mhl_bus) | |
770 | { | |
771 | struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata; | |
772 | ||
773 | if (soc_is_exynos4210() || | |
774 | soc_is_exynos4212() || soc_is_exynos4412()) | |
775 | pd->hdmiphy_bus = 8; | |
776 | else if (soc_is_s5pv210()) | |
777 | pd->hdmiphy_bus = 3; | |
778 | else | |
779 | pd->hdmiphy_bus = 0; | |
780 | ||
781 | pd->hdmiphy_info = hdmiphy_info; | |
782 | pd->mhl_info = mhl_info; | |
783 | pd->mhl_bus = mhl_bus; | |
784 | ||
785 | s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data), | |
786 | &s5p_device_hdmi); | |
787 | } | |
788 | ||
57167149 KK |
789 | #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ |
790 | ||
61c542bf KK |
791 | /* I2S */ |
792 | ||
793 | #ifdef CONFIG_PLAT_S3C24XX | |
794 | static struct resource s3c_iis_resource[] = { | |
e663cb76 | 795 | [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), |
61c542bf KK |
796 | }; |
797 | ||
798 | struct platform_device s3c_device_iis = { | |
799 | .name = "s3c24xx-iis", | |
800 | .id = -1, | |
801 | .num_resources = ARRAY_SIZE(s3c_iis_resource), | |
802 | .resource = s3c_iis_resource, | |
803 | .dev = { | |
804 | .dma_mask = &samsung_device_dma_mask, | |
805 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
806 | } | |
807 | }; | |
808 | #endif /* CONFIG_PLAT_S3C24XX */ | |
809 | ||
bad1e6aa KK |
810 | /* IDE CFCON */ |
811 | ||
812 | #ifdef CONFIG_SAMSUNG_DEV_IDE | |
813 | static struct resource s3c_cfcon_resource[] = { | |
e663cb76 KK |
814 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), |
815 | [1] = DEFINE_RES_IRQ(IRQ_CFCON), | |
bad1e6aa KK |
816 | }; |
817 | ||
818 | struct platform_device s3c_device_cfcon = { | |
819 | .id = 0, | |
820 | .num_resources = ARRAY_SIZE(s3c_cfcon_resource), | |
821 | .resource = s3c_cfcon_resource, | |
822 | }; | |
823 | ||
eff4c58d | 824 | void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) |
bad1e6aa KK |
825 | { |
826 | s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), | |
827 | &s3c_device_cfcon); | |
828 | } | |
829 | #endif /* CONFIG_SAMSUNG_DEV_IDE */ | |
830 | ||
831 | /* KEYPAD */ | |
832 | ||
833 | #ifdef CONFIG_SAMSUNG_DEV_KEYPAD | |
834 | static struct resource samsung_keypad_resources[] = { | |
e663cb76 KK |
835 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), |
836 | [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), | |
bad1e6aa KK |
837 | }; |
838 | ||
839 | struct platform_device samsung_device_keypad = { | |
840 | .name = "samsung-keypad", | |
841 | .id = -1, | |
842 | .num_resources = ARRAY_SIZE(samsung_keypad_resources), | |
843 | .resource = samsung_keypad_resources, | |
844 | }; | |
845 | ||
846 | void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) | |
847 | { | |
848 | struct samsung_keypad_platdata *npd; | |
849 | ||
850 | npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata), | |
851 | &samsung_device_keypad); | |
852 | ||
853 | if (!npd->cfg_gpio) | |
854 | npd->cfg_gpio = samsung_keypad_cfg_gpio; | |
855 | } | |
856 | #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ | |
857 | ||
61c542bf KK |
858 | /* LCD Controller */ |
859 | ||
860 | #ifdef CONFIG_PLAT_S3C24XX | |
861 | static struct resource s3c_lcd_resource[] = { | |
e663cb76 KK |
862 | [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), |
863 | [1] = DEFINE_RES_IRQ(IRQ_LCD), | |
61c542bf KK |
864 | }; |
865 | ||
866 | struct platform_device s3c_device_lcd = { | |
867 | .name = "s3c2410-lcd", | |
868 | .id = -1, | |
869 | .num_resources = ARRAY_SIZE(s3c_lcd_resource), | |
870 | .resource = s3c_lcd_resource, | |
871 | .dev = { | |
872 | .dma_mask = &samsung_device_dma_mask, | |
873 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
874 | } | |
875 | }; | |
876 | ||
877 | void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) | |
878 | { | |
879 | struct s3c2410fb_mach_info *npd; | |
880 | ||
881 | npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); | |
882 | if (npd) { | |
883 | npd->displays = kmemdup(pd->displays, | |
884 | sizeof(struct s3c2410fb_display) * npd->num_displays, | |
885 | GFP_KERNEL); | |
886 | if (!npd->displays) | |
887 | printk(KERN_ERR "no memory for LCD display data\n"); | |
888 | } else { | |
889 | printk(KERN_ERR "no memory for LCD platform data\n"); | |
890 | } | |
891 | } | |
892 | #endif /* CONFIG_PLAT_S3C24XX */ | |
893 | ||
57167149 KK |
894 | /* MFC */ |
895 | ||
896 | #ifdef CONFIG_S5P_DEV_MFC | |
897 | static struct resource s5p_mfc_resource[] = { | |
e663cb76 KK |
898 | [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K), |
899 | [1] = DEFINE_RES_IRQ(IRQ_MFC), | |
57167149 KK |
900 | }; |
901 | ||
902 | struct platform_device s5p_device_mfc = { | |
903 | .name = "s5p-mfc", | |
904 | .id = -1, | |
905 | .num_resources = ARRAY_SIZE(s5p_mfc_resource), | |
906 | .resource = s5p_mfc_resource, | |
907 | }; | |
908 | ||
909 | /* | |
910 | * MFC hardware has 2 memory interfaces which are modelled as two separate | |
911 | * platform devices to let dma-mapping distinguish between them. | |
912 | * | |
913 | * MFC parent device (s5p_device_mfc) must be registered before memory | |
914 | * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r). | |
915 | */ | |
916 | ||
917 | struct platform_device s5p_device_mfc_l = { | |
918 | .name = "s5p-mfc-l", | |
919 | .id = -1, | |
920 | .dev = { | |
921 | .parent = &s5p_device_mfc.dev, | |
922 | .dma_mask = &samsung_device_dma_mask, | |
923 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
924 | }, | |
925 | }; | |
926 | ||
927 | struct platform_device s5p_device_mfc_r = { | |
928 | .name = "s5p-mfc-r", | |
929 | .id = -1, | |
930 | .dev = { | |
931 | .parent = &s5p_device_mfc.dev, | |
932 | .dma_mask = &samsung_device_dma_mask, | |
933 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
934 | }, | |
935 | }; | |
936 | #endif /* CONFIG_S5P_DEV_MFC */ | |
937 | ||
938 | /* MIPI CSIS */ | |
939 | ||
940 | #ifdef CONFIG_S5P_DEV_CSIS0 | |
941 | static struct resource s5p_mipi_csis0_resource[] = { | |
75ac7284 | 942 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K), |
e663cb76 | 943 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0), |
57167149 KK |
944 | }; |
945 | ||
946 | struct platform_device s5p_device_mipi_csis0 = { | |
947 | .name = "s5p-mipi-csis", | |
948 | .id = 0, | |
949 | .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), | |
950 | .resource = s5p_mipi_csis0_resource, | |
951 | }; | |
952 | #endif /* CONFIG_S5P_DEV_CSIS0 */ | |
953 | ||
954 | #ifdef CONFIG_S5P_DEV_CSIS1 | |
955 | static struct resource s5p_mipi_csis1_resource[] = { | |
75ac7284 | 956 | [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K), |
e663cb76 | 957 | [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1), |
57167149 KK |
958 | }; |
959 | ||
960 | struct platform_device s5p_device_mipi_csis1 = { | |
961 | .name = "s5p-mipi-csis", | |
962 | .id = 1, | |
963 | .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), | |
964 | .resource = s5p_mipi_csis1_resource, | |
965 | }; | |
966 | #endif | |
967 | ||
bad1e6aa KK |
968 | /* NAND */ |
969 | ||
970 | #ifdef CONFIG_S3C_DEV_NAND | |
971 | static struct resource s3c_nand_resource[] = { | |
e663cb76 | 972 | [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), |
bad1e6aa KK |
973 | }; |
974 | ||
975 | struct platform_device s3c_device_nand = { | |
976 | .name = "s3c2410-nand", | |
977 | .id = -1, | |
978 | .num_resources = ARRAY_SIZE(s3c_nand_resource), | |
979 | .resource = s3c_nand_resource, | |
980 | }; | |
981 | ||
982 | /* | |
983 | * s3c_nand_copy_set() - copy nand set data | |
984 | * @set: The new structure, directly copied from the old. | |
985 | * | |
986 | * Copy all the fields from the NAND set field from what is probably __initdata | |
987 | * to new kernel memory. The code returns 0 if the copy happened correctly or | |
988 | * an error code for the calling function to display. | |
989 | * | |
990 | * Note, we currently do not try and look to see if we've already copied the | |
991 | * data in a previous set. | |
992 | */ | |
993 | static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) | |
994 | { | |
995 | void *ptr; | |
996 | int size; | |
997 | ||
998 | size = sizeof(struct mtd_partition) * set->nr_partitions; | |
999 | if (size) { | |
1000 | ptr = kmemdup(set->partitions, size, GFP_KERNEL); | |
1001 | set->partitions = ptr; | |
1002 | ||
1003 | if (!ptr) | |
1004 | return -ENOMEM; | |
1005 | } | |
1006 | ||
1007 | if (set->nr_map && set->nr_chips) { | |
1008 | size = sizeof(int) * set->nr_chips; | |
1009 | ptr = kmemdup(set->nr_map, size, GFP_KERNEL); | |
1010 | set->nr_map = ptr; | |
1011 | ||
1012 | if (!ptr) | |
1013 | return -ENOMEM; | |
1014 | } | |
1015 | ||
1016 | if (set->ecc_layout) { | |
1017 | ptr = kmemdup(set->ecc_layout, | |
1018 | sizeof(struct nand_ecclayout), GFP_KERNEL); | |
1019 | set->ecc_layout = ptr; | |
1020 | ||
1021 | if (!ptr) | |
1022 | return -ENOMEM; | |
1023 | } | |
1024 | ||
1025 | return 0; | |
1026 | } | |
1027 | ||
1028 | void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) | |
1029 | { | |
1030 | struct s3c2410_platform_nand *npd; | |
1031 | int size; | |
1032 | int ret; | |
1033 | ||
1034 | /* note, if we get a failure in allocation, we simply drop out of the | |
1035 | * function. If there is so little memory available at initialisation | |
1036 | * time then there is little chance the system is going to run. | |
1037 | */ | |
1038 | ||
1039 | npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand), | |
1040 | &s3c_device_nand); | |
1041 | if (!npd) | |
1042 | return; | |
1043 | ||
1044 | /* now see if we need to copy any of the nand set data */ | |
1045 | ||
1046 | size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; | |
1047 | if (size) { | |
1048 | struct s3c2410_nand_set *from = npd->sets; | |
1049 | struct s3c2410_nand_set *to; | |
1050 | int i; | |
1051 | ||
1052 | to = kmemdup(from, size, GFP_KERNEL); | |
1053 | npd->sets = to; /* set, even if we failed */ | |
1054 | ||
1055 | if (!to) { | |
1056 | printk(KERN_ERR "%s: no memory for sets\n", __func__); | |
1057 | return; | |
1058 | } | |
1059 | ||
1060 | for (i = 0; i < npd->nr_sets; i++) { | |
1061 | ret = s3c_nand_copy_set(to); | |
1062 | if (ret) { | |
1063 | printk(KERN_ERR "%s: failed to copy set %d\n", | |
1064 | __func__, i); | |
1065 | return; | |
1066 | } | |
1067 | to++; | |
1068 | } | |
1069 | } | |
1070 | } | |
1071 | #endif /* CONFIG_S3C_DEV_NAND */ | |
1072 | ||
1073 | /* ONENAND */ | |
1074 | ||
1075 | #ifdef CONFIG_S3C_DEV_ONENAND | |
1076 | static struct resource s3c_onenand_resources[] = { | |
e663cb76 KK |
1077 | [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), |
1078 | [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), | |
1079 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND), | |
bad1e6aa KK |
1080 | }; |
1081 | ||
1082 | struct platform_device s3c_device_onenand = { | |
1083 | .name = "samsung-onenand", | |
1084 | .id = 0, | |
1085 | .num_resources = ARRAY_SIZE(s3c_onenand_resources), | |
1086 | .resource = s3c_onenand_resources, | |
1087 | }; | |
1088 | #endif /* CONFIG_S3C_DEV_ONENAND */ | |
1089 | ||
0523ec3a KK |
1090 | #ifdef CONFIG_S3C64XX_DEV_ONENAND1 |
1091 | static struct resource s3c64xx_onenand1_resources[] = { | |
e663cb76 KK |
1092 | [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), |
1093 | [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), | |
1094 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), | |
0523ec3a KK |
1095 | }; |
1096 | ||
1097 | struct platform_device s3c64xx_device_onenand1 = { | |
1098 | .name = "samsung-onenand", | |
1099 | .id = 1, | |
1100 | .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), | |
1101 | .resource = s3c64xx_onenand1_resources, | |
1102 | }; | |
1103 | ||
eff4c58d | 1104 | void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) |
0523ec3a KK |
1105 | { |
1106 | s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), | |
1107 | &s3c64xx_device_onenand1); | |
1108 | } | |
1109 | #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ | |
1110 | ||
57167149 KK |
1111 | #ifdef CONFIG_S5P_DEV_ONENAND |
1112 | static struct resource s5p_onenand_resources[] = { | |
e663cb76 KK |
1113 | [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K), |
1114 | [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K), | |
1115 | [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI), | |
57167149 KK |
1116 | }; |
1117 | ||
1118 | struct platform_device s5p_device_onenand = { | |
1119 | .name = "s5pc110-onenand", | |
1120 | .id = -1, | |
1121 | .num_resources = ARRAY_SIZE(s5p_onenand_resources), | |
1122 | .resource = s5p_onenand_resources, | |
1123 | }; | |
1124 | #endif /* CONFIG_S5P_DEV_ONENAND */ | |
1125 | ||
1126 | /* PMU */ | |
1127 | ||
1128 | #ifdef CONFIG_PLAT_S5P | |
e663cb76 KK |
1129 | static struct resource s5p_pmu_resource[] = { |
1130 | DEFINE_RES_IRQ(IRQ_PMU) | |
57167149 KK |
1131 | }; |
1132 | ||
6d259a25 | 1133 | static struct platform_device s5p_device_pmu = { |
57167149 KK |
1134 | .name = "arm-pmu", |
1135 | .id = ARM_PMU_DEVICE_CPU, | |
e663cb76 KK |
1136 | .num_resources = ARRAY_SIZE(s5p_pmu_resource), |
1137 | .resource = s5p_pmu_resource, | |
57167149 KK |
1138 | }; |
1139 | ||
1140 | static int __init s5p_pmu_init(void) | |
1141 | { | |
1142 | platform_device_register(&s5p_device_pmu); | |
1143 | return 0; | |
1144 | } | |
1145 | arch_initcall(s5p_pmu_init); | |
1146 | #endif /* CONFIG_PLAT_S5P */ | |
1147 | ||
bad1e6aa KK |
1148 | /* PWM Timer */ |
1149 | ||
1150 | #ifdef CONFIG_SAMSUNG_DEV_PWM | |
1151 | ||
1152 | #define TIMER_RESOURCE_SIZE (1) | |
1153 | ||
1154 | #define TIMER_RESOURCE(_tmr, _irq) \ | |
1155 | (struct resource [TIMER_RESOURCE_SIZE]) { \ | |
1156 | [0] = { \ | |
1157 | .start = _irq, \ | |
1158 | .end = _irq, \ | |
1159 | .flags = IORESOURCE_IRQ \ | |
1160 | } \ | |
1161 | } | |
1162 | ||
1163 | #define DEFINE_S3C_TIMER(_tmr_no, _irq) \ | |
1164 | .name = "s3c24xx-pwm", \ | |
1165 | .id = _tmr_no, \ | |
1166 | .num_resources = TIMER_RESOURCE_SIZE, \ | |
1167 | .resource = TIMER_RESOURCE(_tmr_no, _irq), \ | |
1168 | ||
1169 | /* | |
1170 | * since we already have an static mapping for the timer, | |
1171 | * we do not bother setting any IO resource for the base. | |
1172 | */ | |
1173 | ||
1174 | struct platform_device s3c_device_timer[] = { | |
1175 | [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) }, | |
1176 | [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) }, | |
1177 | [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) }, | |
1178 | [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) }, | |
1179 | [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) }, | |
1180 | }; | |
1181 | #endif /* CONFIG_SAMSUNG_DEV_PWM */ | |
1182 | ||
61c542bf KK |
1183 | /* RTC */ |
1184 | ||
1185 | #ifdef CONFIG_PLAT_S3C24XX | |
1186 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
1187 | [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), |
1188 | [1] = DEFINE_RES_IRQ(IRQ_RTC), | |
1189 | [2] = DEFINE_RES_IRQ(IRQ_TICK), | |
61c542bf KK |
1190 | }; |
1191 | ||
1192 | struct platform_device s3c_device_rtc = { | |
1193 | .name = "s3c2410-rtc", | |
1194 | .id = -1, | |
1195 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
1196 | .resource = s3c_rtc_resource, | |
1197 | }; | |
1198 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1199 | ||
bad1e6aa KK |
1200 | #ifdef CONFIG_S3C_DEV_RTC |
1201 | static struct resource s3c_rtc_resource[] = { | |
e663cb76 KK |
1202 | [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), |
1203 | [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), | |
1204 | [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), | |
bad1e6aa KK |
1205 | }; |
1206 | ||
1207 | struct platform_device s3c_device_rtc = { | |
1208 | .name = "s3c64xx-rtc", | |
1209 | .id = -1, | |
1210 | .num_resources = ARRAY_SIZE(s3c_rtc_resource), | |
1211 | .resource = s3c_rtc_resource, | |
1212 | }; | |
1213 | #endif /* CONFIG_S3C_DEV_RTC */ | |
1214 | ||
61c542bf KK |
1215 | /* SDI */ |
1216 | ||
1217 | #ifdef CONFIG_PLAT_S3C24XX | |
1218 | static struct resource s3c_sdi_resource[] = { | |
e663cb76 KK |
1219 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), |
1220 | [1] = DEFINE_RES_IRQ(IRQ_SDI), | |
61c542bf KK |
1221 | }; |
1222 | ||
1223 | struct platform_device s3c_device_sdi = { | |
1224 | .name = "s3c2410-sdi", | |
1225 | .id = -1, | |
1226 | .num_resources = ARRAY_SIZE(s3c_sdi_resource), | |
1227 | .resource = s3c_sdi_resource, | |
1228 | }; | |
1229 | ||
1230 | void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) | |
1231 | { | |
1232 | s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), | |
1233 | &s3c_device_sdi); | |
1234 | } | |
1235 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1236 | ||
1237 | /* SPI */ | |
1238 | ||
1239 | #ifdef CONFIG_PLAT_S3C24XX | |
1240 | static struct resource s3c_spi0_resource[] = { | |
e663cb76 KK |
1241 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), |
1242 | [1] = DEFINE_RES_IRQ(IRQ_SPI0), | |
61c542bf KK |
1243 | }; |
1244 | ||
1245 | struct platform_device s3c_device_spi0 = { | |
1246 | .name = "s3c2410-spi", | |
1247 | .id = 0, | |
1248 | .num_resources = ARRAY_SIZE(s3c_spi0_resource), | |
1249 | .resource = s3c_spi0_resource, | |
1250 | .dev = { | |
1251 | .dma_mask = &samsung_device_dma_mask, | |
1252 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1253 | } | |
1254 | }; | |
1255 | ||
1256 | static struct resource s3c_spi1_resource[] = { | |
e663cb76 KK |
1257 | [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), |
1258 | [1] = DEFINE_RES_IRQ(IRQ_SPI1), | |
61c542bf KK |
1259 | }; |
1260 | ||
1261 | struct platform_device s3c_device_spi1 = { | |
1262 | .name = "s3c2410-spi", | |
1263 | .id = 1, | |
1264 | .num_resources = ARRAY_SIZE(s3c_spi1_resource), | |
1265 | .resource = s3c_spi1_resource, | |
1266 | .dev = { | |
1267 | .dma_mask = &samsung_device_dma_mask, | |
1268 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1269 | } | |
1270 | }; | |
1271 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1272 | ||
1273 | /* Touchscreen */ | |
1274 | ||
1275 | #ifdef CONFIG_PLAT_S3C24XX | |
1276 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
1277 | [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), |
1278 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
61c542bf KK |
1279 | }; |
1280 | ||
1281 | struct platform_device s3c_device_ts = { | |
1282 | .name = "s3c2410-ts", | |
1283 | .id = -1, | |
1284 | .dev.parent = &s3c_device_adc.dev, | |
1285 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
1286 | .resource = s3c_ts_resource, | |
1287 | }; | |
1288 | ||
1289 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) | |
1290 | { | |
1291 | s3c_set_platdata(hard_s3c2410ts_info, | |
1292 | sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); | |
1293 | } | |
1294 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1295 | ||
bad1e6aa KK |
1296 | #ifdef CONFIG_SAMSUNG_DEV_TS |
1297 | static struct resource s3c_ts_resource[] = { | |
e663cb76 KK |
1298 | [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), |
1299 | [1] = DEFINE_RES_IRQ(IRQ_TC), | |
bad1e6aa KK |
1300 | }; |
1301 | ||
1302 | static struct s3c2410_ts_mach_info default_ts_data __initdata = { | |
1303 | .delay = 10000, | |
1304 | .presc = 49, | |
1305 | .oversampling_shift = 2, | |
1306 | }; | |
1307 | ||
1308 | struct platform_device s3c_device_ts = { | |
1309 | .name = "s3c64xx-ts", | |
1310 | .id = -1, | |
1311 | .num_resources = ARRAY_SIZE(s3c_ts_resource), | |
1312 | .resource = s3c_ts_resource, | |
1313 | }; | |
1314 | ||
1315 | void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) | |
1316 | { | |
1317 | if (!pd) | |
1318 | pd = &default_ts_data; | |
1319 | ||
1320 | s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), | |
1321 | &s3c_device_ts); | |
1322 | } | |
1323 | #endif /* CONFIG_SAMSUNG_DEV_TS */ | |
1324 | ||
57167149 KK |
1325 | /* TV */ |
1326 | ||
1327 | #ifdef CONFIG_S5P_DEV_TV | |
1328 | ||
1329 | static struct resource s5p_hdmi_resources[] = { | |
e663cb76 KK |
1330 | [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M), |
1331 | [1] = DEFINE_RES_IRQ(IRQ_HDMI), | |
57167149 KK |
1332 | }; |
1333 | ||
1334 | struct platform_device s5p_device_hdmi = { | |
1335 | .name = "s5p-hdmi", | |
1336 | .id = -1, | |
1337 | .num_resources = ARRAY_SIZE(s5p_hdmi_resources), | |
1338 | .resource = s5p_hdmi_resources, | |
1339 | }; | |
1340 | ||
1341 | static struct resource s5p_sdo_resources[] = { | |
e663cb76 KK |
1342 | [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K), |
1343 | [1] = DEFINE_RES_IRQ(IRQ_SDO), | |
57167149 KK |
1344 | }; |
1345 | ||
1346 | struct platform_device s5p_device_sdo = { | |
1347 | .name = "s5p-sdo", | |
1348 | .id = -1, | |
1349 | .num_resources = ARRAY_SIZE(s5p_sdo_resources), | |
1350 | .resource = s5p_sdo_resources, | |
1351 | }; | |
1352 | ||
1353 | static struct resource s5p_mixer_resources[] = { | |
e663cb76 KK |
1354 | [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"), |
1355 | [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"), | |
1356 | [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"), | |
57167149 KK |
1357 | }; |
1358 | ||
1359 | struct platform_device s5p_device_mixer = { | |
1360 | .name = "s5p-mixer", | |
1361 | .id = -1, | |
1362 | .num_resources = ARRAY_SIZE(s5p_mixer_resources), | |
1363 | .resource = s5p_mixer_resources, | |
1364 | .dev = { | |
1365 | .dma_mask = &samsung_device_dma_mask, | |
1366 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1367 | } | |
1368 | }; | |
1369 | #endif /* CONFIG_S5P_DEV_TV */ | |
1370 | ||
bad1e6aa KK |
1371 | /* USB */ |
1372 | ||
1373 | #ifdef CONFIG_S3C_DEV_USB_HOST | |
1374 | static struct resource s3c_usb_resource[] = { | |
e663cb76 KK |
1375 | [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), |
1376 | [1] = DEFINE_RES_IRQ(IRQ_USBH), | |
bad1e6aa KK |
1377 | }; |
1378 | ||
1379 | struct platform_device s3c_device_ohci = { | |
1380 | .name = "s3c2410-ohci", | |
1381 | .id = -1, | |
1382 | .num_resources = ARRAY_SIZE(s3c_usb_resource), | |
1383 | .resource = s3c_usb_resource, | |
1384 | .dev = { | |
1385 | .dma_mask = &samsung_device_dma_mask, | |
1386 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1387 | } | |
1388 | }; | |
1389 | ||
1390 | /* | |
1391 | * s3c_ohci_set_platdata - initialise OHCI device platform data | |
1392 | * @info: The platform data. | |
1393 | * | |
1394 | * This call copies the @info passed in and sets the device .platform_data | |
1395 | * field to that copy. The @info is copied so that the original can be marked | |
1396 | * __initdata. | |
1397 | */ | |
1398 | ||
1399 | void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) | |
1400 | { | |
1401 | s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), | |
1402 | &s3c_device_ohci); | |
1403 | } | |
1404 | #endif /* CONFIG_S3C_DEV_USB_HOST */ | |
1405 | ||
61c542bf KK |
1406 | /* USB Device (Gadget) */ |
1407 | ||
1408 | #ifdef CONFIG_PLAT_S3C24XX | |
1409 | static struct resource s3c_usbgadget_resource[] = { | |
e663cb76 KK |
1410 | [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), |
1411 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1412 | }; |
1413 | ||
1414 | struct platform_device s3c_device_usbgadget = { | |
1415 | .name = "s3c2410-usbgadget", | |
1416 | .id = -1, | |
1417 | .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), | |
1418 | .resource = s3c_usbgadget_resource, | |
1419 | }; | |
1420 | ||
1421 | void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) | |
1422 | { | |
1423 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); | |
1424 | } | |
1425 | #endif /* CONFIG_PLAT_S3C24XX */ | |
1426 | ||
57167149 KK |
1427 | /* USB EHCI Host Controller */ |
1428 | ||
1429 | #ifdef CONFIG_S5P_DEV_USB_EHCI | |
1430 | static struct resource s5p_ehci_resource[] = { | |
e663cb76 KK |
1431 | [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256), |
1432 | [1] = DEFINE_RES_IRQ(IRQ_USB_HOST), | |
57167149 KK |
1433 | }; |
1434 | ||
1435 | struct platform_device s5p_device_ehci = { | |
1436 | .name = "s5p-ehci", | |
1437 | .id = -1, | |
1438 | .num_resources = ARRAY_SIZE(s5p_ehci_resource), | |
1439 | .resource = s5p_ehci_resource, | |
1440 | .dev = { | |
1441 | .dma_mask = &samsung_device_dma_mask, | |
1442 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1443 | } | |
1444 | }; | |
1445 | ||
1446 | void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd) | |
1447 | { | |
1448 | struct s5p_ehci_platdata *npd; | |
1449 | ||
1450 | npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata), | |
1451 | &s5p_device_ehci); | |
1452 | ||
1453 | if (!npd->phy_init) | |
1454 | npd->phy_init = s5p_usb_phy_init; | |
1455 | if (!npd->phy_exit) | |
1456 | npd->phy_exit = s5p_usb_phy_exit; | |
1457 | } | |
1458 | #endif /* CONFIG_S5P_DEV_USB_EHCI */ | |
1459 | ||
bad1e6aa KK |
1460 | /* USB HSOTG */ |
1461 | ||
1462 | #ifdef CONFIG_S3C_DEV_USB_HSOTG | |
1463 | static struct resource s3c_usb_hsotg_resources[] = { | |
c65d8ef2 | 1464 | [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), |
e663cb76 | 1465 | [1] = DEFINE_RES_IRQ(IRQ_OTG), |
bad1e6aa KK |
1466 | }; |
1467 | ||
1468 | struct platform_device s3c_device_usb_hsotg = { | |
1469 | .name = "s3c-hsotg", | |
1470 | .id = -1, | |
1471 | .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), | |
1472 | .resource = s3c_usb_hsotg_resources, | |
1473 | .dev = { | |
1474 | .dma_mask = &samsung_device_dma_mask, | |
1475 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1476 | }, | |
1477 | }; | |
99f6e1f5 JS |
1478 | |
1479 | void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd) | |
1480 | { | |
1481 | struct s3c_hsotg_plat *npd; | |
1482 | ||
1483 | npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat), | |
1484 | &s3c_device_usb_hsotg); | |
1485 | ||
1486 | if (!npd->phy_init) | |
1487 | npd->phy_init = s5p_usb_phy_init; | |
1488 | if (!npd->phy_exit) | |
1489 | npd->phy_exit = s5p_usb_phy_exit; | |
1490 | } | |
bad1e6aa KK |
1491 | #endif /* CONFIG_S3C_DEV_USB_HSOTG */ |
1492 | ||
61c542bf KK |
1493 | /* USB High Spped 2.0 Device (Gadget) */ |
1494 | ||
1495 | #ifdef CONFIG_PLAT_S3C24XX | |
1496 | static struct resource s3c_hsudc_resource[] = { | |
e663cb76 KK |
1497 | [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), |
1498 | [1] = DEFINE_RES_IRQ(IRQ_USBD), | |
61c542bf KK |
1499 | }; |
1500 | ||
1501 | struct platform_device s3c_device_usb_hsudc = { | |
1502 | .name = "s3c-hsudc", | |
1503 | .id = -1, | |
1504 | .num_resources = ARRAY_SIZE(s3c_hsudc_resource), | |
1505 | .resource = s3c_hsudc_resource, | |
1506 | .dev = { | |
1507 | .dma_mask = &samsung_device_dma_mask, | |
1508 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1509 | }, | |
1510 | }; | |
1511 | ||
1512 | void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) | |
1513 | { | |
1514 | s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); | |
1515 | } | |
1516 | #endif /* CONFIG_PLAT_S3C24XX */ | |
bad1e6aa KK |
1517 | |
1518 | /* WDT */ | |
1519 | ||
1520 | #ifdef CONFIG_S3C_DEV_WDT | |
1521 | static struct resource s3c_wdt_resource[] = { | |
e663cb76 KK |
1522 | [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), |
1523 | [1] = DEFINE_RES_IRQ(IRQ_WDT), | |
bad1e6aa KK |
1524 | }; |
1525 | ||
1526 | struct platform_device s3c_device_wdt = { | |
1527 | .name = "s3c2410-wdt", | |
1528 | .id = -1, | |
1529 | .num_resources = ARRAY_SIZE(s3c_wdt_resource), | |
1530 | .resource = s3c_wdt_resource, | |
1531 | }; | |
1532 | #endif /* CONFIG_S3C_DEV_WDT */ | |
875a5937 PV |
1533 | |
1534 | #ifdef CONFIG_S3C64XX_DEV_SPI0 | |
1535 | static struct resource s3c64xx_spi0_resource[] = { | |
1536 | [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), | |
1537 | [1] = DEFINE_RES_DMA(DMACH_SPI0_TX), | |
1538 | [2] = DEFINE_RES_DMA(DMACH_SPI0_RX), | |
1539 | [3] = DEFINE_RES_IRQ(IRQ_SPI0), | |
1540 | }; | |
1541 | ||
1542 | struct platform_device s3c64xx_device_spi0 = { | |
4d0efdd5 | 1543 | .name = "s3c6410-spi", |
875a5937 PV |
1544 | .id = 0, |
1545 | .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), | |
1546 | .resource = s3c64xx_spi0_resource, | |
1547 | .dev = { | |
1548 | .dma_mask = &samsung_device_dma_mask, | |
1549 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1550 | }, | |
1551 | }; | |
1552 | ||
4d0efdd5 TA |
1553 | void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1554 | int num_cs) | |
875a5937 | 1555 | { |
4d0efdd5 | 1556 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1557 | |
1558 | /* Reject invalid configuration */ | |
1559 | if (!num_cs || src_clk_nr < 0) { | |
1560 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1561 | return; | |
1562 | } | |
1563 | ||
4d0efdd5 TA |
1564 | pd.num_cs = num_cs; |
1565 | pd.src_clk_nr = src_clk_nr; | |
1566 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; | |
4566c7f7 | 1567 | |
4d0efdd5 | 1568 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); |
875a5937 PV |
1569 | } |
1570 | #endif /* CONFIG_S3C64XX_DEV_SPI0 */ | |
1571 | ||
1572 | #ifdef CONFIG_S3C64XX_DEV_SPI1 | |
1573 | static struct resource s3c64xx_spi1_resource[] = { | |
1574 | [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), | |
1575 | [1] = DEFINE_RES_DMA(DMACH_SPI1_TX), | |
1576 | [2] = DEFINE_RES_DMA(DMACH_SPI1_RX), | |
1577 | [3] = DEFINE_RES_IRQ(IRQ_SPI1), | |
1578 | }; | |
1579 | ||
1580 | struct platform_device s3c64xx_device_spi1 = { | |
4d0efdd5 | 1581 | .name = "s3c6410-spi", |
875a5937 PV |
1582 | .id = 1, |
1583 | .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), | |
1584 | .resource = s3c64xx_spi1_resource, | |
1585 | .dev = { | |
1586 | .dma_mask = &samsung_device_dma_mask, | |
1587 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1588 | }, | |
1589 | }; | |
1590 | ||
4d0efdd5 TA |
1591 | void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1592 | int num_cs) | |
875a5937 | 1593 | { |
875a5937 PV |
1594 | /* Reject invalid configuration */ |
1595 | if (!num_cs || src_clk_nr < 0) { | |
1596 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1597 | return; | |
1598 | } | |
1599 | ||
4d0efdd5 TA |
1600 | pd.num_cs = num_cs; |
1601 | pd.src_clk_nr = src_clk_nr; | |
1602 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; | |
4566c7f7 | 1603 | |
4d0efdd5 | 1604 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); |
875a5937 PV |
1605 | } |
1606 | #endif /* CONFIG_S3C64XX_DEV_SPI1 */ | |
1607 | ||
1608 | #ifdef CONFIG_S3C64XX_DEV_SPI2 | |
1609 | static struct resource s3c64xx_spi2_resource[] = { | |
1610 | [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), | |
1611 | [1] = DEFINE_RES_DMA(DMACH_SPI2_TX), | |
1612 | [2] = DEFINE_RES_DMA(DMACH_SPI2_RX), | |
1613 | [3] = DEFINE_RES_IRQ(IRQ_SPI2), | |
1614 | }; | |
1615 | ||
1616 | struct platform_device s3c64xx_device_spi2 = { | |
4d0efdd5 | 1617 | .name = "s3c6410-spi", |
875a5937 PV |
1618 | .id = 2, |
1619 | .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), | |
1620 | .resource = s3c64xx_spi2_resource, | |
1621 | .dev = { | |
1622 | .dma_mask = &samsung_device_dma_mask, | |
1623 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
1624 | }, | |
1625 | }; | |
1626 | ||
4d0efdd5 TA |
1627 | void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, |
1628 | int num_cs) | |
875a5937 | 1629 | { |
4d0efdd5 | 1630 | struct s3c64xx_spi_info pd; |
875a5937 PV |
1631 | |
1632 | /* Reject invalid configuration */ | |
1633 | if (!num_cs || src_clk_nr < 0) { | |
1634 | pr_err("%s: Invalid SPI configuration\n", __func__); | |
1635 | return; | |
1636 | } | |
1637 | ||
4d0efdd5 TA |
1638 | pd.num_cs = num_cs; |
1639 | pd.src_clk_nr = src_clk_nr; | |
1640 | pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; | |
323d7717 | 1641 | |
4d0efdd5 | 1642 | s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); |
875a5937 PV |
1643 | } |
1644 | #endif /* CONFIG_S3C64XX_DEV_SPI2 */ |