Commit | Line | Data |
---|---|---|
c116c1d7 | 1 | /* arch/arm/plat-samsung/include/plat/pm.h |
1da177e4 LT |
2 | * |
3 | * Copyright (c) 2004 Simtec Electronics | |
6419711a | 4 | * http://armlinux.simtec.co.uk/ |
1da177e4 LT |
5 | * Written by Ben Dooks, <ben@simtec.co.uk> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
4e59c25d | 12 | /* s3c_pm_init |
1da177e4 LT |
13 | * |
14 | * called from board at initialisation time to setup the power | |
15 | * management | |
16 | */ | |
17 | ||
f5aeffb7 MB |
18 | #include <linux/irq.h> |
19 | ||
a09e2b21 MB |
20 | struct sys_device; |
21 | ||
1da177e4 LT |
22 | #ifdef CONFIG_PM |
23 | ||
4e59c25d | 24 | extern __init int s3c_pm_init(void); |
1da177e4 LT |
25 | |
26 | #else | |
27 | ||
4e59c25d | 28 | static inline int s3c_pm_init(void) |
1da177e4 LT |
29 | { |
30 | return 0; | |
31 | } | |
32 | #endif | |
33 | ||
34 | /* configuration for the IRQ mask over sleep */ | |
35 | extern unsigned long s3c_irqwake_intmask; | |
36 | extern unsigned long s3c_irqwake_eintmask; | |
37 | ||
38 | /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ | |
39 | extern unsigned long s3c_irqwake_intallow; | |
40 | extern unsigned long s3c_irqwake_eintallow; | |
41 | ||
0033a2f0 BD |
42 | /* per-cpu sleep functions */ |
43 | ||
44 | extern void (*pm_cpu_prep)(void); | |
45 | extern void (*pm_cpu_sleep)(void); | |
46 | ||
1da177e4 LT |
47 | /* Flags for PM Control */ |
48 | ||
49 | extern unsigned long s3c_pm_flags; | |
50 | ||
4b637dc2 BD |
51 | extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */ |
52 | ||
1da177e4 LT |
53 | /* from sleep.S */ |
54 | ||
2e2f3d37 | 55 | extern int s3c_cpu_save(unsigned long *saveblk, long); |
ef30e144 BD |
56 | extern void s3c_cpu_resume(void); |
57 | ||
58095d7f | 58 | extern void s3c2410_cpu_suspend(void); |
1da177e4 | 59 | |
1da177e4 LT |
60 | /* sleep save info */ |
61 | ||
6419711a BD |
62 | /** |
63 | * struct sleep_save - save information for shared peripherals. | |
64 | * @reg: Pointer to the register to save. | |
65 | * @val: Holder for the value saved from reg. | |
66 | * | |
67 | * This describes a list of registers which is used by the pm core and | |
68 | * other subsystem to save and restore register values over suspend. | |
69 | */ | |
1da177e4 LT |
70 | struct sleep_save { |
71 | void __iomem *reg; | |
72 | unsigned long val; | |
73 | }; | |
74 | ||
75 | #define SAVE_ITEM(x) \ | |
76 | { .reg = (x) } | |
77 | ||
d2b07fe2 BD |
78 | /** |
79 | * struct pm_uart_save - save block for core UART | |
80 | * @ulcon: Save value for S3C2410_ULCON | |
81 | * @ucon: Save value for S3C2410_UCON | |
82 | * @ufcon: Save value for S3C2410_UFCON | |
83 | * @umcon: Save value for S3C2410_UMCON | |
84 | * @ubrdiv: Save value for S3C2410_UBRDIV | |
85 | * | |
86 | * Save block for UART registers to be held over sleep and restored if they | |
87 | * are needed (say by debug). | |
88 | */ | |
89 | struct pm_uart_save { | |
90 | u32 ulcon; | |
91 | u32 ucon; | |
92 | u32 ufcon; | |
93 | u32 umcon; | |
94 | u32 ubrdiv; | |
4b637dc2 | 95 | u32 udivslot; |
d2b07fe2 BD |
96 | }; |
97 | ||
6419711a BD |
98 | /* helper functions to save/restore lists of registers. */ |
99 | ||
100 | extern void s3c_pm_do_save(struct sleep_save *ptr, int count); | |
101 | extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); | |
102 | extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); | |
1e582fc7 BD |
103 | |
104 | #ifdef CONFIG_PM | |
f5aeffb7 | 105 | extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); |
1e582fc7 BD |
106 | extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); |
107 | extern int s3c24xx_irq_resume(struct sys_device *dev); | |
108 | #else | |
56b34426 | 109 | #define s3c_irqext_wake NULL |
1e582fc7 BD |
110 | #define s3c24xx_irq_suspend NULL |
111 | #define s3c24xx_irq_resume NULL | |
112 | #endif | |
6419711a BD |
113 | |
114 | /* PM debug functions */ | |
115 | ||
8005745d | 116 | #ifdef CONFIG_SAMSUNG_PM_DEBUG |
6419711a BD |
117 | /** |
118 | * s3c_pm_dbg() - low level debug function for use in suspend/resume. | |
119 | * @msg: The message to print. | |
120 | * | |
121 | * This function is used mainly to debug the resume process before the system | |
122 | * can rely on printk/console output. It uses the low-level debugging output | |
123 | * routine printascii() to do its work. | |
124 | */ | |
125 | extern void s3c_pm_dbg(const char *msg, ...); | |
126 | ||
127 | #define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) | |
128 | #else | |
129 | #define S3C_PMDBG(fmt...) printk(KERN_DEBUG fmt) | |
130 | #endif | |
549c7e33 | 131 | |
bd117bd1 BD |
132 | #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK |
133 | /** | |
134 | * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs | |
135 | * @set: set bits for the state of the LEDs | |
136 | * @clear: clear bits for the state of the LEDs. | |
137 | */ | |
138 | extern void s3c_pm_debug_smdkled(u32 set, u32 clear); | |
139 | ||
140 | #else | |
141 | static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { } | |
142 | #endif /* CONFIG_S3C_PM_DEBUG_LED_SMDK */ | |
143 | ||
549c7e33 BD |
144 | /* suspend memory checking */ |
145 | ||
8005745d | 146 | #ifdef CONFIG_SAMSUNG_PM_CHECK |
549c7e33 BD |
147 | extern void s3c_pm_check_prepare(void); |
148 | extern void s3c_pm_check_restore(void); | |
aa8aba69 | 149 | extern void s3c_pm_check_cleanup(void); |
549c7e33 BD |
150 | extern void s3c_pm_check_store(void); |
151 | #else | |
152 | #define s3c_pm_check_prepare() do { } while(0) | |
153 | #define s3c_pm_check_restore() do { } while(0) | |
aa8aba69 | 154 | #define s3c_pm_check_cleanup() do { } while(0) |
549c7e33 BD |
155 | #define s3c_pm_check_store() do { } while(0) |
156 | #endif | |
2261e0e6 BD |
157 | |
158 | /** | |
159 | * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ | |
160 | * | |
161 | * Setup all the necessary GPIO pins for waking the system on external | |
162 | * interrupt. | |
163 | */ | |
164 | extern void s3c_pm_configure_extint(void); | |
165 | ||
166 | /** | |
167 | * s3c_pm_restore_gpios() - restore the state of the gpios after sleep. | |
168 | * | |
169 | * Restore the state of the GPIO pins after sleep, which may involve ensuring | |
170 | * that we do not glitch the state of the pins from that the bootloader's | |
171 | * resume code has done. | |
172 | */ | |
173 | extern void s3c_pm_restore_gpios(void); | |
174 | ||
175 | /** | |
176 | * s3c_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. | |
177 | * | |
178 | * Save the GPIO states for resotration on resume. See s3c_pm_restore_gpios(). | |
179 | */ | |
180 | extern void s3c_pm_save_gpios(void); | |
181 | ||
182 | extern void s3c_pm_save_core(void); | |
183 | extern void s3c_pm_restore_core(void); |