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6419711a BD |
1 | /* linux/arch/arm/plat-s3c/pm.c |
2 | * | |
3 | * Copyright 2008 Openmoko, Inc. | |
ccae941e | 4 | * Copyright 2004-2008 Simtec Electronics |
6419711a BD |
5 | * Ben Dooks <ben@simtec.co.uk> |
6 | * http://armlinux.simtec.co.uk/ | |
7 | * | |
8 | * S3C common power management (suspend to ram) support. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/init.h> | |
16 | #include <linux/suspend.h> | |
17 | #include <linux/errno.h> | |
2261e0e6 | 18 | #include <linux/delay.h> |
cd3fc1b9 | 19 | #include <linux/of.h> |
334a1c70 | 20 | #include <linux/serial_s3c.h> |
6419711a BD |
21 | #include <linux/io.h> |
22 | ||
2261e0e6 | 23 | #include <asm/cacheflush.h> |
2c74a0ce | 24 | #include <asm/suspend.h> |
2261e0e6 | 25 | |
d6280ffb | 26 | #ifdef CONFIG_SAMSUNG_ATAGS |
d6280ffb | 27 | #include <mach/map.h> |
05a6380c | 28 | #ifndef CONFIG_ARCH_EXYNOS |
2857f650 | 29 | #include <mach/regs-clock.h> |
2261e0e6 | 30 | #include <mach/regs-irq.h> |
05a6380c | 31 | #endif |
7ba8022f | 32 | #include <mach/irqs.h> |
d6280ffb TF |
33 | #endif |
34 | ||
56b34426 | 35 | #include <asm/irq.h> |
2261e0e6 | 36 | |
6419711a | 37 | #include <plat/pm.h> |
431fb7df | 38 | #include <mach/pm-core.h> |
6419711a BD |
39 | |
40 | /* for external use */ | |
41 | ||
42 | unsigned long s3c_pm_flags; | |
43 | ||
56b34426 BD |
44 | /* The IRQ ext-int code goes here, it is too small to currently bother |
45 | * with its own file. */ | |
46 | ||
47 | unsigned long s3c_irqwake_intmask = 0xffffffffL; | |
48 | unsigned long s3c_irqwake_eintmask = 0xffffffffL; | |
49 | ||
f5aeffb7 | 50 | int s3c_irqext_wake(struct irq_data *data, unsigned int state) |
56b34426 | 51 | { |
f5aeffb7 | 52 | unsigned long bit = 1L << IRQ_EINT_BIT(data->irq); |
56b34426 BD |
53 | |
54 | if (!(s3c_irqwake_eintallow & bit)) | |
55 | return -ENOENT; | |
56 | ||
57 | printk(KERN_INFO "wake %s for irq %d\n", | |
f5aeffb7 | 58 | state ? "enabled" : "disabled", data->irq); |
56b34426 BD |
59 | |
60 | if (!state) | |
61 | s3c_irqwake_eintmask |= bit; | |
62 | else | |
63 | s3c_irqwake_eintmask &= ~bit; | |
64 | ||
65 | return 0; | |
66 | } | |
6419711a | 67 | |
2261e0e6 | 68 | void (*pm_cpu_prep)(void); |
29cb3cd2 | 69 | int (*pm_cpu_sleep)(unsigned long); |
2261e0e6 BD |
70 | |
71 | #define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) | |
72 | ||
73 | /* s3c_pm_enter | |
74 | * | |
75 | * central control for sleep/resume process | |
76 | */ | |
77 | ||
78 | static int s3c_pm_enter(suspend_state_t state) | |
79 | { | |
d3fcacf5 | 80 | int ret; |
2261e0e6 BD |
81 | /* ensure the debug is initialised (if enabled) */ |
82 | ||
83 | s3c_pm_debug_init(); | |
84 | ||
85 | S3C_PMDBG("%s(%d)\n", __func__, state); | |
86 | ||
87 | if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { | |
88 | printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); | |
89 | return -EINVAL; | |
90 | } | |
91 | ||
92 | /* check if we have anything to wake-up with... bad things seem | |
93 | * to happen if you suspend with no wakeup (system will often | |
94 | * require a full power-cycle) | |
95 | */ | |
96 | ||
cd3fc1b9 TF |
97 | if (!of_have_populated_dt() && |
98 | !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && | |
2261e0e6 BD |
99 | !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { |
100 | printk(KERN_ERR "%s: No wake-up sources!\n", __func__); | |
101 | printk(KERN_ERR "%s: Aborting sleep\n", __func__); | |
102 | return -EINVAL; | |
103 | } | |
104 | ||
2261e0e6 BD |
105 | /* save all necessary core registers not covered by the drivers */ |
106 | ||
cd3fc1b9 TF |
107 | if (!of_have_populated_dt()) { |
108 | samsung_pm_save_gpios(); | |
109 | samsung_pm_saved_gpios(); | |
110 | } | |
111 | ||
d2b07fe2 | 112 | s3c_pm_save_uarts(); |
2261e0e6 BD |
113 | s3c_pm_save_core(); |
114 | ||
115 | /* set the irq configuration for wake */ | |
116 | ||
117 | s3c_pm_configure_extint(); | |
118 | ||
119 | S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", | |
120 | s3c_irqwake_intmask, s3c_irqwake_eintmask); | |
121 | ||
122 | s3c_pm_arch_prepare_irqs(); | |
123 | ||
124 | /* call cpu specific preparation */ | |
125 | ||
126 | pm_cpu_prep(); | |
127 | ||
128 | /* flush cache back to ram */ | |
129 | ||
130 | flush_cache_all(); | |
131 | ||
132 | s3c_pm_check_store(); | |
133 | ||
134 | /* send the cpu to sleep... */ | |
135 | ||
136 | s3c_pm_arch_stop_clocks(); | |
137 | ||
e7089da9 | 138 | /* this will also act as our return point from when |
fff94cd9 BD |
139 | * we resume as it saves its own register state and restores it |
140 | * during the resume. */ | |
2261e0e6 | 141 | |
d3fcacf5 AK |
142 | ret = cpu_suspend(0, pm_cpu_sleep); |
143 | if (ret) | |
144 | return ret; | |
2261e0e6 | 145 | |
2261e0e6 BD |
146 | /* restore the system state */ |
147 | ||
148 | s3c_pm_restore_core(); | |
d2b07fe2 | 149 | s3c_pm_restore_uarts(); |
cd3fc1b9 TF |
150 | |
151 | if (!of_have_populated_dt()) { | |
152 | samsung_pm_restore_gpios(); | |
153 | s3c_pm_restored_gpios(); | |
154 | } | |
2261e0e6 BD |
155 | |
156 | s3c_pm_debug_init(); | |
157 | ||
158 | /* check what irq (if any) restored the system */ | |
159 | ||
160 | s3c_pm_arch_show_resume_irqs(); | |
161 | ||
162 | S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); | |
163 | ||
bd117bd1 BD |
164 | /* LEDs should now be 1110 */ |
165 | s3c_pm_debug_smdkled(1 << 1, 0); | |
166 | ||
2261e0e6 BD |
167 | s3c_pm_check_restore(); |
168 | ||
169 | /* ok, let's return from sleep */ | |
170 | ||
171 | S3C_PMDBG("S3C PM Resume (post-restore)\n"); | |
172 | return 0; | |
173 | } | |
174 | ||
aa8aba69 BD |
175 | static int s3c_pm_prepare(void) |
176 | { | |
177 | /* prepare check area if configured */ | |
178 | ||
179 | s3c_pm_check_prepare(); | |
180 | return 0; | |
181 | } | |
182 | ||
183 | static void s3c_pm_finish(void) | |
184 | { | |
185 | s3c_pm_check_cleanup(); | |
186 | } | |
187 | ||
2f55ac07 | 188 | static const struct platform_suspend_ops s3c_pm_ops = { |
2261e0e6 | 189 | .enter = s3c_pm_enter, |
aa8aba69 BD |
190 | .prepare = s3c_pm_prepare, |
191 | .finish = s3c_pm_finish, | |
2261e0e6 BD |
192 | .valid = suspend_valid_only_mem, |
193 | }; | |
194 | ||
4e59c25d | 195 | /* s3c_pm_init |
2261e0e6 BD |
196 | * |
197 | * Attach the power management functions. This should be called | |
198 | * from the board specific initialisation if the board supports | |
199 | * it. | |
200 | */ | |
201 | ||
4e59c25d | 202 | int __init s3c_pm_init(void) |
2261e0e6 BD |
203 | { |
204 | printk("S3C Power Management, Copyright 2004 Simtec Electronics\n"); | |
205 | ||
206 | suspend_set_ops(&s3c_pm_ops); | |
207 | return 0; | |
208 | } |