[deliverable/linux.git] / arch / arm / plat-samsung / s5p-irq-pm.c

/*
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Based on arch/arm/plat-s3c24xx/irq-pm.c,
 * Copyright (c) 2003,2004 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>

#include <plat/cpu.h>
#include <plat/irqs.h>
#include <plat/pm.h>
#include <mach/map.h>

#include <mach/regs-gpio.h>

#ifndef CONFIG_ARCH_EXYNOS
#include <mach/regs-irq.h>
#endif

/* state for IRQs over sleep */

/* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
 * as wakeup sources
 *
 * set bit to 1 in allow bitfield to enable the wakeup settings on it
*/

unsigned long s3c_irqwake_intallow	= 0x00000006L;
unsigned long s3c_irqwake_eintallow	= 0xffffffffL;

int s3c_irq_wake(struct irq_data *data, unsigned int state)
{
	unsigned long irqbit;
	unsigned int irq_rtc_tic, irq_rtc_alarm;

#ifdef CONFIG_ARCH_EXYNOS
	if (soc_is_exynos5250()) {
		irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
		irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
	} else {
		irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
		irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
	}
#else
	irq_rtc_tic = IRQ_RTC_TIC;
	irq_rtc_alarm = IRQ_RTC_ALARM;
#endif

	if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
		irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);

		if (!state)
			s3c_irqwake_intmask |= irqbit;
		else
			s3c_irqwake_intmask &= ~irqbit;
	} else {
		return -ENOENT;
	}

	return 0;
}

static struct sleep_save eint_save[] = {
	SAVE_ITEM(S5P_EINT_CON(0)),
	SAVE_ITEM(S5P_EINT_CON(1)),
	SAVE_ITEM(S5P_EINT_CON(2)),
	SAVE_ITEM(S5P_EINT_CON(3)),

	SAVE_ITEM(S5P_EINT_FLTCON(0)),
	SAVE_ITEM(S5P_EINT_FLTCON(1)),
	SAVE_ITEM(S5P_EINT_FLTCON(2)),
	SAVE_ITEM(S5P_EINT_FLTCON(3)),
	SAVE_ITEM(S5P_EINT_FLTCON(4)),
	SAVE_ITEM(S5P_EINT_FLTCON(5)),
	SAVE_ITEM(S5P_EINT_FLTCON(6)),
	SAVE_ITEM(S5P_EINT_FLTCON(7)),

	SAVE_ITEM(S5P_EINT_MASK(0)),
	SAVE_ITEM(S5P_EINT_MASK(1)),
	SAVE_ITEM(S5P_EINT_MASK(2)),
	SAVE_ITEM(S5P_EINT_MASK(3)),
};

int s3c24xx_irq_suspend(void)
{
	s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));

	return 0;
}

void s3c24xx_irq_resume(void)
{
	s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
}
Commit	Line	Data
8eadcf74	1	/*
ea31fd43 JL	2	* Copyright (c) 2010 Samsung Electronics Co., Ltd.
	3	* http://www.samsung.com
	4	*
	5	* Based on arch/arm/plat-s3c24xx/irq-pm.c,
	6	* Copyright (c) 2003,2004 Simtec Electronics
	7	* Ben Dooks <ben@simtec.co.uk>
	8	* http://armlinux.simtec.co.uk/
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/init.h>
	16	#include <linux/module.h>
	17	#include <linux/interrupt.h>
ea31fd43 JL	18
	19	#include <plat/cpu.h>
	20	#include <plat/irqs.h>
	21	#include <plat/pm.h>
	22	#include <mach/map.h>
	23
	24	#include <mach/regs-gpio.h>
05a6380c KK	25
05a6380c KK	26	#ifndef CONFIG_ARCH_EXYNOS
ea31fd43	27	#include <mach/regs-irq.h>
05a6380c	28	#endif
ea31fd43 JL	29
	30	/* state for IRQs over sleep */
	31
	32	/* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
	33	* as wakeup sources
	34	*
	35	* set bit to 1 in allow bitfield to enable the wakeup settings on it
	36	*/
	37
	38	unsigned long s3c_irqwake_intallow = 0x00000006L;
	39	unsigned long s3c_irqwake_eintallow = 0xffffffffL;
	40
bb0b2374	41	int s3c_irq_wake(struct irq_data *data, unsigned int state)
ea31fd43 JL	42	{
ea31fd43 JL	43	unsigned long irqbit;
bb19a751 KK	44	unsigned int irq_rtc_tic, irq_rtc_alarm;
	45
	46	#ifdef CONFIG_ARCH_EXYNOS
	47	if (soc_is_exynos5250()) {
	48	irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
	49	irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
	50	} else {
	51	irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
	52	irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
	53	}
	54	#else
	55	irq_rtc_tic = IRQ_RTC_TIC;
	56	irq_rtc_alarm = IRQ_RTC_ALARM;
	57	#endif
	58
	59	if (data->irq == irq_rtc_tic \|\| data->irq == irq_rtc_alarm) {
	60	irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
ea31fd43	61
ea31fd43 JL	62	if (!state)
	63	s3c_irqwake_intmask \|= irqbit;
	64	else
	65	s3c_irqwake_intmask &= ~irqbit;
bb19a751	66	} else {
ea31fd43 JL	67	return -ENOENT;
ea31fd43 JL	68	}
bb19a751	69
ea31fd43 JL	70	return 0;
	71	}
	72
	73	static struct sleep_save eint_save[] = {
	74	SAVE_ITEM(S5P_EINT_CON(0)),
	75	SAVE_ITEM(S5P_EINT_CON(1)),
	76	SAVE_ITEM(S5P_EINT_CON(2)),
	77	SAVE_ITEM(S5P_EINT_CON(3)),
	78
	79	SAVE_ITEM(S5P_EINT_FLTCON(0)),
	80	SAVE_ITEM(S5P_EINT_FLTCON(1)),
	81	SAVE_ITEM(S5P_EINT_FLTCON(2)),
	82	SAVE_ITEM(S5P_EINT_FLTCON(3)),
	83	SAVE_ITEM(S5P_EINT_FLTCON(4)),
	84	SAVE_ITEM(S5P_EINT_FLTCON(5)),
	85	SAVE_ITEM(S5P_EINT_FLTCON(6)),
	86	SAVE_ITEM(S5P_EINT_FLTCON(7)),
	87
	88	SAVE_ITEM(S5P_EINT_MASK(0)),
	89	SAVE_ITEM(S5P_EINT_MASK(1)),
	90	SAVE_ITEM(S5P_EINT_MASK(2)),
	91	SAVE_ITEM(S5P_EINT_MASK(3)),
	92	};
	93
bb072c3c	94	int s3c24xx_irq_suspend(void)
ea31fd43 JL	95	{
	96	s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));
	97
	98	return 0;
	99	}
	100
bb072c3c	101	void s3c24xx_irq_resume(void)
ea31fd43 JL	102	{
ea31fd43 JL	103	s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
ea31fd43 JL	104	}
ea31fd43 JL	105