[deliverable/linux.git] / arch / arm / plat-stmp3xxx / clock.h

/*
 * Clock control driver for Freescale STMP37XX/STMP378X - internal header file
 *
 * Author: Vitaly Wool <vital@embeddedalley.com>
 *
 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
 */

/*
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */
#ifndef __ARCH_ARM_STMX3XXX_CLOCK_H__
#define __ARCH_ARM_STMX3XXX_CLOCK_H__

#ifndef __ASSEMBLER__

struct clk_ops {
	int (*enable) (struct clk *);
	int (*disable) (struct clk *);
	long (*get_rate) (struct clk *);
	long (*round_rate) (struct clk *, u32);
	int (*set_rate) (struct clk *, u32);
	int (*set_parent) (struct clk *, struct clk *);
};

struct clk {
	struct clk *parent;
	u32 rate;
	u32 flags;
	u8 scale_shift;
	u8 enable_shift;
	u8 bypass_shift;
	u8 busy_bit;
	s8 usage;
	int enable_wait;
	int enable_negate;
	u32 saved_div;
	void __iomem *enable_reg;
	void __iomem *scale_reg;
	void __iomem *bypass_reg;
	void __iomem *busy_reg;
	struct clk_ops *ops;
};

#endif /* __ASSEMBLER__ */

/* Flags */
#define RATE_PROPAGATES      (1<<0)
#define NEEDS_INITIALIZATION (1<<1)
#define PARENT_SET_RATE      (1<<2)
#define FIXED_RATE           (1<<3)
#define ENABLED	             (1<<4)
#define NEEDS_SET_PARENT     (1<<5)

#endif
Commit	Line	Data
5cccd37e	1	/*
	2	* Clock control driver for Freescale STMP37XX/STMP378X - internal header file
	3	*
	4	* Author: Vitaly Wool <vital@embeddedalley.com>
	5	*
	6	* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
	7	* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
	8	*/
	9
	10	/*
	11	* The code contained herein is licensed under the GNU General Public
	12	* License. You may obtain a copy of the GNU General Public License
	13	* Version 2 or later at the following locations:
	14	*
	15	* http://www.opensource.org/licenses/gpl-license.html
	16	* http://www.gnu.org/copyleft/gpl.html
	17	*/
	18	#ifndef __ARCH_ARM_STMX3XXX_CLOCK_H__
	19	#define __ARCH_ARM_STMX3XXX_CLOCK_H__
	20
	21	#ifndef __ASSEMBLER__
	22
	23	struct clk_ops {
	24	int (enable) (struct clk );
	25	int (disable) (struct clk );
	26	long (get_rate) (struct clk );
	27	long (round_rate) (struct clk , u32);
	28	int (set_rate) (struct clk , u32);
	29	int (set_parent) (struct clk , struct clk *);
	30	};
	31
	32	struct clk {
	33	struct clk *parent;
	34	u32 rate;
	35	u32 flags;
	36	u8 scale_shift;
	37	u8 enable_shift;
	38	u8 bypass_shift;
	39	u8 busy_bit;
	40	s8 usage;
	41	int enable_wait;
	42	int enable_negate;
	43	u32 saved_div;
	44	void __iomem *enable_reg;
	45	void __iomem *scale_reg;
	46	void __iomem *bypass_reg;
	47	void __iomem *busy_reg;
	48	struct clk_ops *ops;
	49	};
	50
	51	#endif /* __ASSEMBLER__ */
	52
	53	/* Flags */
	54	#define RATE_PROPAGATES (1<<0)
	55	#define NEEDS_INITIALIZATION (1<<1)
	56	#define PARENT_SET_RATE (1<<2)
	57	#define FIXED_RATE (1<<3)
	58	#define ENABLED (1<<4)
	59	#define NEEDS_SET_PARENT (1<<5)
	60
	61	#endif