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78cd6a9d DN |
1 | /* |
2 | * Copyright Altera Corporation (C) 2015. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | /dts-v1/; | |
18 | ||
19 | / { | |
20 | compatible = "altr,socfpga-stratix10"; | |
21 | #address-cells = <2>; | |
22 | #size-cells = <2>; | |
23 | ||
24 | cpus { | |
25 | #address-cells = <1>; | |
26 | #size-cells = <0>; | |
27 | ||
28 | cpu0: cpu@0 { | |
29 | compatible = "arm,cortex-a53", "arm,armv8"; | |
30 | device_type = "cpu"; | |
31 | enable-method = "psci"; | |
32 | reg = <0x0>; | |
33 | }; | |
34 | ||
35 | cpu1: cpu@1 { | |
36 | compatible = "arm,cortex-a53", "arm,armv8"; | |
37 | device_type = "cpu"; | |
38 | enable-method = "psci"; | |
39 | reg = <0x1>; | |
40 | }; | |
41 | ||
42 | cpu2: cpu@2 { | |
43 | compatible = "arm,cortex-a53", "arm,armv8"; | |
44 | device_type = "cpu"; | |
45 | enable-method = "psci"; | |
46 | reg = <0x2>; | |
47 | }; | |
48 | ||
49 | cpu3: cpu@3 { | |
50 | compatible = "arm,cortex-a53", "arm,armv8"; | |
51 | device_type = "cpu"; | |
52 | enable-method = "psci"; | |
53 | reg = <0x3>; | |
54 | }; | |
55 | }; | |
56 | ||
57 | pmu { | |
58 | compatible = "arm,armv8-pmuv3"; | |
59 | interrupts = <0 120 8>, | |
60 | <0 121 8>, | |
61 | <0 122 8>, | |
62 | <0 123 8>; | |
63 | interrupt-affinity = <&cpu0>, | |
64 | <&cpu1>, | |
65 | <&cpu2>, | |
66 | <&cpu3>; | |
67 | }; | |
68 | ||
69 | psci { | |
70 | compatible = "arm,psci-0.2"; | |
71 | method = "smc"; | |
72 | }; | |
73 | ||
74 | intc: intc@fffc1000 { | |
75 | compatible = "arm,gic-400", "arm,cortex-a15-gic"; | |
76 | #interrupt-cells = <3>; | |
77 | interrupt-controller; | |
78 | reg = <0x0 0xfffc1000 0x1000>, | |
79 | <0x0 0xfffc2000 0x2000>, | |
80 | <0x0 0xfffc4000 0x2000>, | |
81 | <0x0 0xfffc6000 0x2000>; | |
82 | }; | |
83 | ||
84 | soc { | |
85 | #address-cells = <1>; | |
86 | #size-cells = <1>; | |
87 | compatible = "simple-bus"; | |
88 | device_type = "soc"; | |
89 | interrupt-parent = <&intc>; | |
90 | ranges = <0 0 0 0xffffffff>; | |
91 | ||
92 | clkmgr@ffd1000 { | |
93 | compatible = "altr,clk-mgr"; | |
94 | reg = <0xffd10000 0x1000>; | |
95 | }; | |
96 | ||
97 | gmac0: ethernet@ff800000 { | |
98 | compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; | |
99 | reg = <0xff800000 0x2000>; | |
100 | interrupts = <0 90 4>; | |
101 | interrupt-names = "macirq"; | |
102 | mac-address = [00 00 00 00 00 00]; | |
103 | status = "disabled"; | |
104 | }; | |
105 | ||
106 | gmac1: ethernet@ff802000 { | |
107 | compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; | |
108 | reg = <0xff802000 0x2000>; | |
109 | interrupts = <0 91 4>; | |
110 | interrupt-names = "macirq"; | |
111 | mac-address = [00 00 00 00 00 00]; | |
112 | status = "disabled"; | |
113 | }; | |
114 | ||
115 | gmac2: ethernet@ff804000 { | |
116 | compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", "snps,dwmac"; | |
117 | reg = <0xff804000 0x2000>; | |
118 | interrupts = <0 92 4>; | |
119 | interrupt-names = "macirq"; | |
120 | mac-address = [00 00 00 00 00 00]; | |
121 | status = "disabled"; | |
122 | }; | |
123 | ||
124 | gpio0: gpio@ffc03200 { | |
125 | #address-cells = <1>; | |
126 | #size-cells = <0>; | |
127 | compatible = "snps,dw-apb-gpio"; | |
128 | reg = <0xffc03200 0x100>; | |
129 | status = "disabled"; | |
130 | ||
131 | porta: gpio-controller@0 { | |
132 | compatible = "snps,dw-apb-gpio-port"; | |
133 | gpio-controller; | |
134 | #gpio-cells = <2>; | |
135 | snps,nr-gpios = <24>; | |
136 | reg = <0>; | |
137 | interrupt-controller; | |
138 | #interrupt-cells = <2>; | |
139 | interrupts = <0 110 4>; | |
140 | }; | |
141 | }; | |
142 | ||
143 | gpio1: gpio@ffc03300 { | |
144 | #address-cells = <1>; | |
145 | #size-cells = <0>; | |
146 | compatible = "snps,dw-apb-gpio"; | |
147 | reg = <0xffc03300 0x100>; | |
148 | status = "disabled"; | |
149 | ||
150 | portb: gpio-controller@0 { | |
151 | compatible = "snps,dw-apb-gpio-port"; | |
152 | gpio-controller; | |
153 | #gpio-cells = <2>; | |
154 | snps,nr-gpios = <24>; | |
155 | reg = <0>; | |
156 | interrupt-controller; | |
157 | #interrupt-cells = <2>; | |
158 | interrupts = <0 110 4>; | |
159 | }; | |
160 | }; | |
161 | ||
162 | i2c0: i2c@ffc02800 { | |
163 | #address-cells = <1>; | |
164 | #size-cells = <0>; | |
165 | compatible = "snps,designware-i2c"; | |
166 | reg = <0xffc02800 0x100>; | |
167 | interrupts = <0 103 4>; | |
168 | status = "disabled"; | |
169 | }; | |
170 | ||
171 | i2c1: i2c@ffc02900 { | |
172 | #address-cells = <1>; | |
173 | #size-cells = <0>; | |
174 | compatible = "snps,designware-i2c"; | |
175 | reg = <0xffc02900 0x100>; | |
176 | interrupts = <0 104 4>; | |
177 | status = "disabled"; | |
178 | }; | |
179 | ||
180 | i2c2: i2c@ffc02a00 { | |
181 | #address-cells = <1>; | |
182 | #size-cells = <0>; | |
183 | compatible = "snps,designware-i2c"; | |
184 | reg = <0xffc02a00 0x100>; | |
185 | interrupts = <0 105 4>; | |
186 | status = "disabled"; | |
187 | }; | |
188 | ||
189 | i2c3: i2c@ffc02b00 { | |
190 | #address-cells = <1>; | |
191 | #size-cells = <0>; | |
192 | compatible = "snps,designware-i2c"; | |
193 | reg = <0xffc02b00 0x100>; | |
194 | interrupts = <0 106 4>; | |
195 | status = "disabled"; | |
196 | }; | |
197 | ||
198 | i2c4: i2c@ffc02c00 { | |
199 | #address-cells = <1>; | |
200 | #size-cells = <0>; | |
201 | compatible = "snps,designware-i2c"; | |
202 | reg = <0xffc02c00 0x100>; | |
203 | interrupts = <0 107 4>; | |
204 | status = "disabled"; | |
205 | }; | |
206 | ||
207 | mmc: dwmmc0@ff808000 { | |
208 | #address-cells = <1>; | |
209 | #size-cells = <0>; | |
210 | compatible = "altr,socfpga-dw-mshc"; | |
211 | reg = <0xff808000 0x1000>; | |
212 | interrupts = <0 96 4>; | |
213 | fifo-depth = <0x400>; | |
214 | status = "disabled"; | |
215 | }; | |
216 | ||
217 | ocram: sram@ffe00000 { | |
218 | compatible = "mmio-sram"; | |
219 | reg = <0xffe00000 0x100000>; | |
220 | }; | |
221 | ||
222 | rst: rstmgr@ffd11000 { | |
223 | #reset-cells = <1>; | |
224 | compatible = "altr,rst-mgr"; | |
225 | reg = <0xffd11000 0x1000>; | |
226 | }; | |
227 | ||
228 | spi0: spi@ffda4000 { | |
229 | compatible = "snps,dw-apb-ssi"; | |
230 | #address-cells = <1>; | |
231 | #size-cells = <0>; | |
232 | reg = <0xffda4000 0x1000>; | |
233 | interrupts = <0 101 4>; | |
234 | num-chipselect = <4>; | |
235 | bus-num = <0>; | |
236 | status = "disabled"; | |
237 | }; | |
238 | ||
239 | spi1: spi@ffda5000 { | |
240 | compatible = "snps,dw-apb-ssi"; | |
241 | #address-cells = <1>; | |
242 | #size-cells = <0>; | |
243 | reg = <0xffda5000 0x1000>; | |
244 | interrupts = <0 102 4>; | |
245 | num-chipselect = <4>; | |
246 | bus-num = <0>; | |
247 | status = "disabled"; | |
248 | }; | |
249 | ||
250 | sysmgr: sysmgr@ffd12000 { | |
251 | compatible = "altr,sys-mgr", "syscon"; | |
252 | reg = <0xffd12000 0x1000>; | |
253 | }; | |
254 | ||
255 | /* Local timer */ | |
256 | timer { | |
257 | compatible = "arm,armv8-timer"; | |
258 | interrupts = <1 13 0xf01>, | |
259 | <1 14 0xf01>, | |
260 | <1 11 0xf01>, | |
261 | <1 10 0xf01>; | |
262 | }; | |
263 | ||
264 | timer0: timer0@ffc03000 { | |
265 | compatible = "snps,dw-apb-timer"; | |
266 | interrupts = <0 113 4>; | |
267 | reg = <0xffc03000 0x100>; | |
268 | }; | |
269 | ||
270 | timer1: timer1@ffc03100 { | |
271 | compatible = "snps,dw-apb-timer"; | |
272 | interrupts = <0 114 4>; | |
273 | reg = <0xffc03100 0x100>; | |
274 | }; | |
275 | ||
276 | timer2: timer2@ffd00000 { | |
277 | compatible = "snps,dw-apb-timer"; | |
278 | interrupts = <0 115 4>; | |
279 | reg = <0xffd00000 0x100>; | |
280 | }; | |
281 | ||
282 | timer3: timer3@ffd00100 { | |
283 | compatible = "snps,dw-apb-timer"; | |
284 | interrupts = <0 116 4>; | |
285 | reg = <0xffd00100 0x100>; | |
286 | }; | |
287 | ||
288 | uart0: serial0@ffc02000 { | |
289 | compatible = "snps,dw-apb-uart"; | |
290 | reg = <0xffc02000 0x100>; | |
291 | interrupts = <0 108 4>; | |
292 | reg-shift = <2>; | |
293 | reg-io-width = <4>; | |
294 | status = "disabled"; | |
295 | }; | |
296 | ||
297 | uart1: serial1@ffc02100 { | |
298 | compatible = "snps,dw-apb-uart"; | |
299 | reg = <0xffc02100 0x100>; | |
300 | interrupts = <0 109 4>; | |
301 | reg-shift = <2>; | |
302 | reg-io-width = <4>; | |
303 | status = "disabled"; | |
304 | }; | |
305 | ||
306 | usbphy0: usbphy@0 { | |
307 | #phy-cells = <0>; | |
308 | compatible = "usb-nop-xceiv"; | |
309 | status = "okay"; | |
310 | }; | |
311 | ||
312 | usb0: usb@ffb00000 { | |
313 | compatible = "snps,dwc2"; | |
314 | reg = <0xffb00000 0x40000>; | |
315 | interrupts = <0 93 4>; | |
316 | phys = <&usbphy0>; | |
317 | phy-names = "usb2-phy"; | |
318 | status = "disabled"; | |
319 | }; | |
320 | ||
321 | usb1: usb@ffb40000 { | |
322 | compatible = "snps,dwc2"; | |
323 | reg = <0xffb40000 0x40000>; | |
324 | interrupts = <0 94 4>; | |
325 | phys = <&usbphy0>; | |
326 | phy-names = "usb2-phy"; | |
327 | status = "disabled"; | |
328 | }; | |
329 | ||
330 | watchdog0: watchdog@ffd00200 { | |
331 | compatible = "snps,dw-wdt"; | |
332 | reg = <0xffd00200 0x100>; | |
333 | interrupts = <0 117 4>; | |
334 | status = "disabled"; | |
335 | }; | |
336 | ||
337 | watchdog1: watchdog@ffd00300 { | |
338 | compatible = "snps,dw-wdt"; | |
339 | reg = <0xffd00300 0x100>; | |
340 | interrupts = <0 118 4>; | |
341 | status = "disabled"; | |
342 | }; | |
343 | ||
344 | watchdog2: watchdog@ffd00400 { | |
345 | compatible = "snps,dw-wdt"; | |
346 | reg = <0xffd00400 0x100>; | |
347 | interrupts = <0 125 4>; | |
348 | status = "disabled"; | |
349 | }; | |
350 | ||
351 | watchdog3: watchdog@ffd00500 { | |
352 | compatible = "snps,dw-wdt"; | |
353 | reg = <0xffd00500 0x100>; | |
354 | interrupts = <0 126 4>; | |
355 | status = "disabled"; | |
356 | }; | |
357 | }; | |
358 | }; |