[deliverable/linux.git] / arch / arm64 / boot / dts / exynos / exynos7.dtsi

/*
 * SAMSUNG EXYNOS7 SoC device tree source
 *
 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <dt-bindings/clock/exynos7-clk.h>

/ {
	compatible = "samsung,exynos7";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		pinctrl0 = &pinctrl_alive;
		pinctrl1 = &pinctrl_bus0;
		pinctrl2 = &pinctrl_nfc;
		pinctrl3 = &pinctrl_touch;
		pinctrl4 = &pinctrl_ff;
		pinctrl5 = &pinctrl_ese;
		pinctrl6 = &pinctrl_fsys0;
		pinctrl7 = &pinctrl_fsys1;
		pinctrl8 = &pinctrl_bus1;
		tmuctrl0 = &tmuctrl_0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a57", "arm,armv8";
			reg = <0x0>;
			enable-method = "psci";
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a57", "arm,armv8";
			reg = <0x1>;
			enable-method = "psci";
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a57", "arm,armv8";
			reg = <0x2>;
			enable-method = "psci";
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a57", "arm,armv8";
			reg = <0x3>;
			enable-method = "psci";
		};
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0 0 0x18000000>;

		chipid@10000000 {
			compatible = "samsung,exynos4210-chipid";
			reg = <0x10000000 0x100>;
		};

		fin_pll: xxti {
			compatible = "fixed-clock";
			clock-output-names = "fin_pll";
			#clock-cells = <0>;
		};

		gic: interrupt-controller@11001000 {
			compatible = "arm,gic-400";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg =	<0x11001000 0x1000>,
				<0x11002000 0x1000>,
				<0x11004000 0x2000>,
				<0x11006000 0x2000>;
		};

		clock_topc: clock-controller@10570000 {
			compatible = "samsung,exynos7-clock-topc";
			reg = <0x10570000 0x10000>;
			#clock-cells = <1>;
		};

		clock_top0: clock-controller@105d0000 {
			compatible = "samsung,exynos7-clock-top0";
			reg = <0x105d0000 0xb000>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
				 <&clock_topc DOUT_SCLK_BUS1_PLL>,
				 <&clock_topc DOUT_SCLK_CC_PLL>,
				 <&clock_topc DOUT_SCLK_MFC_PLL>;
			clock-names = "fin_pll", "dout_sclk_bus0_pll",
				      "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
				      "dout_sclk_mfc_pll";
		};

		clock_top1: clock-controller@105e0000 {
			compatible = "samsung,exynos7-clock-top1";
			reg = <0x105e0000 0xb000>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
				 <&clock_topc DOUT_SCLK_BUS1_PLL>,
				 <&clock_topc DOUT_SCLK_CC_PLL>,
				 <&clock_topc DOUT_SCLK_MFC_PLL>;
			clock-names = "fin_pll", "dout_sclk_bus0_pll",
				      "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
				      "dout_sclk_mfc_pll";
		};

		clock_ccore: clock-controller@105b0000 {
			compatible = "samsung,exynos7-clock-ccore";
			reg = <0x105b0000 0xd00>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_CCORE_133>;
			clock-names = "fin_pll", "dout_aclk_ccore_133";
		};

		clock_peric0: clock-controller@13610000 {
			compatible = "samsung,exynos7-clock-peric0";
			reg = <0x13610000 0xd00>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC0>,
				 <&clock_top0 CLK_SCLK_UART0>;
			clock-names = "fin_pll", "dout_aclk_peric0_66",
				      "sclk_uart0";
		};

		clock_peric1: clock-controller@14c80000 {
			compatible = "samsung,exynos7-clock-peric1";
			reg = <0x14c80000 0xd00>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>,
				 <&clock_top0 CLK_SCLK_UART1>,
				 <&clock_top0 CLK_SCLK_UART2>,
				 <&clock_top0 CLK_SCLK_UART3>;
			clock-names = "fin_pll", "dout_aclk_peric1_66",
				      "sclk_uart1", "sclk_uart2", "sclk_uart3";
		};

		clock_peris: clock-controller@10040000 {
			compatible = "samsung,exynos7-clock-peris";
			reg = <0x10040000 0xd00>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_PERIS>;
			clock-names = "fin_pll", "dout_aclk_peris_66";
		};

		clock_fsys0: clock-controller@10e90000 {
			compatible = "samsung,exynos7-clock-fsys0";
			reg = <0x10e90000 0xd00>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS0_200>,
				 <&clock_top1 DOUT_SCLK_MMC2>;
			clock-names = "fin_pll", "dout_aclk_fsys0_200",
				      "dout_sclk_mmc2";
		};

		clock_fsys1: clock-controller@156e0000 {
			compatible = "samsung,exynos7-clock-fsys1";
			reg = <0x156e0000 0xd00>;
			#clock-cells = <1>;
			clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>,
				 <&clock_top1 DOUT_SCLK_MMC0>,
				 <&clock_top1 DOUT_SCLK_MMC1>;
			clock-names = "fin_pll", "dout_aclk_fsys1_200",
				      "dout_sclk_mmc0", "dout_sclk_mmc1";
		};

		serial_0: serial@13630000 {
			compatible = "samsung,exynos4210-uart";
			reg = <0x13630000 0x100>;
			interrupts = <0 440 0>;
			clocks = <&clock_peric0 PCLK_UART0>,
				 <&clock_peric0 SCLK_UART0>;
			clock-names = "uart", "clk_uart_baud0";
			status = "disabled";
		};

		serial_1: serial@14c20000 {
			compatible = "samsung,exynos4210-uart";
			reg = <0x14c20000 0x100>;
			interrupts = <0 456 0>;
			clocks = <&clock_peric1 PCLK_UART1>,
				 <&clock_peric1 SCLK_UART1>;
			clock-names = "uart", "clk_uart_baud0";
			status = "disabled";
		};

		serial_2: serial@14c30000 {
			compatible = "samsung,exynos4210-uart";
			reg = <0x14c30000 0x100>;
			interrupts = <0 457 0>;
			clocks = <&clock_peric1 PCLK_UART2>,
				 <&clock_peric1 SCLK_UART2>;
			clock-names = "uart", "clk_uart_baud0";
			status = "disabled";
		};

		serial_3: serial@14c40000 {
			compatible = "samsung,exynos4210-uart";
			reg = <0x14c40000 0x100>;
			interrupts = <0 458 0>;
			clocks = <&clock_peric1 PCLK_UART3>,
				 <&clock_peric1 SCLK_UART3>;
			clock-names = "uart", "clk_uart_baud0";
			status = "disabled";
		};

		pinctrl_alive: pinctrl@10580000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x10580000 0x1000>;

			wakeup-interrupt-controller {
				compatible = "samsung,exynos7-wakeup-eint";
				interrupt-parent = <&gic>;
				interrupts = <0 16 0>;
			};
		};

		pinctrl_bus0: pinctrl@13470000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x13470000 0x1000>;
			interrupts = <0 383 0>;
		};

		pinctrl_nfc: pinctrl@14cd0000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x14cd0000 0x1000>;
			interrupts = <0 473 0>;
		};

		pinctrl_touch: pinctrl@14ce0000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x14ce0000 0x1000>;
			interrupts = <0 474 0>;
		};

		pinctrl_ff: pinctrl@14c90000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x14c90000 0x1000>;
			interrupts = <0 475 0>;
		};

		pinctrl_ese: pinctrl@14ca0000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x14ca0000 0x1000>;
			interrupts = <0 476 0>;
		};

		pinctrl_fsys0: pinctrl@10e60000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x10e60000 0x1000>;
			interrupts = <0 221 0>;
		};

		pinctrl_fsys1: pinctrl@15690000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x15690000 0x1000>;
			interrupts = <0 203 0>;
		};

		pinctrl_bus1: pinctrl@14870000 {
			compatible = "samsung,exynos7-pinctrl";
			reg = <0x14870000 0x1000>;
			interrupts = <0 384 0>;
		};

		hsi2c_0: hsi2c@13640000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13640000 0x1000>;
			interrupts = <0 441 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c0_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C0>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_1: hsi2c@13650000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13650000 0x1000>;
			interrupts = <0 442 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c1_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C1>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_2: hsi2c@14e60000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x14e60000 0x1000>;
			interrupts = <0 459 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c2_bus>;
			clocks = <&clock_peric1 PCLK_HSI2C2>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_3: hsi2c@14e70000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x14e70000 0x1000>;
			interrupts = <0 460 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c3_bus>;
			clocks = <&clock_peric1 PCLK_HSI2C3>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_4: hsi2c@13660000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13660000 0x1000>;
			interrupts = <0 443 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c4_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C4>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_5: hsi2c@13670000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13670000 0x1000>;
			interrupts = <0 444 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c5_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C5>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_6: hsi2c@14e00000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x14e00000 0x1000>;
			interrupts = <0 461 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c6_bus>;
			clocks = <&clock_peric1 PCLK_HSI2C6>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_7: hsi2c@13e10000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13e10000 0x1000>;
			interrupts = <0 462 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c7_bus>;
			clocks = <&clock_peric1 PCLK_HSI2C7>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_8: hsi2c@14e20000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x14e20000 0x1000>;
			interrupts = <0 463 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c8_bus>;
			clocks = <&clock_peric1 PCLK_HSI2C8>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_9: hsi2c@13680000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13680000 0x1000>;
			interrupts = <0 445 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c9_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C9>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_10: hsi2c@13690000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x13690000 0x1000>;
			interrupts = <0 446 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c10_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C10>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		hsi2c_11: hsi2c@136a0000 {
			compatible = "samsung,exynos7-hsi2c";
			reg = <0x136a0000 0x1000>;
			interrupts = <0 447 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			pinctrl-names = "default";
			pinctrl-0 = <&hs_i2c11_bus>;
			clocks = <&clock_peric0 PCLK_HSI2C11>;
			clock-names = "hsi2c";
			status = "disabled";
		};

		timer {
			compatible = "arm,armv8-timer";
			interrupts = <1 13 0xff01>,
				     <1 14 0xff01>,
				     <1 11 0xff01>,
				     <1 10 0xff01>;
		};

		pmu_system_controller: system-controller@105c0000 {
			compatible = "samsung,exynos7-pmu", "syscon";
			reg = <0x105c0000 0x5000>;
		};

		reboot: syscon-reboot {
			compatible = "syscon-reboot";
			regmap = <&pmu_system_controller>;
			offset = <0x0400>;
			mask = <0x1>;
		};

		rtc: rtc@10590000 {
			compatible = "samsung,s3c6410-rtc";
			reg = <0x10590000 0x100>;
			interrupts = <0 355 0>, <0 356 0>;
			clocks = <&clock_ccore PCLK_RTC>;
			clock-names = "rtc";
			status = "disabled";
		};

		watchdog: watchdog@101d0000 {
			compatible = "samsung,exynos7-wdt";
			reg = <0x101d0000 0x100>;
			interrupts = <0 110 0>;
			clocks = <&clock_peris PCLK_WDT>;
			clock-names = "watchdog";
			samsung,syscon-phandle = <&pmu_system_controller>;
			status = "disabled";
		};

		mmc_0: mmc@15740000 {
			compatible = "samsung,exynos7-dw-mshc-smu";
			interrupts = <0 201 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x15740000 0x2000>;
			clocks = <&clock_fsys1 ACLK_MMC0>,
				 <&clock_top1 CLK_SCLK_MMC0>;
			clock-names = "biu", "ciu";
			fifo-depth = <0x40>;
			status = "disabled";
		};

		mmc_1: mmc@15750000 {
			compatible = "samsung,exynos7-dw-mshc";
			interrupts = <0 202 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x15750000 0x2000>;
			clocks = <&clock_fsys1 ACLK_MMC1>,
				 <&clock_top1 CLK_SCLK_MMC1>;
			clock-names = "biu", "ciu";
			fifo-depth = <0x40>;
			status = "disabled";
		};

		mmc_2: mmc@15560000 {
			compatible = "samsung,exynos7-dw-mshc-smu";
			interrupts = <0 216 0>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x15560000 0x2000>;
			clocks = <&clock_fsys0 ACLK_MMC2>,
				 <&clock_top1 CLK_SCLK_MMC2>;
			clock-names = "biu", "ciu";
			fifo-depth = <0x40>;
			status = "disabled";
		};

		adc: adc@13620000 {
			compatible = "samsung,exynos7-adc";
			reg = <0x13620000 0x100>;
			interrupts = <0 448 0>;
			clocks = <&clock_peric0 PCLK_ADCIF>;
			clock-names = "adc";
			#io-channel-cells = <1>;
			io-channel-ranges;
			status = "disabled";
		};

		pwm: pwm@136c0000 {
			compatible = "samsung,exynos4210-pwm";
			reg = <0x136c0000 0x100>;
			samsung,pwm-outputs = <0>, <1>, <2>, <3>;
			#pwm-cells = <3>;
			clocks = <&clock_peric0 PCLK_PWM>;
			clock-names = "timers";
		};

		tmuctrl_0: tmu@10060000 {
			compatible = "samsung,exynos7-tmu";
			reg = <0x10060000 0x200>;
			interrupts = <0 108 0>;
			clocks = <&clock_peris PCLK_TMU>,
				 <&clock_peris SCLK_TMU>;
			clock-names = "tmu_apbif", "tmu_sclk";
			#include "exynos7-tmu-sensor-conf.dtsi"
		};

		thermal-zones {
			atlas_thermal: cluster0-thermal {
				polling-delay-passive = <0>; /* milliseconds */
				polling-delay = <0>; /* milliseconds */
				thermal-sensors = <&tmuctrl_0>;
				#include "exynos7-trip-points.dtsi"
			};
		};
	};
};

#include "exynos7-pinctrl.dtsi"
Commit	Line	Data
b9024cbc NKC	1	/*
	2	* SAMSUNG EXYNOS7 SoC device tree source
	3	*
	4	* Copyright (c) 2014 Samsung Electronics Co., Ltd.
	5	* http://www.samsung.com
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <dt-bindings/clock/exynos7-clk.h>
	13
	14	/ {
	15	compatible = "samsung,exynos7";
	16	interrupt-parent = <&gic>;
	17	#address-cells = <2>;
	18	#size-cells = <2>;
	19
f17a618b NKC	20	aliases {
	21	pinctrl0 = &pinctrl_alive;
	22	pinctrl1 = &pinctrl_bus0;
	23	pinctrl2 = &pinctrl_nfc;
	24	pinctrl3 = &pinctrl_touch;
	25	pinctrl4 = &pinctrl_ff;
	26	pinctrl5 = &pinctrl_ese;
	27	pinctrl6 = &pinctrl_fsys0;
	28	pinctrl7 = &pinctrl_fsys1;
c60ce7fe	29	pinctrl8 = &pinctrl_bus1;
fbfcf4bf	30	tmuctrl0 = &tmuctrl_0;
f17a618b NKC	31	};
f17a618b NKC	32
b9024cbc NKC	33	cpus {
	34	#address-cells = <1>;
	35	#size-cells = <0>;
	36
	37	cpu@0 {
	38	device_type = "cpu";
	39	compatible = "arm,cortex-a57", "arm,armv8";
	40	reg = <0x0>;
	41	enable-method = "psci";
	42	};
	43
	44	cpu@1 {
	45	device_type = "cpu";
	46	compatible = "arm,cortex-a57", "arm,armv8";
	47	reg = <0x1>;
	48	enable-method = "psci";
	49	};
	50
	51	cpu@2 {
	52	device_type = "cpu";
	53	compatible = "arm,cortex-a57", "arm,armv8";
	54	reg = <0x2>;
	55	enable-method = "psci";
	56	};
	57
	58	cpu@3 {
	59	device_type = "cpu";
	60	compatible = "arm,cortex-a57", "arm,armv8";
	61	reg = <0x3>;
	62	enable-method = "psci";
	63	};
	64	};
	65
	66	psci {
	67	compatible = "arm,psci-0.2";
	68	method = "smc";
	69	};
	70
	71	soc: soc {
	72	compatible = "simple-bus";
	73	#address-cells = <1>;
	74	#size-cells = <1>;
	75	ranges = <0 0 0 0x18000000>;
	76
	77	chipid@10000000 {
	78	compatible = "samsung,exynos4210-chipid";
	79	reg = <0x10000000 0x100>;
	80	};
	81
	82	fin_pll: xxti {
	83	compatible = "fixed-clock";
	84	clock-output-names = "fin_pll";
	85	#clock-cells = <0>;
	86	};
	87
	88	gic: interrupt-controller@11001000 {
	89	compatible = "arm,gic-400";
	90	#interrupt-cells = <3>;
	91	#address-cells = <0>;
	92	interrupt-controller;
	93	reg = <0x11001000 0x1000>,
	94	<0x11002000 0x1000>,
	95	<0x11004000 0x2000>,
	96	<0x11006000 0x2000>;
97	};
98
99	clock_topc: clock-controller@10570000 {
100	compatible = "samsung,exynos7-clock-topc";
101	reg = <0x10570000 0x10000>;
102	#clock-cells = <1>;
103	};
104
105	clock_top0: clock-controller@105d0000 {
106	compatible = "samsung,exynos7-clock-top0";
107	reg = <0x105d0000 0xb000>;
108	#clock-cells = <1>;
109	clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
110	<&clock_topc DOUT_SCLK_BUS1_PLL>,
111	<&clock_topc DOUT_SCLK_CC_PLL>,
112	<&clock_topc DOUT_SCLK_MFC_PLL>;
113	clock-names = "fin_pll", "dout_sclk_bus0_pll",
114	"dout_sclk_bus1_pll", "dout_sclk_cc_pll",
115	"dout_sclk_mfc_pll";
116	};
117
6de6f73c AK	118	clock_top1: clock-controller@105e0000 {
	119	compatible = "samsung,exynos7-clock-top1";
	120	reg = <0x105e0000 0xb000>;
	121	#clock-cells = <1>;
	122	clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
	123	<&clock_topc DOUT_SCLK_BUS1_PLL>,
	124	<&clock_topc DOUT_SCLK_CC_PLL>,
	125	<&clock_topc DOUT_SCLK_MFC_PLL>;
	126	clock-names = "fin_pll", "dout_sclk_bus0_pll",
	127	"dout_sclk_bus1_pll", "dout_sclk_cc_pll",
	128	"dout_sclk_mfc_pll";
	129	};
	130
	131	clock_ccore: clock-controller@105b0000 {
	132	compatible = "samsung,exynos7-clock-ccore";
	133	reg = <0x105b0000 0xd00>;
	134	#clock-cells = <1>;
	135	clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_CCORE_133>;
	136	clock-names = "fin_pll", "dout_aclk_ccore_133";
	137	};
	138
b9024cbc NKC	139	clock_peric0: clock-controller@13610000 {
	140	compatible = "samsung,exynos7-clock-peric0";
	141	reg = <0x13610000 0xd00>;
	142	#clock-cells = <1>;
	143	clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC0>,
	144	<&clock_top0 CLK_SCLK_UART0>;
	145	clock-names = "fin_pll", "dout_aclk_peric0_66",
	146	"sclk_uart0";
	147	};
	148
	149	clock_peric1: clock-controller@14c80000 {
	150	compatible = "samsung,exynos7-clock-peric1";
	151	reg = <0x14c80000 0xd00>;
	152	#clock-cells = <1>;
	153	clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>,
	154	<&clock_top0 CLK_SCLK_UART1>,
	155	<&clock_top0 CLK_SCLK_UART2>,
	156	<&clock_top0 CLK_SCLK_UART3>;
	157	clock-names = "fin_pll", "dout_aclk_peric1_66",
	158	"sclk_uart1", "sclk_uart2", "sclk_uart3";
	159	};
	160
	161	clock_peris: clock-controller@10040000 {
	162	compatible = "samsung,exynos7-clock-peris";
	163	reg = <0x10040000 0xd00>;
	164	#clock-cells = <1>;
	165	clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_PERIS>;
	166	clock-names = "fin_pll", "dout_aclk_peris_66";
	167	};
	168
6de6f73c AK	169	clock_fsys0: clock-controller@10e90000 {
	170	compatible = "samsung,exynos7-clock-fsys0";
	171	reg = <0x10e90000 0xd00>;
	172	#clock-cells = <1>;
	173	clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS0_200>,
	174	<&clock_top1 DOUT_SCLK_MMC2>;
	175	clock-names = "fin_pll", "dout_aclk_fsys0_200",
	176	"dout_sclk_mmc2";
	177	};
	178
	179	clock_fsys1: clock-controller@156e0000 {
	180	compatible = "samsung,exynos7-clock-fsys1";
	181	reg = <0x156e0000 0xd00>;
	182	#clock-cells = <1>;
	183	clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>,
	184	<&clock_top1 DOUT_SCLK_MMC0>,
	185	<&clock_top1 DOUT_SCLK_MMC1>;
	186	clock-names = "fin_pll", "dout_aclk_fsys1_200",
	187	"dout_sclk_mmc0", "dout_sclk_mmc1";
	188	};
	189
b9024cbc NKC	190	serial_0: serial@13630000 {
	191	compatible = "samsung,exynos4210-uart";
	192	reg = <0x13630000 0x100>;
	193	interrupts = <0 440 0>;
	194	clocks = <&clock_peric0 PCLK_UART0>,
	195	<&clock_peric0 SCLK_UART0>;
	196	clock-names = "uart", "clk_uart_baud0";
	197	status = "disabled";
	198	};
	199
	200	serial_1: serial@14c20000 {
	201	compatible = "samsung,exynos4210-uart";
	202	reg = <0x14c20000 0x100>;
	203	interrupts = <0 456 0>;
	204	clocks = <&clock_peric1 PCLK_UART1>,
	205	<&clock_peric1 SCLK_UART1>;
	206	clock-names = "uart", "clk_uart_baud0";
	207	status = "disabled";
	208	};
	209
	210	serial_2: serial@14c30000 {
	211	compatible = "samsung,exynos4210-uart";
	212	reg = <0x14c30000 0x100>;
	213	interrupts = <0 457 0>;
	214	clocks = <&clock_peric1 PCLK_UART2>,
	215	<&clock_peric1 SCLK_UART2>;
	216	clock-names = "uart", "clk_uart_baud0";
	217	status = "disabled";
	218	};
	219
	220	serial_3: serial@14c40000 {
	221	compatible = "samsung,exynos4210-uart";
	222	reg = <0x14c40000 0x100>;
	223	interrupts = <0 458 0>;
	224	clocks = <&clock_peric1 PCLK_UART3>,
	225	<&clock_peric1 SCLK_UART3>;
	226	clock-names = "uart", "clk_uart_baud0";
	227	status = "disabled";
	228	};
	229
f17a618b NKC	230	pinctrl_alive: pinctrl@10580000 {
	231	compatible = "samsung,exynos7-pinctrl";
	232	reg = <0x10580000 0x1000>;
	233
	234	wakeup-interrupt-controller {
	235	compatible = "samsung,exynos7-wakeup-eint";
	236	interrupt-parent = <&gic>;
	237	interrupts = <0 16 0>;
	238	};
	239	};
	240
	241	pinctrl_bus0: pinctrl@13470000 {
	242	compatible = "samsung,exynos7-pinctrl";
	243	reg = <0x13470000 0x1000>;
	244	interrupts = <0 383 0>;
	245	};
	246
	247	pinctrl_nfc: pinctrl@14cd0000 {
	248	compatible = "samsung,exynos7-pinctrl";
	249	reg = <0x14cd0000 0x1000>;
	250	interrupts = <0 473 0>;
	251	};
	252
	253	pinctrl_touch: pinctrl@14ce0000 {
	254	compatible = "samsung,exynos7-pinctrl";
	255	reg = <0x14ce0000 0x1000>;
	256	interrupts = <0 474 0>;
	257	};
	258
	259	pinctrl_ff: pinctrl@14c90000 {
	260	compatible = "samsung,exynos7-pinctrl";
	261	reg = <0x14c90000 0x1000>;
	262	interrupts = <0 475 0>;
	263	};
	264
	265	pinctrl_ese: pinctrl@14ca0000 {
	266	compatible = "samsung,exynos7-pinctrl";
	267	reg = <0x14ca0000 0x1000>;
	268	interrupts = <0 476 0>;
	269	};
	270
	271	pinctrl_fsys0: pinctrl@10e60000 {
	272	compatible = "samsung,exynos7-pinctrl";
	273	reg = <0x10e60000 0x1000>;
	274	interrupts = <0 221 0>;
	275	};
	276
	277	pinctrl_fsys1: pinctrl@15690000 {
	278	compatible = "samsung,exynos7-pinctrl";
	279	reg = <0x15690000 0x1000>;
	280	interrupts = <0 203 0>;
	281	};
	282
c60ce7fe AA	283	pinctrl_bus1: pinctrl@14870000 {
	284	compatible = "samsung,exynos7-pinctrl";
	285	reg = <0x14870000 0x1000>;
	286	interrupts = <0 384 0>;
	287	};
	288
6de6f73c AK	289	hsi2c_0: hsi2c@13640000 {
	290	compatible = "samsung,exynos7-hsi2c";
	291	reg = <0x13640000 0x1000>;
	292	interrupts = <0 441 0>;
	293	#address-cells = <1>;
	294	#size-cells = <0>;
	295	pinctrl-names = "default";
	296	pinctrl-0 = <&hs_i2c0_bus>;
	297	clocks = <&clock_peric0 PCLK_HSI2C0>;
	298	clock-names = "hsi2c";
	299	status = "disabled";
	300	};
	301
	302	hsi2c_1: hsi2c@13650000 {
	303	compatible = "samsung,exynos7-hsi2c";
	304	reg = <0x13650000 0x1000>;
	305	interrupts = <0 442 0>;
	306	#address-cells = <1>;
	307	#size-cells = <0>;
	308	pinctrl-names = "default";
	309	pinctrl-0 = <&hs_i2c1_bus>;
	310	clocks = <&clock_peric0 PCLK_HSI2C1>;
	311	clock-names = "hsi2c";
	312	status = "disabled";
	313	};
	314
	315	hsi2c_2: hsi2c@14e60000 {
	316	compatible = "samsung,exynos7-hsi2c";
	317	reg = <0x14e60000 0x1000>;
	318	interrupts = <0 459 0>;
	319	#address-cells = <1>;
	320	#size-cells = <0>;
	321	pinctrl-names = "default";
	322	pinctrl-0 = <&hs_i2c2_bus>;
	323	clocks = <&clock_peric1 PCLK_HSI2C2>;
	324	clock-names = "hsi2c";
	325	status = "disabled";
	326	};
	327
	328	hsi2c_3: hsi2c@14e70000 {
	329	compatible = "samsung,exynos7-hsi2c";
	330	reg = <0x14e70000 0x1000>;
	331	interrupts = <0 460 0>;
	332	#address-cells = <1>;
	333	#size-cells = <0>;
	334	pinctrl-names = "default";
	335	pinctrl-0 = <&hs_i2c3_bus>;
	336	clocks = <&clock_peric1 PCLK_HSI2C3>;
	337	clock-names = "hsi2c";
	338	status = "disabled";
	339	};
	340
	341	hsi2c_4: hsi2c@13660000 {
	342	compatible = "samsung,exynos7-hsi2c";
	343	reg = <0x13660000 0x1000>;
	344	interrupts = <0 443 0>;
	345	#address-cells = <1>;
	346	#size-cells = <0>;
	347	pinctrl-names = "default";
	348	pinctrl-0 = <&hs_i2c4_bus>;
	349	clocks = <&clock_peric0 PCLK_HSI2C4>;
	350	clock-names = "hsi2c";
	351	status = "disabled";
	352	};
353
354	hsi2c_5: hsi2c@13670000 {
355	compatible = "samsung,exynos7-hsi2c";
356	reg = <0x13670000 0x1000>;
357	interrupts = <0 444 0>;
358	#address-cells = <1>;
359	#size-cells = <0>;
360	pinctrl-names = "default";
361	pinctrl-0 = <&hs_i2c5_bus>;
362	clocks = <&clock_peric0 PCLK_HSI2C5>;
363	clock-names = "hsi2c";
364	status = "disabled";
365	};
366
367	hsi2c_6: hsi2c@14e00000 {
368	compatible = "samsung,exynos7-hsi2c";
369	reg = <0x14e00000 0x1000>;
370	interrupts = <0 461 0>;
371	#address-cells = <1>;
372	#size-cells = <0>;
373	pinctrl-names = "default";
374	pinctrl-0 = <&hs_i2c6_bus>;
375	clocks = <&clock_peric1 PCLK_HSI2C6>;
376	clock-names = "hsi2c";
377	status = "disabled";
378	};
379
380	hsi2c_7: hsi2c@13e10000 {
381	compatible = "samsung,exynos7-hsi2c";
382	reg = <0x13e10000 0x1000>;
383	interrupts = <0 462 0>;
384	#address-cells = <1>;
385	#size-cells = <0>;
386	pinctrl-names = "default";
387	pinctrl-0 = <&hs_i2c7_bus>;
388	clocks = <&clock_peric1 PCLK_HSI2C7>;
389	clock-names = "hsi2c";
390	status = "disabled";
391	};
392
393	hsi2c_8: hsi2c@14e20000 {
394	compatible = "samsung,exynos7-hsi2c";
395	reg = <0x14e20000 0x1000>;
396	interrupts = <0 463 0>;
397	#address-cells = <1>;
398	#size-cells = <0>;
399	pinctrl-names = "default";
400	pinctrl-0 = <&hs_i2c8_bus>;
401	clocks = <&clock_peric1 PCLK_HSI2C8>;
402	clock-names = "hsi2c";
403	status = "disabled";
404	};
405
406	hsi2c_9: hsi2c@13680000 {
407	compatible = "samsung,exynos7-hsi2c";
408	reg = <0x13680000 0x1000>;
409	interrupts = <0 445 0>;
410	#address-cells = <1>;
411	#size-cells = <0>;
412	pinctrl-names = "default";
413	pinctrl-0 = <&hs_i2c9_bus>;
414	clocks = <&clock_peric0 PCLK_HSI2C9>;
415	clock-names = "hsi2c";
416	status = "disabled";
417	};
418
419	hsi2c_10: hsi2c@13690000 {
420	compatible = "samsung,exynos7-hsi2c";
421	reg = <0x13690000 0x1000>;
422	interrupts = <0 446 0>;
423	#address-cells = <1>;
424	#size-cells = <0>;
425	pinctrl-names = "default";
426	pinctrl-0 = <&hs_i2c10_bus>;
427	clocks = <&clock_peric0 PCLK_HSI2C10>;
428	clock-names = "hsi2c";
429	status = "disabled";
430	};
431
432	hsi2c_11: hsi2c@136a0000 {
433	compatible = "samsung,exynos7-hsi2c";
434	reg = <0x136a0000 0x1000>;
435	interrupts = <0 447 0>;
436	#address-cells = <1>;
437	#size-cells = <0>;
438	pinctrl-names = "default";
439	pinctrl-0 = <&hs_i2c11_bus>;
440	clocks = <&clock_peric0 PCLK_HSI2C11>;
441	clock-names = "hsi2c";
442	status = "disabled";
443	};
444
b9024cbc NKC	445	timer {
	446	compatible = "arm,armv8-timer";
	447	interrupts = <1 13 0xff01>,
	448	<1 14 0xff01>,
	449	<1 11 0xff01>,
	450	<1 10 0xff01>;
	451	};
0a7d1d80 AK	452
	453	pmu_system_controller: system-controller@105c0000 {
	454	compatible = "samsung,exynos7-pmu", "syscon";
	455	reg = <0x105c0000 0x5000>;
	456	};
6de6f73c	457
fb026cb6 AA	458	reboot: syscon-reboot {
	459	compatible = "syscon-reboot";
	460	regmap = <&pmu_system_controller>;
	461	offset = <0x0400>;
	462	mask = <0x1>;
	463	};
	464
6de6f73c AK	465	rtc: rtc@10590000 {
	466	compatible = "samsung,s3c6410-rtc";
	467	reg = <0x10590000 0x100>;
	468	interrupts = <0 355 0>, <0 356 0>;
	469	clocks = <&clock_ccore PCLK_RTC>;
	470	clock-names = "rtc";
	471	status = "disabled";
	472	};
	473
	474	watchdog: watchdog@101d0000 {
	475	compatible = "samsung,exynos7-wdt";
	476	reg = <0x101d0000 0x100>;
	477	interrupts = <0 110 0>;
	478	clocks = <&clock_peris PCLK_WDT>;
	479	clock-names = "watchdog";
	480	samsung,syscon-phandle = <&pmu_system_controller>;
	481	status = "disabled";
	482	};
	483
	484	mmc_0: mmc@15740000 {
	485	compatible = "samsung,exynos7-dw-mshc-smu";
	486	interrupts = <0 201 0>;
	487	#address-cells = <1>;
	488	#size-cells = <0>;
	489	reg = <0x15740000 0x2000>;
	490	clocks = <&clock_fsys1 ACLK_MMC0>,
	491	<&clock_top1 CLK_SCLK_MMC0>;
	492	clock-names = "biu", "ciu";
	493	fifo-depth = <0x40>;
	494	status = "disabled";
	495	};
	496
	497	mmc_1: mmc@15750000 {
	498	compatible = "samsung,exynos7-dw-mshc";
	499	interrupts = <0 202 0>;
	500	#address-cells = <1>;
	501	#size-cells = <0>;
	502	reg = <0x15750000 0x2000>;
	503	clocks = <&clock_fsys1 ACLK_MMC1>,
	504	<&clock_top1 CLK_SCLK_MMC1>;
	505	clock-names = "biu", "ciu";
	506	fifo-depth = <0x40>;
	507	status = "disabled";
	508	};
	509
	510	mmc_2: mmc@15560000 {
	511	compatible = "samsung,exynos7-dw-mshc-smu";
	512	interrupts = <0 216 0>;
	513	#address-cells = <1>;
	514	#size-cells = <0>;
	515	reg = <0x15560000 0x2000>;
	516	clocks = <&clock_fsys0 ACLK_MMC2>,
	517	<&clock_top1 CLK_SCLK_MMC2>;
	518	clock-names = "biu", "ciu";
	519	fifo-depth = <0x40>;
	520	status = "disabled";
	521	};
	522
	523	adc: adc@13620000 {
	524	compatible = "samsung,exynos7-adc";
	525	reg = <0x13620000 0x100>;
	526	interrupts = <0 448 0>;
	527	clocks = <&clock_peric0 PCLK_ADCIF>;
	528	clock-names = "adc";
529	#io-channel-cells = <1>;
530	io-channel-ranges;
531	status = "disabled";
532	};
533
534	pwm: pwm@136c0000 {
535	compatible = "samsung,exynos4210-pwm";
536	reg = <0x136c0000 0x100>;
537	samsung,pwm-outputs = <0>, <1>, <2>, <3>;
538	#pwm-cells = <3>;
539	clocks = <&clock_peric0 PCLK_PWM>;
540	clock-names = "timers";
541	};
fbfcf4bf AA	542
	543	tmuctrl_0: tmu@10060000 {
	544	compatible = "samsung,exynos7-tmu";
	545	reg = <0x10060000 0x200>;
	546	interrupts = <0 108 0>;
	547	clocks = <&clock_peris PCLK_TMU>,
	548	<&clock_peris SCLK_TMU>;
	549	clock-names = "tmu_apbif", "tmu_sclk";
	550	#include "exynos7-tmu-sensor-conf.dtsi"
	551	};
	552
	553	thermal-zones {
	554	atlas_thermal: cluster0-thermal {
	555	polling-delay-passive = <0>; /* milliseconds */
	556	polling-delay = <0>; /* milliseconds */
	557	thermal-sensors = <&tmuctrl_0>;
	558	#include "exynos7-trip-points.dtsi"
	559	};
	560	};
b9024cbc NKC	561	};
b9024cbc NKC	562	};
f17a618b NKC	563
f17a618b NKC	564	#include "exynos7-pinctrl.dtsi"