Merge tag 'upstream-4.7-rc1' of git://git.infradead.org/linux-ubifs
[deliverable/linux.git] / arch / arm64 / boot / dts / mediatek / mt8173-evb.dts
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1/*
2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: Eddie Huang <eddie.huang@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15/dts-v1/;
bfcce47a 16#include <dt-bindings/gpio/gpio.h>
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17#include "mt8173.dtsi"
18
19/ {
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20 model = "MediaTek MT8173 evaluation board";
21 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
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22
23 aliases {
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 };
29
30 memory@40000000 {
31 device_type = "memory";
32 reg = <0 0x40000000 0 0x80000000>;
33 };
34
35 chosen { };
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36
37 usb_p1_vbus: regulator@0 {
38 compatible = "regulator-fixed";
39 regulator-name = "usb_vbus";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
42 gpio = <&pio 130 GPIO_ACTIVE_HIGH>;
43 enable-active-high;
44 };
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45};
46
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47&i2c1 {
48 status = "okay";
49
50 buck: da9211@68 {
51 compatible = "dlg,da9211";
52 reg = <0x68>;
53
54 regulators {
55 da9211_vcpu_reg: BUCKA {
56 regulator-name = "VBUCKA";
57 regulator-min-microvolt = < 700000>;
58 regulator-max-microvolt = <1310000>;
59 regulator-min-microamp = <2000000>;
60 regulator-max-microamp = <4400000>;
61 regulator-ramp-delay = <10000>;
62 regulator-always-on;
63 };
64
65 da9211_vgpu_reg: BUCKB {
66 regulator-name = "VBUCKB";
67 regulator-min-microvolt = < 700000>;
68 regulator-max-microvolt = <1310000>;
69 regulator-min-microamp = <2000000>;
70 regulator-max-microamp = <3000000>;
71 regulator-ramp-delay = <10000>;
72 };
73 };
74 };
75};
76
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77&mmc0 {
78 status = "okay";
79 pinctrl-names = "default", "state_uhs";
80 pinctrl-0 = <&mmc0_pins_default>;
81 pinctrl-1 = <&mmc0_pins_uhs>;
82 bus-width = <8>;
83 max-frequency = <50000000>;
84 cap-mmc-highspeed;
85 vmmc-supply = <&mt6397_vemc_3v3_reg>;
86 vqmmc-supply = <&mt6397_vio18_reg>;
87 non-removable;
88};
89
90&mmc1 {
91 status = "okay";
92 pinctrl-names = "default", "state_uhs";
93 pinctrl-0 = <&mmc1_pins_default>;
94 pinctrl-1 = <&mmc1_pins_uhs>;
95 bus-width = <4>;
96 max-frequency = <50000000>;
97 cap-sd-highspeed;
98 sd-uhs-sdr25;
99 cd-gpios = <&pio 132 0>;
100 vmmc-supply = <&mt6397_vmch_reg>;
101 vqmmc-supply = <&mt6397_vmc_reg>;
102};
103
104&pio {
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105 disp_pwm0_pins: disp_pwm0_pins {
106 pins1 {
107 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
108 output-low;
109 };
110 };
111
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112 mmc0_pins_default: mmc0default {
113 pins_cmd_dat {
114 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
115 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
116 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
117 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
118 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
119 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
120 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
121 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
122 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
123 input-enable;
124 bias-pull-up;
125 };
126
127 pins_clk {
128 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
129 bias-pull-down;
130 };
131
132 pins_rst {
133 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
134 bias-pull-up;
135 };
136 };
137
138 mmc1_pins_default: mmc1default {
139 pins_cmd_dat {
140 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
141 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
142 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
143 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
144 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
145 input-enable;
146 drive-strength = <MTK_DRIVE_4mA>;
147 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
148 };
149
150 pins_clk {
151 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
152 bias-pull-down;
153 drive-strength = <MTK_DRIVE_4mA>;
154 };
155
156 pins_insert {
157 pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>;
158 bias-pull-up;
159 };
160 };
161
162 mmc0_pins_uhs: mmc0 {
163 pins_cmd_dat {
164 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
165 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
166 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
167 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
168 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
169 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
170 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
171 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
172 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
173 input-enable;
174 drive-strength = <MTK_DRIVE_2mA>;
175 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
176 };
177
178 pins_clk {
179 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
180 drive-strength = <MTK_DRIVE_2mA>;
181 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
182 };
183
184 pins_rst {
185 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
186 bias-pull-up;
187 };
188 };
189
190 mmc1_pins_uhs: mmc1 {
191 pins_cmd_dat {
192 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
193 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
194 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
195 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
196 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
197 input-enable;
198 drive-strength = <MTK_DRIVE_4mA>;
199 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
200 };
201
202 pins_clk {
203 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
204 drive-strength = <MTK_DRIVE_4mA>;
205 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
206 };
207 };
208};
209
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210&pwm0 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&disp_pwm0_pins>;
213 status = "okay";
214};
215
16ea61fc 216&pwrap {
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217 /* Only MT8173 E1 needs USB power domain */
218 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
219
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220 pmic: mt6397 {
221 compatible = "mediatek,mt6397";
222 interrupt-parent = <&pio>;
223 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
224 interrupt-controller;
225 #interrupt-cells = <2>;
226
227 mt6397regulator: mt6397regulator {
228 compatible = "mediatek,mt6397-regulator";
229
230 mt6397_vpca15_reg: buck_vpca15 {
231 regulator-compatible = "buck_vpca15";
232 regulator-name = "vpca15";
233 regulator-min-microvolt = < 700000>;
234 regulator-max-microvolt = <1350000>;
235 regulator-ramp-delay = <12500>;
236 regulator-always-on;
237 };
238
239 mt6397_vpca7_reg: buck_vpca7 {
240 regulator-compatible = "buck_vpca7";
241 regulator-name = "vpca7";
242 regulator-min-microvolt = < 700000>;
243 regulator-max-microvolt = <1350000>;
244 regulator-ramp-delay = <12500>;
245 regulator-enable-ramp-delay = <115>;
246 };
247
248 mt6397_vsramca15_reg: buck_vsramca15 {
249 regulator-compatible = "buck_vsramca15";
250 regulator-name = "vsramca15";
251 regulator-min-microvolt = < 700000>;
252 regulator-max-microvolt = <1350000>;
253 regulator-ramp-delay = <12500>;
254 regulator-always-on;
255 };
256
257 mt6397_vsramca7_reg: buck_vsramca7 {
258 regulator-compatible = "buck_vsramca7";
259 regulator-name = "vsramca7";
260 regulator-min-microvolt = < 700000>;
261 regulator-max-microvolt = <1350000>;
262 regulator-ramp-delay = <12500>;
263 regulator-always-on;
264 };
265
266 mt6397_vcore_reg: buck_vcore {
267 regulator-compatible = "buck_vcore";
268 regulator-name = "vcore";
269 regulator-min-microvolt = < 700000>;
270 regulator-max-microvolt = <1350000>;
271 regulator-ramp-delay = <12500>;
272 regulator-always-on;
273 };
274
275 mt6397_vgpu_reg: buck_vgpu {
276 regulator-compatible = "buck_vgpu";
277 regulator-name = "vgpu";
278 regulator-min-microvolt = < 700000>;
279 regulator-max-microvolt = <1350000>;
280 regulator-ramp-delay = <12500>;
281 regulator-enable-ramp-delay = <115>;
282 };
283
284 mt6397_vdrm_reg: buck_vdrm {
285 regulator-compatible = "buck_vdrm";
286 regulator-name = "vdrm";
287 regulator-min-microvolt = <1200000>;
288 regulator-max-microvolt = <1400000>;
289 regulator-ramp-delay = <12500>;
290 regulator-always-on;
291 };
292
293 mt6397_vio18_reg: buck_vio18 {
294 regulator-compatible = "buck_vio18";
295 regulator-name = "vio18";
296 regulator-min-microvolt = <1620000>;
297 regulator-max-microvolt = <1980000>;
298 regulator-ramp-delay = <12500>;
299 regulator-always-on;
300 };
301
302 mt6397_vtcxo_reg: ldo_vtcxo {
303 regulator-compatible = "ldo_vtcxo";
304 regulator-name = "vtcxo";
305 regulator-always-on;
306 };
307
308 mt6397_va28_reg: ldo_va28 {
309 regulator-compatible = "ldo_va28";
310 regulator-name = "va28";
311 regulator-always-on;
312 };
313
314 mt6397_vcama_reg: ldo_vcama {
315 regulator-compatible = "ldo_vcama";
316 regulator-name = "vcama";
317 regulator-min-microvolt = <1500000>;
318 regulator-max-microvolt = <2800000>;
319 regulator-enable-ramp-delay = <218>;
320 };
321
322 mt6397_vio28_reg: ldo_vio28 {
323 regulator-compatible = "ldo_vio28";
324 regulator-name = "vio28";
325 regulator-always-on;
326 };
327
328 mt6397_vusb_reg: ldo_vusb {
329 regulator-compatible = "ldo_vusb";
330 regulator-name = "vusb";
331 };
332
333 mt6397_vmc_reg: ldo_vmc {
334 regulator-compatible = "ldo_vmc";
335 regulator-name = "vmc";
336 regulator-min-microvolt = <1800000>;
337 regulator-max-microvolt = <3300000>;
338 regulator-enable-ramp-delay = <218>;
339 };
340
341 mt6397_vmch_reg: ldo_vmch {
342 regulator-compatible = "ldo_vmch";
343 regulator-name = "vmch";
344 regulator-min-microvolt = <3000000>;
345 regulator-max-microvolt = <3300000>;
346 regulator-enable-ramp-delay = <218>;
347 };
348
349 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
350 regulator-compatible = "ldo_vemc3v3";
351 regulator-name = "vemc_3v3";
352 regulator-min-microvolt = <3000000>;
353 regulator-max-microvolt = <3300000>;
354 regulator-enable-ramp-delay = <218>;
355 };
356
357 mt6397_vgp1_reg: ldo_vgp1 {
358 regulator-compatible = "ldo_vgp1";
359 regulator-name = "vcamd";
360 regulator-min-microvolt = <1220000>;
361 regulator-max-microvolt = <3300000>;
362 regulator-enable-ramp-delay = <240>;
363 };
364
365 mt6397_vgp2_reg: ldo_vgp2 {
366 regulator-compatible = "ldo_vgp2";
367 regulator-name = "vcamio";
368 regulator-min-microvolt = <1000000>;
369 regulator-max-microvolt = <3300000>;
370 regulator-enable-ramp-delay = <218>;
371 };
372
373 mt6397_vgp3_reg: ldo_vgp3 {
374 regulator-compatible = "ldo_vgp3";
375 regulator-name = "vcamaf";
376 regulator-min-microvolt = <1200000>;
377 regulator-max-microvolt = <3300000>;
378 regulator-enable-ramp-delay = <218>;
379 };
380
381 mt6397_vgp4_reg: ldo_vgp4 {
382 regulator-compatible = "ldo_vgp4";
383 regulator-name = "vgp4";
384 regulator-min-microvolt = <1200000>;
385 regulator-max-microvolt = <3300000>;
386 regulator-enable-ramp-delay = <218>;
387 };
388
389 mt6397_vgp5_reg: ldo_vgp5 {
390 regulator-compatible = "ldo_vgp5";
391 regulator-name = "vgp5";
392 regulator-min-microvolt = <1200000>;
393 regulator-max-microvolt = <3000000>;
394 regulator-enable-ramp-delay = <218>;
395 };
396
397 mt6397_vgp6_reg: ldo_vgp6 {
398 regulator-compatible = "ldo_vgp6";
399 regulator-name = "vgp6";
400 regulator-min-microvolt = <1200000>;
401 regulator-max-microvolt = <3300000>;
402 regulator-enable-ramp-delay = <218>;
403 };
404
405 mt6397_vibr_reg: ldo_vibr {
406 regulator-compatible = "ldo_vibr";
407 regulator-name = "vibr";
408 regulator-min-microvolt = <1300000>;
409 regulator-max-microvolt = <3300000>;
410 regulator-enable-ramp-delay = <218>;
411 };
412 };
413 };
414};
415
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416&pio {
417 spi_pins_a: spi0 {
418 pins_spi {
419 pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
420 <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
421 <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
422 <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
423 };
424 };
425};
426
427&spi {
428 pinctrl-names = "default";
429 pinctrl-0 = <&spi_pins_a>;
430 mediatek,pad-select = <0>;
431 status = "okay";
432};
433
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434&uart0 {
435 status = "okay";
436};
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437
438&usb30 {
439 vusb33-supply = <&mt6397_vusb_reg>;
440 vbus-supply = <&usb_p1_vbus>;
441 mediatek,wakeup-src = <1>;
442};
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