Commit | Line | Data |
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26a7e06d SH |
1 | /* |
2 | * Device Tree Source for the r8a7795 SoC | |
3 | * | |
4 | * Copyright (C) 2015 Renesas Electronics Corp. | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
49af46b4 | 11 | #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
26a7e06d SH |
12 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
13 | ||
14 | / { | |
15 | compatible = "renesas,r8a7795"; | |
16 | #address-cells = <2>; | |
17 | #size-cells = <2>; | |
18 | ||
32bc0c51 KM |
19 | aliases { |
20 | i2c0 = &i2c0; | |
21 | i2c1 = &i2c1; | |
22 | i2c2 = &i2c2; | |
23 | i2c3 = &i2c3; | |
24 | i2c4 = &i2c4; | |
25 | i2c5 = &i2c5; | |
26 | i2c6 = &i2c6; | |
27 | }; | |
28 | ||
12e51557 GI |
29 | psci { |
30 | compatible = "arm,psci-0.2"; | |
31 | method = "smc"; | |
32 | }; | |
33 | ||
26a7e06d SH |
34 | cpus { |
35 | #address-cells = <1>; | |
36 | #size-cells = <0>; | |
37 | ||
38 | /* 1 core only at this point */ | |
39 | a57_0: cpu@0 { | |
40 | compatible = "arm,cortex-a57", "arm,armv8"; | |
41 | reg = <0x0>; | |
42 | device_type = "cpu"; | |
12e51557 | 43 | enable-method = "psci"; |
26a7e06d SH |
44 | }; |
45 | }; | |
46 | ||
47 | extal_clk: extal { | |
48 | compatible = "fixed-clock"; | |
49 | #clock-cells = <0>; | |
50 | /* This value must be overridden by the board */ | |
51 | clock-frequency = <0>; | |
52 | }; | |
53 | ||
54 | extalr_clk: extalr { | |
55 | compatible = "fixed-clock"; | |
56 | #clock-cells = <0>; | |
57 | /* This value must be overridden by the board */ | |
58 | clock-frequency = <0>; | |
59 | }; | |
60 | ||
623197b9 KM |
61 | /* |
62 | * The external audio clocks are configured as 0 Hz fixed frequency | |
63 | * clocks by default. | |
64 | * Boards that provide audio clocks should override them. | |
65 | */ | |
66 | audio_clk_a: audio_clk_a { | |
67 | compatible = "fixed-clock"; | |
68 | #clock-cells = <0>; | |
69 | clock-frequency = <0>; | |
70 | }; | |
71 | ||
72 | audio_clk_b: audio_clk_b { | |
73 | compatible = "fixed-clock"; | |
74 | #clock-cells = <0>; | |
75 | clock-frequency = <0>; | |
76 | }; | |
77 | ||
78 | audio_clk_c: audio_clk_c { | |
79 | compatible = "fixed-clock"; | |
80 | #clock-cells = <0>; | |
81 | clock-frequency = <0>; | |
82 | }; | |
83 | ||
26a7e06d SH |
84 | soc { |
85 | compatible = "simple-bus"; | |
86 | interrupt-parent = <&gic>; | |
87 | #address-cells = <2>; | |
88 | #size-cells = <2>; | |
89 | ranges; | |
90 | ||
91 | gic: interrupt-controller@0xf1010000 { | |
92 | compatible = "arm,gic-400"; | |
93 | #interrupt-cells = <3>; | |
94 | #address-cells = <0>; | |
95 | interrupt-controller; | |
96 | reg = <0x0 0xf1010000 0 0x1000>, | |
97 | <0x0 0xf1020000 0 0x2000>; | |
98 | interrupts = <GIC_PPI 9 | |
99 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; | |
100 | }; | |
101 | ||
7b08623a TK |
102 | gpio0: gpio@e6050000 { |
103 | compatible = "renesas,gpio-r8a7795", | |
104 | "renesas,gpio-rcar"; | |
105 | reg = <0 0xe6050000 0 0x50>; | |
106 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | |
107 | #gpio-cells = <2>; | |
108 | gpio-controller; | |
109 | gpio-ranges = <&pfc 0 0 16>; | |
110 | #interrupt-cells = <2>; | |
111 | interrupt-controller; | |
112 | clocks = <&cpg CPG_MOD 912>; | |
113 | power-domains = <&cpg>; | |
114 | }; | |
115 | ||
116 | gpio1: gpio@e6051000 { | |
117 | compatible = "renesas,gpio-r8a7795", | |
118 | "renesas,gpio-rcar"; | |
119 | reg = <0 0xe6051000 0 0x50>; | |
120 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | |
121 | #gpio-cells = <2>; | |
122 | gpio-controller; | |
123 | gpio-ranges = <&pfc 0 32 28>; | |
124 | #interrupt-cells = <2>; | |
125 | interrupt-controller; | |
126 | clocks = <&cpg CPG_MOD 911>; | |
127 | power-domains = <&cpg>; | |
128 | }; | |
129 | ||
130 | gpio2: gpio@e6052000 { | |
131 | compatible = "renesas,gpio-r8a7795", | |
132 | "renesas,gpio-rcar"; | |
133 | reg = <0 0xe6052000 0 0x50>; | |
134 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | |
135 | #gpio-cells = <2>; | |
136 | gpio-controller; | |
137 | gpio-ranges = <&pfc 0 64 15>; | |
138 | #interrupt-cells = <2>; | |
139 | interrupt-controller; | |
140 | clocks = <&cpg CPG_MOD 910>; | |
141 | power-domains = <&cpg>; | |
142 | }; | |
143 | ||
144 | gpio3: gpio@e6053000 { | |
145 | compatible = "renesas,gpio-r8a7795", | |
146 | "renesas,gpio-rcar"; | |
147 | reg = <0 0xe6053000 0 0x50>; | |
148 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
149 | #gpio-cells = <2>; | |
150 | gpio-controller; | |
151 | gpio-ranges = <&pfc 0 96 16>; | |
152 | #interrupt-cells = <2>; | |
153 | interrupt-controller; | |
154 | clocks = <&cpg CPG_MOD 909>; | |
155 | power-domains = <&cpg>; | |
156 | }; | |
157 | ||
158 | gpio4: gpio@e6054000 { | |
159 | compatible = "renesas,gpio-r8a7795", | |
160 | "renesas,gpio-rcar"; | |
161 | reg = <0 0xe6054000 0 0x50>; | |
162 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; | |
163 | #gpio-cells = <2>; | |
164 | gpio-controller; | |
165 | gpio-ranges = <&pfc 0 128 18>; | |
166 | #interrupt-cells = <2>; | |
167 | interrupt-controller; | |
168 | clocks = <&cpg CPG_MOD 908>; | |
169 | power-domains = <&cpg>; | |
170 | }; | |
171 | ||
172 | gpio5: gpio@e6055000 { | |
173 | compatible = "renesas,gpio-r8a7795", | |
174 | "renesas,gpio-rcar"; | |
175 | reg = <0 0xe6055000 0 0x50>; | |
176 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; | |
177 | #gpio-cells = <2>; | |
178 | gpio-controller; | |
179 | gpio-ranges = <&pfc 0 160 26>; | |
180 | #interrupt-cells = <2>; | |
181 | interrupt-controller; | |
182 | clocks = <&cpg CPG_MOD 907>; | |
183 | power-domains = <&cpg>; | |
184 | }; | |
185 | ||
186 | gpio6: gpio@e6055400 { | |
187 | compatible = "renesas,gpio-r8a7795", | |
188 | "renesas,gpio-rcar"; | |
189 | reg = <0 0xe6055400 0 0x50>; | |
190 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; | |
191 | #gpio-cells = <2>; | |
192 | gpio-controller; | |
193 | gpio-ranges = <&pfc 0 192 32>; | |
194 | #interrupt-cells = <2>; | |
195 | interrupt-controller; | |
196 | clocks = <&cpg CPG_MOD 906>; | |
197 | power-domains = <&cpg>; | |
198 | }; | |
199 | ||
200 | gpio7: gpio@e6055800 { | |
201 | compatible = "renesas,gpio-r8a7795", | |
202 | "renesas,gpio-rcar"; | |
203 | reg = <0 0xe6055800 0 0x50>; | |
204 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; | |
205 | #gpio-cells = <2>; | |
206 | gpio-controller; | |
207 | gpio-ranges = <&pfc 0 224 4>; | |
208 | #interrupt-cells = <2>; | |
209 | interrupt-controller; | |
210 | clocks = <&cpg CPG_MOD 905>; | |
211 | power-domains = <&cpg>; | |
212 | }; | |
213 | ||
26a7e06d SH |
214 | timer { |
215 | compatible = "arm,armv8-timer"; | |
216 | interrupts = <GIC_PPI 13 | |
217 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
218 | <GIC_PPI 14 | |
219 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
220 | <GIC_PPI 11 | |
221 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, | |
222 | <GIC_PPI 10 | |
223 | (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; | |
224 | }; | |
225 | ||
226 | cpg: clock-controller@e6150000 { | |
227 | compatible = "renesas,r8a7795-cpg-mssr"; | |
228 | reg = <0 0xe6150000 0 0x1000>; | |
229 | clocks = <&extal_clk>, <&extalr_clk>; | |
230 | clock-names = "extal", "extalr"; | |
231 | #clock-cells = <2>; | |
232 | #power-domain-cells = <0>; | |
233 | }; | |
d9202126 | 234 | |
b281f4c8 KM |
235 | audma0: dma-controller@ec700000 { |
236 | compatible = "renesas,rcar-dmac"; | |
237 | reg = <0 0xec700000 0 0x10000>; | |
238 | interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH | |
239 | 0 320 IRQ_TYPE_LEVEL_HIGH | |
240 | 0 321 IRQ_TYPE_LEVEL_HIGH | |
241 | 0 322 IRQ_TYPE_LEVEL_HIGH | |
242 | 0 323 IRQ_TYPE_LEVEL_HIGH | |
243 | 0 324 IRQ_TYPE_LEVEL_HIGH | |
244 | 0 325 IRQ_TYPE_LEVEL_HIGH | |
245 | 0 326 IRQ_TYPE_LEVEL_HIGH | |
246 | 0 327 IRQ_TYPE_LEVEL_HIGH | |
247 | 0 328 IRQ_TYPE_LEVEL_HIGH | |
248 | 0 329 IRQ_TYPE_LEVEL_HIGH | |
249 | 0 330 IRQ_TYPE_LEVEL_HIGH | |
250 | 0 331 IRQ_TYPE_LEVEL_HIGH | |
251 | 0 332 IRQ_TYPE_LEVEL_HIGH | |
252 | 0 333 IRQ_TYPE_LEVEL_HIGH | |
253 | 0 334 IRQ_TYPE_LEVEL_HIGH | |
254 | 0 335 IRQ_TYPE_LEVEL_HIGH>; | |
255 | interrupt-names = "error", | |
256 | "ch0", "ch1", "ch2", "ch3", | |
257 | "ch4", "ch5", "ch6", "ch7", | |
258 | "ch8", "ch9", "ch10", "ch11", | |
259 | "ch12", "ch13", "ch14", "ch15"; | |
260 | clocks = <&cpg CPG_MOD 502>; | |
261 | clock-names = "fck"; | |
262 | power-domains = <&cpg>; | |
263 | #dma-cells = <1>; | |
264 | dma-channels = <16>; | |
265 | }; | |
266 | ||
267 | audma1: dma-controller@ec720000 { | |
268 | compatible = "renesas,rcar-dmac"; | |
269 | reg = <0 0xec720000 0 0x10000>; | |
270 | interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH | |
271 | 0 336 IRQ_TYPE_LEVEL_HIGH | |
272 | 0 337 IRQ_TYPE_LEVEL_HIGH | |
273 | 0 338 IRQ_TYPE_LEVEL_HIGH | |
274 | 0 339 IRQ_TYPE_LEVEL_HIGH | |
275 | 0 340 IRQ_TYPE_LEVEL_HIGH | |
276 | 0 341 IRQ_TYPE_LEVEL_HIGH | |
277 | 0 342 IRQ_TYPE_LEVEL_HIGH | |
278 | 0 343 IRQ_TYPE_LEVEL_HIGH | |
279 | 0 344 IRQ_TYPE_LEVEL_HIGH | |
280 | 0 345 IRQ_TYPE_LEVEL_HIGH | |
281 | 0 346 IRQ_TYPE_LEVEL_HIGH | |
282 | 0 347 IRQ_TYPE_LEVEL_HIGH | |
283 | 0 348 IRQ_TYPE_LEVEL_HIGH | |
284 | 0 349 IRQ_TYPE_LEVEL_HIGH | |
285 | 0 382 IRQ_TYPE_LEVEL_HIGH | |
286 | 0 383 IRQ_TYPE_LEVEL_HIGH>; | |
287 | interrupt-names = "error", | |
288 | "ch0", "ch1", "ch2", "ch3", | |
289 | "ch4", "ch5", "ch6", "ch7", | |
290 | "ch8", "ch9", "ch10", "ch11", | |
291 | "ch12", "ch13", "ch14", "ch15"; | |
292 | clocks = <&cpg CPG_MOD 501>; | |
293 | clock-names = "fck"; | |
294 | power-domains = <&cpg>; | |
295 | #dma-cells = <1>; | |
296 | dma-channels = <16>; | |
297 | }; | |
298 | ||
9241844a KM |
299 | pfc: pfc@e6060000 { |
300 | compatible = "renesas,pfc-r8a7795"; | |
301 | reg = <0 0xe6060000 0 0x50c>; | |
302 | }; | |
303 | ||
d9202126 GU |
304 | dmac0: dma-controller@e6700000 { |
305 | /* Empty node for now */ | |
306 | }; | |
307 | ||
308 | dmac1: dma-controller@e7300000 { | |
309 | /* Empty node for now */ | |
310 | }; | |
311 | ||
312 | dmac2: dma-controller@e7310000 { | |
313 | /* Empty node for now */ | |
314 | }; | |
49af46b4 | 315 | |
a92843c8 KM |
316 | avb: ethernet@e6800000 { |
317 | compatible = "renesas,etheravb-r8a7795"; | |
318 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; | |
319 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | |
320 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | |
321 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, | |
322 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, | |
323 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, | |
324 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, | |
325 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, | |
326 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, | |
327 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | |
328 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, | |
329 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, | |
330 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, | |
331 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, | |
332 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, | |
333 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, | |
334 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | |
335 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | |
336 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | |
337 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | |
338 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | |
339 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | |
340 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, | |
341 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, | |
342 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, | |
343 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; | |
344 | interrupt-names = "ch0", "ch1", "ch2", "ch3", | |
345 | "ch4", "ch5", "ch6", "ch7", | |
346 | "ch8", "ch9", "ch10", "ch11", | |
347 | "ch12", "ch13", "ch14", "ch15", | |
348 | "ch16", "ch17", "ch18", "ch19", | |
349 | "ch20", "ch21", "ch22", "ch23", | |
350 | "ch24"; | |
351 | clocks = <&cpg CPG_MOD 812>; | |
352 | power-domains = <&cpg>; | |
353 | phy-mode = "rgmii-id"; | |
354 | #address-cells = <1>; | |
355 | #size-cells = <0>; | |
356 | }; | |
357 | ||
4fa04299 GU |
358 | hscif0: serial@e6540000 { |
359 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
360 | reg = <0 0xe6540000 0 96>; | |
361 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
362 | clocks = <&cpg CPG_MOD 520>; | |
363 | clock-names = "sci_ick"; | |
364 | dmas = <&dmac1 0x31>, <&dmac1 0x30>; | |
365 | dma-names = "tx", "rx"; | |
366 | power-domains = <&cpg>; | |
367 | status = "disabled"; | |
368 | }; | |
369 | ||
370 | hscif1: serial@e6550000 { | |
371 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
372 | reg = <0 0xe6550000 0 96>; | |
373 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | |
374 | clocks = <&cpg CPG_MOD 519>; | |
375 | clock-names = "sci_ick"; | |
376 | dmas = <&dmac1 0x33>, <&dmac1 0x32>; | |
377 | dma-names = "tx", "rx"; | |
378 | power-domains = <&cpg>; | |
379 | status = "disabled"; | |
380 | }; | |
381 | ||
382 | hscif2: serial@e6560000 { | |
383 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
384 | reg = <0 0xe6560000 0 96>; | |
385 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
386 | clocks = <&cpg CPG_MOD 518>; | |
387 | clock-names = "sci_ick"; | |
388 | dmas = <&dmac1 0x35>, <&dmac1 0x34>; | |
389 | dma-names = "tx", "rx"; | |
390 | power-domains = <&cpg>; | |
391 | status = "disabled"; | |
392 | }; | |
393 | ||
394 | hscif3: serial@e66a0000 { | |
395 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
396 | reg = <0 0xe66a0000 0 96>; | |
397 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; | |
398 | clocks = <&cpg CPG_MOD 517>; | |
399 | clock-names = "sci_ick"; | |
400 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; | |
401 | dma-names = "tx", "rx"; | |
402 | power-domains = <&cpg>; | |
403 | status = "disabled"; | |
404 | }; | |
405 | ||
406 | hscif4: serial@e66b0000 { | |
407 | compatible = "renesas,hscif-r8a7795", "renesas,hscif"; | |
408 | reg = <0 0xe66b0000 0 96>; | |
409 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
410 | clocks = <&cpg CPG_MOD 516>; | |
411 | clock-names = "sci_ick"; | |
412 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; | |
413 | dma-names = "tx", "rx"; | |
414 | power-domains = <&cpg>; | |
415 | status = "disabled"; | |
416 | }; | |
417 | ||
49af46b4 GU |
418 | scif0: serial@e6e60000 { |
419 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
420 | reg = <0 0xe6e60000 0 64>; | |
421 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | |
422 | clocks = <&cpg CPG_MOD 207>; | |
423 | clock-names = "sci_ick"; | |
424 | dmas = <&dmac1 0x51>, <&dmac1 0x50>; | |
425 | dma-names = "tx", "rx"; | |
426 | power-domains = <&cpg>; | |
427 | status = "disabled"; | |
428 | }; | |
429 | ||
430 | scif1: serial@e6e68000 { | |
431 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
432 | reg = <0 0xe6e68000 0 64>; | |
433 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
434 | clocks = <&cpg CPG_MOD 206>; | |
435 | clock-names = "sci_ick"; | |
436 | dmas = <&dmac1 0x53>, <&dmac1 0x52>; | |
437 | dma-names = "tx", "rx"; | |
438 | power-domains = <&cpg>; | |
439 | status = "disabled"; | |
440 | }; | |
441 | ||
442 | scif2: serial@e6e88000 { | |
443 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
444 | reg = <0 0xe6e88000 0 64>; | |
445 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; | |
446 | clocks = <&cpg CPG_MOD 310>; | |
447 | clock-names = "sci_ick"; | |
448 | dmas = <&dmac1 0x13>, <&dmac1 0x12>; | |
449 | dma-names = "tx", "rx"; | |
450 | power-domains = <&cpg>; | |
451 | status = "disabled"; | |
452 | }; | |
453 | ||
454 | scif3: serial@e6c50000 { | |
455 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
456 | reg = <0 0xe6c50000 0 64>; | |
457 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
458 | clocks = <&cpg CPG_MOD 204>; | |
459 | clock-names = "sci_ick"; | |
460 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; | |
461 | dma-names = "tx", "rx"; | |
462 | power-domains = <&cpg>; | |
463 | status = "disabled"; | |
464 | }; | |
465 | ||
466 | scif4: serial@e6c40000 { | |
467 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
468 | reg = <0 0xe6c40000 0 64>; | |
469 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | |
470 | clocks = <&cpg CPG_MOD 203>; | |
471 | clock-names = "sci_ick"; | |
472 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; | |
473 | dma-names = "tx", "rx"; | |
474 | power-domains = <&cpg>; | |
475 | status = "disabled"; | |
476 | }; | |
477 | ||
478 | scif5: serial@e6f30000 { | |
479 | compatible = "renesas,scif-r8a7795", "renesas,scif"; | |
480 | reg = <0 0xe6f30000 0 64>; | |
481 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; | |
482 | clocks = <&cpg CPG_MOD 202>; | |
483 | clock-names = "sci_ick"; | |
484 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; | |
485 | dma-names = "tx", "rx"; | |
486 | power-domains = <&cpg>; | |
487 | status = "disabled"; | |
488 | }; | |
32bc0c51 KM |
489 | |
490 | i2c0: i2c@e6500000 { | |
491 | #address-cells = <1>; | |
492 | #size-cells = <0>; | |
493 | compatible = "renesas,i2c-r8a7795"; | |
494 | reg = <0 0xe6500000 0 0x40>; | |
495 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; | |
496 | clocks = <&cpg CPG_MOD 931>; | |
497 | power-domains = <&cpg>; | |
498 | status = "disabled"; | |
499 | }; | |
500 | ||
501 | i2c1: i2c@e6508000 { | |
502 | #address-cells = <1>; | |
503 | #size-cells = <0>; | |
504 | compatible = "renesas,i2c-r8a7795"; | |
505 | reg = <0 0xe6508000 0 0x40>; | |
506 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; | |
507 | clocks = <&cpg CPG_MOD 930>; | |
508 | power-domains = <&cpg>; | |
509 | status = "disabled"; | |
510 | }; | |
511 | ||
512 | i2c2: i2c@e6510000 { | |
513 | #address-cells = <1>; | |
514 | #size-cells = <0>; | |
515 | compatible = "renesas,i2c-r8a7795"; | |
516 | reg = <0 0xe6510000 0 0x40>; | |
517 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; | |
518 | clocks = <&cpg CPG_MOD 929>; | |
519 | power-domains = <&cpg>; | |
520 | status = "disabled"; | |
521 | }; | |
522 | ||
523 | i2c3: i2c@e66d0000 { | |
524 | #address-cells = <1>; | |
525 | #size-cells = <0>; | |
526 | compatible = "renesas,i2c-r8a7795"; | |
527 | reg = <0 0xe66d0000 0 0x40>; | |
528 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; | |
529 | clocks = <&cpg CPG_MOD 928>; | |
530 | power-domains = <&cpg>; | |
531 | status = "disabled"; | |
532 | }; | |
533 | ||
534 | i2c4: i2c@e66d8000 { | |
535 | #address-cells = <1>; | |
536 | #size-cells = <0>; | |
537 | compatible = "renesas,i2c-r8a7795"; | |
538 | reg = <0 0xe66d8000 0 0x40>; | |
539 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; | |
540 | clocks = <&cpg CPG_MOD 927>; | |
541 | power-domains = <&cpg>; | |
542 | status = "disabled"; | |
543 | }; | |
544 | ||
545 | i2c5: i2c@e66e0000 { | |
546 | #address-cells = <1>; | |
547 | #size-cells = <0>; | |
548 | compatible = "renesas,i2c-r8a7795"; | |
549 | reg = <0 0xe66e0000 0 0x40>; | |
550 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; | |
551 | clocks = <&cpg CPG_MOD 919>; | |
552 | power-domains = <&cpg>; | |
553 | status = "disabled"; | |
554 | }; | |
555 | ||
556 | i2c6: i2c@e66e8000 { | |
557 | #address-cells = <1>; | |
558 | #size-cells = <0>; | |
559 | compatible = "renesas,i2c-r8a7795"; | |
560 | reg = <0 0xe66e8000 0 0x40>; | |
561 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
562 | clocks = <&cpg CPG_MOD 918>; | |
563 | power-domains = <&cpg>; | |
564 | status = "disabled"; | |
565 | }; | |
623197b9 KM |
566 | |
567 | rcar_sound: sound@ec500000 { | |
568 | /* | |
569 | * #sound-dai-cells is required | |
570 | * | |
571 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; | |
572 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; | |
573 | */ | |
574 | /* | |
575 | * #clock-cells is required for audio_clkout0/1/2/3 | |
576 | * | |
577 | * clkout : #clock-cells = <0>; <&rcar_sound>; | |
578 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; | |
579 | */ | |
580 | compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; | |
581 | reg = <0 0xec500000 0 0x1000>, /* SCU */ | |
582 | <0 0xec5a0000 0 0x100>, /* ADG */ | |
583 | <0 0xec540000 0 0x1000>, /* SSIU */ | |
584 | <0 0xec541000 0 0x280>, /* SSI */ | |
585 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ | |
586 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; | |
587 | ||
588 | clocks = <&cpg CPG_MOD 1005>, | |
589 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, | |
590 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, | |
591 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, | |
592 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, | |
593 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, | |
b868ff51 KM |
594 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
595 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, | |
596 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, | |
597 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, | |
598 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, | |
b9dd9450 | 599 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
623197b9 KM |
600 | <&audio_clk_a>, <&audio_clk_b>, |
601 | <&audio_clk_c>, | |
602 | <&cpg CPG_CORE R8A7795_CLK_S0D4>; | |
603 | clock-names = "ssi-all", | |
604 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", | |
605 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", | |
606 | "ssi.1", "ssi.0", | |
b868ff51 KM |
607 | "src.9", "src.8", "src.7", "src.6", |
608 | "src.5", "src.4", "src.3", "src.2", | |
609 | "src.1", "src.0", | |
b9dd9450 | 610 | "dvc.0", "dvc.1", |
623197b9 KM |
611 | "clk_a", "clk_b", "clk_c", "clk_i"; |
612 | power-domains = <&cpg>; | |
613 | status = "disabled"; | |
614 | ||
b9dd9450 KM |
615 | rcar_sound,dvc { |
616 | dvc0: dvc@0 { | |
617 | dmas = <&audma0 0xbc>; | |
618 | dma-names = "tx"; | |
619 | }; | |
620 | dvc1: dvc@1 { | |
621 | dmas = <&audma0 0xbe>; | |
622 | dma-names = "tx"; | |
623 | }; | |
624 | }; | |
625 | ||
b868ff51 KM |
626 | rcar_sound,src { |
627 | src0: src@0 { | |
628 | interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; | |
629 | dmas = <&audma0 0x85>, <&audma1 0x9a>; | |
630 | dma-names = "rx", "tx"; | |
631 | }; | |
632 | src1: src@1 { | |
633 | interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; | |
634 | dmas = <&audma0 0x87>, <&audma1 0x9c>; | |
635 | dma-names = "rx", "tx"; | |
636 | }; | |
637 | src2: src@2 { | |
638 | interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; | |
639 | dmas = <&audma0 0x89>, <&audma1 0x9e>; | |
640 | dma-names = "rx", "tx"; | |
641 | }; | |
642 | src3: src@3 { | |
643 | interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; | |
644 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; | |
645 | dma-names = "rx", "tx"; | |
646 | }; | |
647 | src4: src@4 { | |
648 | interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; | |
649 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; | |
650 | dma-names = "rx", "tx"; | |
651 | }; | |
652 | src5: src@5 { | |
653 | interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; | |
654 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; | |
655 | dma-names = "rx", "tx"; | |
656 | }; | |
657 | src6: src@6 { | |
658 | interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; | |
659 | dmas = <&audma0 0x91>, <&audma1 0xb4>; | |
660 | dma-names = "rx", "tx"; | |
661 | }; | |
662 | src7: src@7 { | |
663 | interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; | |
664 | dmas = <&audma0 0x93>, <&audma1 0xb6>; | |
665 | dma-names = "rx", "tx"; | |
666 | }; | |
667 | src8: src@8 { | |
668 | interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; | |
669 | dmas = <&audma0 0x95>, <&audma1 0xb8>; | |
670 | dma-names = "rx", "tx"; | |
671 | }; | |
672 | src9: src@9 { | |
673 | interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; | |
674 | dmas = <&audma0 0x97>, <&audma1 0xba>; | |
675 | dma-names = "rx", "tx"; | |
676 | }; | |
677 | }; | |
678 | ||
623197b9 KM |
679 | rcar_sound,ssi { |
680 | ssi0: ssi@0 { | |
681 | interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
682 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
683 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
684 | }; |
685 | ssi1: ssi@1 { | |
686 | interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
687 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
688 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
689 | }; |
690 | ssi2: ssi@2 { | |
691 | interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
692 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
693 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
694 | }; |
695 | ssi3: ssi@3 { | |
696 | interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
697 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
698 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
699 | }; |
700 | ssi4: ssi@4 { | |
701 | interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
702 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
703 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
704 | }; |
705 | ssi5: ssi@5 { | |
706 | interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
707 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
708 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
709 | }; |
710 | ssi6: ssi@6 { | |
711 | interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
712 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
713 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
714 | }; |
715 | ssi7: ssi@7 { | |
716 | interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
717 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
718 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
719 | }; |
720 | ssi8: ssi@8 { | |
721 | interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
722 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
723 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
724 | }; |
725 | ssi9: ssi@9 { | |
726 | interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>; | |
10d18ab8 KM |
727 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
728 | dma-names = "rx", "tx", "rxu", "txu"; | |
623197b9 KM |
729 | }; |
730 | }; | |
731 | }; | |
26a7e06d SH |
732 | }; |
733 | }; |