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3be1a5c4 AB |
1 | /* |
2 | * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #ifndef __ASM_CPUFEATURE_H | |
10 | #define __ASM_CPUFEATURE_H | |
11 | ||
12 | #include <asm/hwcap.h> | |
13 | ||
14 | /* | |
15 | * In the arm64 world (as in the ARM world), elf_hwcap is used both internally | |
16 | * in the kernel and for user space to keep track of which optional features | |
17 | * are supported by the current system. So let's map feature 'x' to HWCAP_x. | |
18 | * Note that HWCAP_x constants are bit fields so we need to take the log. | |
19 | */ | |
20 | ||
21 | #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap)) | |
22 | #define cpu_feature(x) ilog2(HWCAP_ ## x) | |
23 | ||
5afaa1fc AP |
24 | #define ARM64_WORKAROUND_CLEAN_CACHE 0 |
25 | #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 | |
905e8c5d | 26 | #define ARM64_WORKAROUND_845719 2 |
94a9e04a | 27 | #define ARM64_HAS_SYSREG_GIC_CPUIF 3 |
301bcfac | 28 | |
94a9e04a | 29 | #define ARM64_NCAPS 4 |
301bcfac AP |
30 | |
31 | #ifndef __ASSEMBLY__ | |
930da09f | 32 | |
359b7064 MZ |
33 | struct arm64_cpu_capabilities { |
34 | const char *desc; | |
35 | u16 capability; | |
36 | bool (*matches)(const struct arm64_cpu_capabilities *); | |
1c076303 | 37 | void (*enable)(void); |
359b7064 MZ |
38 | union { |
39 | struct { /* To be used for erratum handling only */ | |
40 | u32 midr_model; | |
41 | u32 midr_range_min, midr_range_max; | |
42 | }; | |
94a9e04a MZ |
43 | |
44 | struct { /* Feature register checking */ | |
45 | u64 register_mask; | |
46 | u64 register_value; | |
47 | }; | |
359b7064 MZ |
48 | }; |
49 | }; | |
50 | ||
06f9eb88 | 51 | extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS); |
930da09f | 52 | |
3be1a5c4 AB |
53 | static inline bool cpu_have_feature(unsigned int num) |
54 | { | |
55 | return elf_hwcap & (1UL << num); | |
56 | } | |
57 | ||
930da09f AP |
58 | static inline bool cpus_have_cap(unsigned int num) |
59 | { | |
06f9eb88 | 60 | if (num >= ARM64_NCAPS) |
930da09f AP |
61 | return false; |
62 | return test_bit(num, cpu_hwcaps); | |
63 | } | |
64 | ||
65 | static inline void cpus_set_cap(unsigned int num) | |
66 | { | |
06f9eb88 | 67 | if (num >= ARM64_NCAPS) |
930da09f | 68 | pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n", |
06f9eb88 | 69 | num, ARM64_NCAPS); |
930da09f AP |
70 | else |
71 | __set_bit(num, cpu_hwcaps); | |
72 | } | |
73 | ||
79b0e09a JM |
74 | static inline int __attribute_const__ cpuid_feature_extract_field(u64 features, |
75 | int field) | |
76 | { | |
77 | return (s64)(features << (64 - 4 - field)) >> (64 - 4); | |
78 | } | |
79 | ||
80 | ||
359b7064 MZ |
81 | void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps, |
82 | const char *info); | |
e116a375 | 83 | void check_local_cpu_errata(void); |
359b7064 | 84 | void check_local_cpu_features(void); |
04597a65 SP |
85 | bool cpu_supports_mixed_endian_el0(void); |
86 | bool system_supports_mixed_endian_el0(void); | |
e116a375 | 87 | |
301bcfac AP |
88 | #endif /* __ASSEMBLY__ */ |
89 | ||
3be1a5c4 | 90 | #endif |