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3be1a5c4 AB |
1 | /* |
2 | * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #ifndef __ASM_CPUFEATURE_H | |
10 | #define __ASM_CPUFEATURE_H | |
11 | ||
12 | #include <asm/hwcap.h> | |
cdcf817b | 13 | #include <asm/sysreg.h> |
3be1a5c4 AB |
14 | |
15 | /* | |
16 | * In the arm64 world (as in the ARM world), elf_hwcap is used both internally | |
17 | * in the kernel and for user space to keep track of which optional features | |
18 | * are supported by the current system. So let's map feature 'x' to HWCAP_x. | |
19 | * Note that HWCAP_x constants are bit fields so we need to take the log. | |
20 | */ | |
21 | ||
22 | #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap)) | |
23 | #define cpu_feature(x) ilog2(HWCAP_ ## x) | |
24 | ||
5afaa1fc AP |
25 | #define ARM64_WORKAROUND_CLEAN_CACHE 0 |
26 | #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 | |
905e8c5d | 27 | #define ARM64_WORKAROUND_845719 2 |
94a9e04a | 28 | #define ARM64_HAS_SYSREG_GIC_CPUIF 3 |
338d4f49 | 29 | #define ARM64_HAS_PAN 4 |
c739dc83 | 30 | #define ARM64_HAS_LSE_ATOMICS 5 |
301bcfac | 31 | |
d964b722 | 32 | #define ARM64_NCAPS 6 |
301bcfac AP |
33 | |
34 | #ifndef __ASSEMBLY__ | |
930da09f | 35 | |
144e9697 WD |
36 | #include <linux/kernel.h> |
37 | ||
3c739b57 SP |
38 | /* CPU feature register tracking */ |
39 | enum ftr_type { | |
40 | FTR_EXACT, /* Use a predefined safe value */ | |
41 | FTR_LOWER_SAFE, /* Smaller value is safe */ | |
42 | FTR_HIGHER_SAFE,/* Bigger value is safe */ | |
43 | }; | |
44 | ||
45 | #define FTR_STRICT true /* SANITY check strict matching required */ | |
46 | #define FTR_NONSTRICT false /* SANITY check ignored */ | |
47 | ||
48 | struct arm64_ftr_bits { | |
49 | bool strict; /* CPU Sanity check: strict matching required ? */ | |
50 | enum ftr_type type; | |
51 | u8 shift; | |
52 | u8 width; | |
53 | s64 safe_val; /* safe value for discrete features */ | |
54 | }; | |
55 | ||
56 | /* | |
57 | * @arm64_ftr_reg - Feature register | |
58 | * @strict_mask Bits which should match across all CPUs for sanity. | |
59 | * @sys_val Safe value across the CPUs (system view) | |
60 | */ | |
61 | struct arm64_ftr_reg { | |
62 | u32 sys_id; | |
63 | const char *name; | |
64 | u64 strict_mask; | |
65 | u64 sys_val; | |
66 | struct arm64_ftr_bits *ftr_bits; | |
67 | }; | |
68 | ||
359b7064 MZ |
69 | struct arm64_cpu_capabilities { |
70 | const char *desc; | |
71 | u16 capability; | |
72 | bool (*matches)(const struct arm64_cpu_capabilities *); | |
dbb4e152 | 73 | void (*enable)(void *); /* Called on all active CPUs */ |
359b7064 MZ |
74 | union { |
75 | struct { /* To be used for erratum handling only */ | |
76 | u32 midr_model; | |
77 | u32 midr_range_min, midr_range_max; | |
78 | }; | |
94a9e04a MZ |
79 | |
80 | struct { /* Feature register checking */ | |
18ffa046 JM |
81 | int field_pos; |
82 | int min_field_value; | |
94a9e04a | 83 | }; |
359b7064 MZ |
84 | }; |
85 | }; | |
86 | ||
06f9eb88 | 87 | extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS); |
930da09f | 88 | |
3be1a5c4 AB |
89 | static inline bool cpu_have_feature(unsigned int num) |
90 | { | |
91 | return elf_hwcap & (1UL << num); | |
92 | } | |
93 | ||
930da09f AP |
94 | static inline bool cpus_have_cap(unsigned int num) |
95 | { | |
06f9eb88 | 96 | if (num >= ARM64_NCAPS) |
930da09f AP |
97 | return false; |
98 | return test_bit(num, cpu_hwcaps); | |
99 | } | |
100 | ||
101 | static inline void cpus_set_cap(unsigned int num) | |
102 | { | |
06f9eb88 | 103 | if (num >= ARM64_NCAPS) |
930da09f | 104 | pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n", |
06f9eb88 | 105 | num, ARM64_NCAPS); |
930da09f AP |
106 | else |
107 | __set_bit(num, cpu_hwcaps); | |
108 | } | |
109 | ||
ce98a677 SP |
110 | static inline int __attribute_const__ |
111 | cpuid_feature_extract_field_width(u64 features, int field, int width) | |
79b0e09a | 112 | { |
ce98a677 SP |
113 | return (s64)(features << (64 - width - field)) >> (64 - width); |
114 | } | |
115 | ||
116 | static inline int __attribute_const__ | |
117 | cpuid_feature_extract_field(u64 features, int field) | |
118 | { | |
119 | return cpuid_feature_extract_field_width(features, field, 4); | |
79b0e09a JM |
120 | } |
121 | ||
3c739b57 SP |
122 | static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp) |
123 | { | |
124 | return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); | |
125 | } | |
126 | ||
127 | static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val) | |
128 | { | |
129 | return cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width); | |
130 | } | |
131 | ||
cdcf817b SP |
132 | static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0) |
133 | { | |
134 | return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 || | |
135 | cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1; | |
136 | } | |
137 | ||
3a75578e | 138 | void __init setup_cpu_features(void); |
79b0e09a | 139 | |
ce8b602c | 140 | void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps, |
359b7064 | 141 | const char *info); |
e116a375 | 142 | void check_local_cpu_errata(void); |
dbb4e152 SP |
143 | |
144 | #ifdef CONFIG_HOTPLUG_CPU | |
145 | void verify_local_cpu_capabilities(void); | |
146 | #else | |
147 | static inline void verify_local_cpu_capabilities(void) | |
148 | { | |
149 | } | |
150 | #endif | |
e116a375 | 151 | |
b3f15378 SP |
152 | u64 read_system_reg(u32 id); |
153 | ||
c1e8656c SP |
154 | static inline bool cpu_supports_mixed_endian_el0(void) |
155 | { | |
156 | return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1)); | |
157 | } | |
158 | ||
159 | static inline bool system_supports_mixed_endian_el0(void) | |
160 | { | |
161 | return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1)); | |
162 | } | |
163 | ||
301bcfac AP |
164 | #endif /* __ASSEMBLY__ */ |
165 | ||
3be1a5c4 | 166 | #endif |