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4f8d6632 MZ |
1 | /* |
2 | * Copyright (C) 2012,2013 - ARM Ltd | |
3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
4 | * | |
5 | * Derived from arch/arm/include/asm/kvm_host.h: | |
6 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University | |
7 | * Author: Christoffer Dall <c.dall@virtualopensystems.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #ifndef __ARM64_KVM_HOST_H__ | |
23 | #define __ARM64_KVM_HOST_H__ | |
24 | ||
25 | #include <asm/kvm.h> | |
26 | #include <asm/kvm_asm.h> | |
27 | #include <asm/kvm_mmio.h> | |
28 | ||
da781470 AP |
29 | #if defined(CONFIG_KVM_ARM_MAX_VCPUS) |
30 | #define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS | |
31 | #else | |
32 | #define KVM_MAX_VCPUS 0 | |
33 | #endif | |
34 | ||
4f8d6632 MZ |
35 | #define KVM_USER_MEM_SLOTS 32 |
36 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
37 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 | |
38 | ||
39 | #include <kvm/arm_vgic.h> | |
40 | #include <kvm/arm_arch_timer.h> | |
41 | ||
7d0f84aa | 42 | #define KVM_VCPU_MAX_FEATURES 3 |
4f8d6632 | 43 | |
4f8d6632 MZ |
44 | struct kvm_vcpu; |
45 | int kvm_target_cpu(void); | |
46 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu); | |
47 | int kvm_arch_dev_ioctl_check_extension(long ext); | |
48 | ||
49 | struct kvm_arch { | |
50 | /* The VMID generation used for the virt. memory system */ | |
51 | u64 vmid_gen; | |
52 | u32 vmid; | |
53 | ||
54 | /* 1-level 2nd stage table and lock */ | |
55 | spinlock_t pgd_lock; | |
56 | pgd_t *pgd; | |
57 | ||
58 | /* VTTBR value associated with above pgd and vmid */ | |
59 | u64 vttbr; | |
60 | ||
61 | /* Interrupt controller */ | |
62 | struct vgic_dist vgic; | |
63 | ||
64 | /* Timer */ | |
65 | struct arch_timer_kvm timer; | |
66 | }; | |
67 | ||
68 | #define KVM_NR_MEM_OBJS 40 | |
69 | ||
70 | /* | |
71 | * We don't want allocation failures within the mmu code, so we preallocate | |
72 | * enough memory for a single page fault in a cache. | |
73 | */ | |
74 | struct kvm_mmu_memory_cache { | |
75 | int nobjs; | |
76 | void *objects[KVM_NR_MEM_OBJS]; | |
77 | }; | |
78 | ||
79 | struct kvm_vcpu_fault_info { | |
80 | u32 esr_el2; /* Hyp Syndrom Register */ | |
81 | u64 far_el2; /* Hyp Fault Address Register */ | |
82 | u64 hpfar_el2; /* Hyp IPA Fault Address Register */ | |
83 | }; | |
84 | ||
85 | struct kvm_cpu_context { | |
86 | struct kvm_regs gp_regs; | |
40033a61 MZ |
87 | union { |
88 | u64 sys_regs[NR_SYS_REGS]; | |
89 | u32 cp15[NR_CP15_REGS]; | |
90 | }; | |
4f8d6632 MZ |
91 | }; |
92 | ||
93 | typedef struct kvm_cpu_context kvm_cpu_context_t; | |
94 | ||
95 | struct kvm_vcpu_arch { | |
96 | struct kvm_cpu_context ctxt; | |
97 | ||
98 | /* HYP configuration */ | |
99 | u64 hcr_el2; | |
100 | ||
101 | /* Exception Information */ | |
102 | struct kvm_vcpu_fault_info fault; | |
103 | ||
104 | /* Pointer to host CPU context */ | |
105 | kvm_cpu_context_t *host_cpu_context; | |
106 | ||
107 | /* VGIC state */ | |
108 | struct vgic_cpu vgic_cpu; | |
109 | struct arch_timer_cpu timer_cpu; | |
110 | ||
111 | /* | |
112 | * Anything that is not used directly from assembly code goes | |
113 | * here. | |
114 | */ | |
115 | /* dcache set/way operation pending */ | |
116 | int last_pcpu; | |
117 | cpumask_t require_dcache_flush; | |
118 | ||
119 | /* Don't run the guest */ | |
120 | bool pause; | |
121 | ||
122 | /* IO related fields */ | |
123 | struct kvm_decode mmio_decode; | |
124 | ||
125 | /* Interrupt related fields */ | |
126 | u64 irq_lines; /* IRQ and FIQ levels */ | |
127 | ||
128 | /* Cache some mmu pages needed inside spinlock regions */ | |
129 | struct kvm_mmu_memory_cache mmu_page_cache; | |
130 | ||
131 | /* Target CPU and feature flags */ | |
6c8c0c4d | 132 | int target; |
4f8d6632 MZ |
133 | DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES); |
134 | ||
135 | /* Detect first run of a vcpu */ | |
136 | bool has_run_once; | |
137 | }; | |
138 | ||
139 | #define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs) | |
140 | #define vcpu_sys_reg(v,r) ((v)->arch.ctxt.sys_regs[(r)]) | |
141 | #define vcpu_cp15(v,r) ((v)->arch.ctxt.cp15[(r)]) | |
142 | ||
f0a3eaff VK |
143 | #ifdef CONFIG_CPU_BIG_ENDIAN |
144 | #define vcpu_cp15_64_low(v,r) ((v)->arch.ctxt.cp15[((r) + 1)]) | |
145 | #else | |
146 | #define vcpu_cp15_64_low(v,r) ((v)->arch.ctxt.cp15[((r) + 0)]) | |
147 | #endif | |
148 | ||
4f8d6632 MZ |
149 | struct kvm_vm_stat { |
150 | u32 remote_tlb_flush; | |
151 | }; | |
152 | ||
153 | struct kvm_vcpu_stat { | |
154 | u32 halt_wakeup; | |
155 | }; | |
156 | ||
157 | struct kvm_vcpu_init; | |
158 | int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, | |
159 | const struct kvm_vcpu_init *init); | |
473bdc0e | 160 | int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); |
4f8d6632 MZ |
161 | unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); |
162 | int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); | |
163 | struct kvm_one_reg; | |
164 | int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); | |
165 | int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); | |
166 | ||
167 | #define KVM_ARCH_WANT_MMU_NOTIFIER | |
168 | struct kvm; | |
169 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
170 | int kvm_unmap_hva_range(struct kvm *kvm, | |
171 | unsigned long start, unsigned long end); | |
172 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); | |
173 | ||
174 | /* We do not have shadow page tables, hence the empty hooks */ | |
175 | static inline int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
176 | { | |
177 | return 0; | |
178 | } | |
179 | ||
180 | static inline int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
181 | { | |
182 | return 0; | |
183 | } | |
184 | ||
185 | struct kvm_vcpu *kvm_arm_get_running_vcpu(void); | |
186 | struct kvm_vcpu __percpu **kvm_get_running_vcpus(void); | |
187 | ||
188 | u64 kvm_call_hyp(void *hypfn, ...); | |
189 | ||
190 | int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, | |
191 | int exception_index); | |
192 | ||
193 | int kvm_perf_init(void); | |
194 | int kvm_perf_teardown(void); | |
195 | ||
092bd143 MZ |
196 | static inline void __cpu_init_hyp_mode(phys_addr_t boot_pgd_ptr, |
197 | phys_addr_t pgd_ptr, | |
198 | unsigned long hyp_stack_ptr, | |
199 | unsigned long vector_ptr) | |
200 | { | |
201 | /* | |
202 | * Call initialization code, and switch to the full blown | |
203 | * HYP code. | |
204 | */ | |
205 | kvm_call_hyp((void *)boot_pgd_ptr, pgd_ptr, | |
206 | hyp_stack_ptr, vector_ptr); | |
207 | } | |
208 | ||
1a9b1305 MZ |
209 | struct vgic_sr_vectors { |
210 | void *save_vgic; | |
211 | void *restore_vgic; | |
212 | }; | |
213 | ||
214 | static inline void vgic_arch_setup(const struct vgic_params *vgic) | |
215 | { | |
216 | extern struct vgic_sr_vectors __vgic_sr_vectors; | |
217 | ||
218 | switch(vgic->type) | |
219 | { | |
220 | case VGIC_V2: | |
221 | __vgic_sr_vectors.save_vgic = __save_vgic_v2_state; | |
222 | __vgic_sr_vectors.restore_vgic = __restore_vgic_v2_state; | |
223 | break; | |
224 | ||
67b2abfe MZ |
225 | #ifdef CONFIG_ARM_GIC_V3 |
226 | case VGIC_V3: | |
227 | __vgic_sr_vectors.save_vgic = __save_vgic_v3_state; | |
228 | __vgic_sr_vectors.restore_vgic = __restore_vgic_v3_state; | |
229 | break; | |
230 | #endif | |
231 | ||
1a9b1305 MZ |
232 | default: |
233 | BUG(); | |
234 | } | |
235 | } | |
236 | ||
4f8d6632 | 237 | #endif /* __ARM64_KVM_HOST_H__ */ |