[deliverable/linux.git] / arch / arm64 / include / asm / pgtable.h

/*
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */
#ifndef __ASM_PGTABLE_H
#define __ASM_PGTABLE_H

#include <asm/proc-fns.h>

#include <asm/memory.h>
#include <asm/pgtable-hwdef.h>

/*
 * Software defined PTE bits definition.
 */
#define PTE_VALID		(_AT(pteval_t, 1) << 0)
#define PTE_DIRTY		(_AT(pteval_t, 1) << 55)
#define PTE_SPECIAL		(_AT(pteval_t, 1) << 56)
#define PTE_WRITE		(_AT(pteval_t, 1) << 57)
#define PTE_PROT_NONE		(_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */

/*
 * VMALLOC and SPARSEMEM_VMEMMAP ranges.
 *
 * VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array
 *	(rounded up to PUD_SIZE).
 * VMALLOC_START: beginning of the kernel VA space
 * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
 *	fixed mappings and modules
 */
#define VMEMMAP_SIZE		ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
#define VMALLOC_START		(UL(0xffffffffffffffff) << VA_BITS)
#define VMALLOC_END		(PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)

#define vmemmap			((struct page *)(VMALLOC_END + SZ_64K))

#define FIRST_USER_ADDRESS	0UL

#ifndef __ASSEMBLY__
extern void __pte_error(const char *file, int line, unsigned long val);
extern void __pmd_error(const char *file, int line, unsigned long val);
extern void __pud_error(const char *file, int line, unsigned long val);
extern void __pgd_error(const char *file, int line, unsigned long val);

#ifdef CONFIG_SMP
#define PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
#define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
#else
#define PROT_DEFAULT		(PTE_TYPE_PAGE | PTE_AF)
#define PROT_SECT_DEFAULT	(PMD_TYPE_SECT | PMD_SECT_AF)
#endif

#define PROT_DEVICE_nGnRE	(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_NORMAL_NC		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC))
#define PROT_NORMAL		(PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL))

#define PROT_SECT_DEVICE_nGnRE	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
#define PROT_SECT_NORMAL	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
#define PROT_SECT_NORMAL_EXEC	(PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))

#define _PAGE_DEFAULT		(PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))

#define PAGE_KERNEL		__pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
#define PAGE_KERNEL_EXEC	__pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)

#define PAGE_HYP		__pgprot(_PAGE_DEFAULT | PTE_HYP)
#define PAGE_HYP_DEVICE		__pgprot(PROT_DEVICE_nGnRE | PTE_HYP)

#define PAGE_S2			__pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
#define PAGE_S2_DEVICE		__pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)

#define PAGE_NONE		__pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
#define PAGE_SHARED		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
#define PAGE_SHARED_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
#define PAGE_COPY		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
#define PAGE_COPY_EXEC		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
#define PAGE_READONLY		__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
#define PAGE_READONLY_EXEC	__pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)

#define __P000  PAGE_NONE
#define __P001  PAGE_READONLY
#define __P010  PAGE_COPY
#define __P011  PAGE_COPY
#define __P100  PAGE_READONLY_EXEC
#define __P101  PAGE_READONLY_EXEC
#define __P110  PAGE_COPY_EXEC
#define __P111  PAGE_COPY_EXEC

#define __S000  PAGE_NONE
#define __S001  PAGE_READONLY
#define __S010  PAGE_SHARED
#define __S011  PAGE_SHARED
#define __S100  PAGE_READONLY_EXEC
#define __S101  PAGE_READONLY_EXEC
#define __S110  PAGE_SHARED_EXEC
#define __S111  PAGE_SHARED_EXEC

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern struct page *empty_zero_page;
#define ZERO_PAGE(vaddr)	(empty_zero_page)

#define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte_val(pte))

#define pte_pfn(pte)		((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)

#define pfn_pte(pfn,prot)	(__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))

#define pte_none(pte)		(!pte_val(pte))
#define pte_clear(mm,addr,ptep)	set_pte(ptep, __pte(0))
#define pte_page(pte)		(pfn_to_page(pte_pfn(pte)))

/* Find an entry in the third-level page table. */
#define pte_index(addr)		(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))

#define pte_offset_kernel(dir,addr)	(pmd_page_vaddr(*(dir)) + pte_index(addr))

#define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
#define pte_offset_map_nested(dir,addr)	pte_offset_kernel((dir), (addr))
#define pte_unmap(pte)			do { } while (0)
#define pte_unmap_nested(pte)		do { } while (0)

/*
 * The following only work if pte_present(). Undefined behaviour otherwise.
 */
#define pte_present(pte)	(!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
#define pte_dirty(pte)		(!!(pte_val(pte) & PTE_DIRTY))
#define pte_young(pte)		(!!(pte_val(pte) & PTE_AF))
#define pte_special(pte)	(!!(pte_val(pte) & PTE_SPECIAL))
#define pte_write(pte)		(!!(pte_val(pte) & PTE_WRITE))
#define pte_exec(pte)		(!(pte_val(pte) & PTE_UXN))

#define pte_valid_user(pte) \
	((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
#define pte_valid_not_user(pte) \
	((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)

static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
{
	pte_val(pte) &= ~pgprot_val(prot);
	return pte;
}

static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
{
	pte_val(pte) |= pgprot_val(prot);
	return pte;
}

static inline pte_t pte_wrprotect(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(PTE_WRITE));
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(PTE_WRITE));
}

static inline pte_t pte_mkclean(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(PTE_DIRTY));
}

static inline pte_t pte_mkold(pte_t pte)
{
	return clear_pte_bit(pte, __pgprot(PTE_AF));
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(PTE_AF));
}

static inline pte_t pte_mkspecial(pte_t pte)
{
	return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
}

static inline void set_pte(pte_t *ptep, pte_t pte)
{
	*ptep = pte;

	/*
	 * Only if the new pte is valid and kernel, otherwise TLB maintenance
	 * or update_mmu_cache() have the necessary barriers.
	 */
	if (pte_valid_not_user(pte)) {
		dsb(ishst);
		isb();
	}
}

extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);

static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
			      pte_t *ptep, pte_t pte)
{
	if (pte_valid_user(pte)) {
		if (!pte_special(pte) && pte_exec(pte))
			__sync_icache_dcache(pte, addr);
		if (pte_dirty(pte) && pte_write(pte))
			pte_val(pte) &= ~PTE_RDONLY;
		else
			pte_val(pte) |= PTE_RDONLY;
	}

	set_pte(ptep, pte);
}

/*
 * Huge pte definitions.
 */
#define pte_huge(pte)		(!(pte_val(pte) & PTE_TABLE_BIT))
#define pte_mkhuge(pte)		(__pte(pte_val(pte) & ~PTE_TABLE_BIT))

/*
 * Hugetlb definitions.
 */
#define HUGE_MAX_HSTATE		2
#define HPAGE_SHIFT		PMD_SHIFT
#define HPAGE_SIZE		(_AC(1, UL) << HPAGE_SHIFT)
#define HPAGE_MASK		(~(HPAGE_SIZE - 1))
#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)

#define __HAVE_ARCH_PTE_SPECIAL

static inline pte_t pud_pte(pud_t pud)
{
	return __pte(pud_val(pud));
}

static inline pmd_t pud_pmd(pud_t pud)
{
	return __pmd(pud_val(pud));
}

static inline pte_t pmd_pte(pmd_t pmd)
{
	return __pte(pmd_val(pmd));
}

static inline pmd_t pte_pmd(pte_t pte)
{
	return __pmd(pte_val(pte));
}

static inline pgprot_t mk_sect_prot(pgprot_t prot)
{
	return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
}

/*
 * THP definitions.
 */

#ifdef CONFIG_TRANSPARENT_HUGEPAGE
#define pmd_trans_huge(pmd)	(pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
#define pmd_trans_splitting(pmd)	pte_special(pmd_pte(pmd))
#ifdef CONFIG_HAVE_RCU_TABLE_FREE
#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
struct vm_area_struct;
void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
			  pmd_t *pmdp);
#endif /* CONFIG_HAVE_RCU_TABLE_FREE */
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */

#define pmd_dirty(pmd)		pte_dirty(pmd_pte(pmd))
#define pmd_young(pmd)		pte_young(pmd_pte(pmd))
#define pmd_wrprotect(pmd)	pte_pmd(pte_wrprotect(pmd_pte(pmd)))
#define pmd_mksplitting(pmd)	pte_pmd(pte_mkspecial(pmd_pte(pmd)))
#define pmd_mkold(pmd)		pte_pmd(pte_mkold(pmd_pte(pmd)))
#define pmd_mkwrite(pmd)	pte_pmd(pte_mkwrite(pmd_pte(pmd)))
#define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))
#define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))
#define pmd_mknotpresent(pmd)	(__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))

#define __HAVE_ARCH_PMD_WRITE
#define pmd_write(pmd)		pte_write(pmd_pte(pmd))

#define pmd_mkhuge(pmd)		(__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))

#define pmd_pfn(pmd)		(((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
#define pfn_pmd(pfn,prot)	(__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
#define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)

#define pud_write(pud)		pte_write(pud_pte(pud))
#define pud_pfn(pud)		(((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)

#define set_pmd_at(mm, addr, pmdp, pmd)	set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))

static inline int has_transparent_hugepage(void)
{
	return 1;
}

#define __pgprot_modify(prot,mask,bits) \
	__pgprot((pgprot_val(prot) & ~(mask)) | (bits))

/*
 * Mark the prot value as uncacheable and unbufferable.
 */
#define pgprot_noncached(prot) \
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
#define pgprot_writecombine(prot) \
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
#define pgprot_device(prot) \
	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
#define __HAVE_PHYS_MEM_ACCESS_PROT
struct file;
extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
				     unsigned long size, pgprot_t vma_prot);

#define pmd_none(pmd)		(!pmd_val(pmd))
#define pmd_present(pmd)	(pmd_val(pmd))

#define pmd_bad(pmd)		(!(pmd_val(pmd) & 2))

#define pmd_table(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
				 PMD_TYPE_TABLE)
#define pmd_sect(pmd)		((pmd_val(pmd) & PMD_TYPE_MASK) == \
				 PMD_TYPE_SECT)

#ifdef CONFIG_ARM64_64K_PAGES
#define pud_sect(pud)		(0)
#define pud_table(pud)		(1)
#else
#define pud_sect(pud)		((pud_val(pud) & PUD_TYPE_MASK) == \
				 PUD_TYPE_SECT)
#define pud_table(pud)		((pud_val(pud) & PUD_TYPE_MASK) == \
				 PUD_TYPE_TABLE)
#endif

static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
{
	*pmdp = pmd;
	dsb(ishst);
	isb();
}

static inline void pmd_clear(pmd_t *pmdp)
{
	set_pmd(pmdp, __pmd(0));
}

static inline pte_t *pmd_page_vaddr(pmd_t pmd)
{
	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
}

#define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define mk_pte(page,prot)	pfn_pte(page_to_pfn(page),prot)

#if CONFIG_ARM64_PGTABLE_LEVELS > 2

#define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd_val(pmd))

#define pud_none(pud)		(!pud_val(pud))
#define pud_bad(pud)		(!(pud_val(pud) & 2))
#define pud_present(pud)	(pud_val(pud))

static inline void set_pud(pud_t *pudp, pud_t pud)
{
	*pudp = pud;
	dsb(ishst);
	isb();
}

static inline void pud_clear(pud_t *pudp)
{
	set_pud(pudp, __pud(0));
}

static inline pmd_t *pud_page_vaddr(pud_t pud)
{
	return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
}

/* Find an entry in the second-level page table. */
#define pmd_index(addr)		(((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))

static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
{
	return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
}

#define pud_page(pud)		pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))

#endif	/* CONFIG_ARM64_PGTABLE_LEVELS > 2 */

#if CONFIG_ARM64_PGTABLE_LEVELS > 3

#define pud_ERROR(pud)		__pud_error(__FILE__, __LINE__, pud_val(pud))

#define pgd_none(pgd)		(!pgd_val(pgd))
#define pgd_bad(pgd)		(!(pgd_val(pgd) & 2))
#define pgd_present(pgd)	(pgd_val(pgd))

static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
{
	*pgdp = pgd;
	dsb(ishst);
}

static inline void pgd_clear(pgd_t *pgdp)
{
	set_pgd(pgdp, __pgd(0));
}

static inline pud_t *pgd_page_vaddr(pgd_t pgd)
{
	return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
}

/* Find an entry in the frst-level page table. */
#define pud_index(addr)		(((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))

static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
{
	return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
}

#define pgd_page(pgd)		pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))

#endif  /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */

#define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd_val(pgd))

/* to find an entry in a page-table-directory */
#define pgd_index(addr)		(((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))

#define pgd_offset(mm, addr)	((mm)->pgd+pgd_index(addr))

/* to find an entry in a kernel page-table-directory */
#define pgd_offset_k(addr)	pgd_offset(&init_mm, addr)

static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
			      PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
	pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
	return pte;
}

static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
{
	return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
}

extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
extern pgd_t idmap_pg_dir[PTRS_PER_PGD];

/*
 * Encode and decode a swap entry:
 *	bits 0-1:	present (must be zero)
 *	bits 2-7:	swap type
 *	bits 8-57:	swap offset
 */
#define __SWP_TYPE_SHIFT	2
#define __SWP_TYPE_BITS		6
#define __SWP_OFFSET_BITS	50
#define __SWP_TYPE_MASK		((1 << __SWP_TYPE_BITS) - 1)
#define __SWP_OFFSET_SHIFT	(__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
#define __SWP_OFFSET_MASK	((1UL << __SWP_OFFSET_BITS) - 1)

#define __swp_type(x)		(((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
#define __swp_offset(x)		(((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })

#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(swp)	((pte_t) { (swp).val })

/*
 * Ensure that there are not more swap files than can be encoded in the kernel
 * PTEs.
 */
#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)

extern int kern_addr_valid(unsigned long addr);

#include <asm-generic/pgtable.h>

#define pgtable_cache_init() do { } while (0)

#endif /* !__ASSEMBLY__ */

#endif /* __ASM_PGTABLE_H */
Commit	Line	Data
4f04d8f0 CM	1	/*
	2	* Copyright (C) 2012 ARM Ltd.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful,
	9	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	10	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*
	13	* You should have received a copy of the GNU General Public License
	14	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16	#ifndef __ASM_PGTABLE_H
	17	#define __ASM_PGTABLE_H
	18
	19	#include <asm/proc-fns.h>
	20
	21	#include <asm/memory.h>
	22	#include <asm/pgtable-hwdef.h>
	23
	24	/*
	25	* Software defined PTE bits definition.
	26	*/
a6fadf7e	27	#define PTE_VALID (_AT(pteval_t, 1) << 0)
4f04d8f0 CM	28	#define PTE_DIRTY (_AT(pteval_t, 1) << 55)
4f04d8f0 CM	29	#define PTE_SPECIAL (_AT(pteval_t, 1) << 56)
c2c93e5b	30	#define PTE_WRITE (_AT(pteval_t, 1) << 57)
3676f9ef	31	#define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
4f04d8f0 CM	32
	33	/*
	34	* VMALLOC and SPARSEMEM_VMEMMAP ranges.
08375198 CM	35	*
	36	* VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array
	37	* (rounded up to PUD_SIZE).
	38	* VMALLOC_START: beginning of the kernel VA space
	39	* VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
	40	* fixed mappings and modules
4f04d8f0	41	*/
08375198	42	#define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
847264fb	43	#define VMALLOC_START (UL(0xffffffffffffffff) << VA_BITS)
08375198	44	#define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
4f04d8f0 CM	45
	46	#define vmemmap ((struct page *)(VMALLOC_END + SZ_64K))
	47
d016bf7e	48	#define FIRST_USER_ADDRESS 0UL
4f04d8f0 CM	49
	50	#ifndef __ASSEMBLY__
	51	extern void __pte_error(const char *file, int line, unsigned long val);
	52	extern void __pmd_error(const char *file, int line, unsigned long val);
c79b954b	53	extern void __pud_error(const char *file, int line, unsigned long val);
4f04d8f0 CM	54	extern void __pgd_error(const char *file, int line, unsigned long val);
4f04d8f0 CM	55
a501e324 CM	56	#ifdef CONFIG_SMP
	57	#define PROT_DEFAULT (PTE_TYPE_PAGE \| PTE_AF \| PTE_SHARED)
	58	#define PROT_SECT_DEFAULT (PMD_TYPE_SECT \| PMD_SECT_AF \| PMD_SECT_S)
	59	#else
	60	#define PROT_DEFAULT (PTE_TYPE_PAGE \| PTE_AF)
	61	#define PROT_SECT_DEFAULT (PMD_TYPE_SECT \| PMD_SECT_AF)
	62	#endif
4f04d8f0	63
a501e324 CM	64	#define PROT_DEVICE_nGnRE (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_DEVICE_nGnRE))
	65	#define PROT_NORMAL_NC (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_NORMAL_NC))
	66	#define PROT_NORMAL (PROT_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_ATTRINDX(MT_NORMAL))
4f04d8f0	67
a501e324 CM	68	#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT \| PMD_SECT_PXN \| PMD_SECT_UXN \| PMD_ATTRINDX(MT_DEVICE_nGnRE))
	69	#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT \| PMD_SECT_PXN \| PMD_SECT_UXN \| PMD_ATTRINDX(MT_NORMAL))
	70	#define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT \| PMD_SECT_UXN \| PMD_ATTRINDX(MT_NORMAL))
a6fadf7e	71
a501e324	72	#define _PAGE_DEFAULT (PROT_DEFAULT \| PTE_ATTRINDX(MT_NORMAL))
4f04d8f0	73
a501e324 CM	74	#define PAGE_KERNEL __pgprot(_PAGE_DEFAULT \| PTE_PXN \| PTE_UXN \| PTE_DIRTY \| PTE_WRITE)
a501e324 CM	75	#define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT \| PTE_UXN \| PTE_DIRTY \| PTE_WRITE)
8e620b04	76
a501e324	77	#define PAGE_HYP __pgprot(_PAGE_DEFAULT \| PTE_HYP)
36311607 MZ	78	#define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE \| PTE_HYP)
36311607 MZ	79
a501e324	80	#define PAGE_S2 __pgprot(PROT_DEFAULT \| PTE_S2_MEMATTR(MT_S2_NORMAL) \| PTE_S2_RDONLY)
4a513fb0	81	#define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT \| PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) \| PTE_S2_RDONLY \| PTE_UXN)
36311607	82
a501e324 CM	83	#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_TYPE_MASK) \| PTE_PROT_NONE \| PTE_PXN \| PTE_UXN)
	84	#define PAGE_SHARED __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN \| PTE_WRITE)
	85	#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_WRITE)
	86	#define PAGE_COPY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN)
	87	#define PAGE_COPY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN)
	88	#define PAGE_READONLY __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN \| PTE_UXN)
	89	#define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT \| PTE_USER \| PTE_NG \| PTE_PXN)
a501e324 CM	90
	91	#define __P000 PAGE_NONE
	92	#define __P001 PAGE_READONLY
	93	#define __P010 PAGE_COPY
	94	#define __P011 PAGE_COPY
5a0fdfad	95	#define __P100 PAGE_READONLY_EXEC
a501e324 CM	96	#define __P101 PAGE_READONLY_EXEC
	97	#define __P110 PAGE_COPY_EXEC
	98	#define __P111 PAGE_COPY_EXEC
	99
	100	#define __S000 PAGE_NONE
	101	#define __S001 PAGE_READONLY
	102	#define __S010 PAGE_SHARED
	103	#define __S011 PAGE_SHARED
5a0fdfad	104	#define __S100 PAGE_READONLY_EXEC
a501e324 CM	105	#define __S101 PAGE_READONLY_EXEC
	106	#define __S110 PAGE_SHARED_EXEC
	107	#define __S111 PAGE_SHARED_EXEC
4f04d8f0	108
4f04d8f0 CM	109	/*
	110	* ZERO_PAGE is a global shared page that is always zero: used
	111	* for zero-mapped memory areas etc..
	112	*/
	113	extern struct page *empty_zero_page;
	114	#define ZERO_PAGE(vaddr) (empty_zero_page)
	115
7078db46 CM	116	#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
7078db46 CM	117
4f04d8f0 CM	118	#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
	119
	120	#define pfn_pte(pfn,prot) (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) \| pgprot_val(prot)))
	121
	122	#define pte_none(pte) (!pte_val(pte))
	123	#define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
	124	#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
7078db46 CM	125
	126	/* Find an entry in the third-level page table. */
	127	#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
	128
9ab6d02f	129	#define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + pte_index(addr))
4f04d8f0 CM	130
	131	#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
	132	#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
	133	#define pte_unmap(pte) do { } while (0)
	134	#define pte_unmap_nested(pte) do { } while (0)
	135
	136	/*
	137	* The following only work if pte_present(). Undefined behaviour otherwise.
	138	*/
84fe6826 SC	139	#define pte_present(pte) (!!(pte_val(pte) & (PTE_VALID \| PTE_PROT_NONE)))
	140	#define pte_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY))
	141	#define pte_young(pte) (!!(pte_val(pte) & PTE_AF))
	142	#define pte_special(pte) (!!(pte_val(pte) & PTE_SPECIAL))
	143	#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
8e620b04	144	#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
4f04d8f0	145
a6fadf7e	146	#define pte_valid_user(pte) \
02522463	147	((pte_val(pte) & (PTE_VALID \| PTE_USER)) == (PTE_VALID \| PTE_USER))
7f0b1bf0 CM	148	#define pte_valid_not_user(pte) \
7f0b1bf0 CM	149	((pte_val(pte) & (PTE_VALID \| PTE_USER)) == PTE_VALID)
4f04d8f0	150
b6d4f280	151	static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
44b6dfc5	152	{
b6d4f280	153	pte_val(pte) &= ~pgprot_val(prot);
44b6dfc5 SC	154	return pte;
	155	}
	156
b6d4f280	157	static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
44b6dfc5	158	{
b6d4f280	159	pte_val(pte) \|= pgprot_val(prot);
44b6dfc5 SC	160	return pte;
	161	}
	162
b6d4f280 LA	163	static inline pte_t pte_wrprotect(pte_t pte)
	164	{
	165	return clear_pte_bit(pte, __pgprot(PTE_WRITE));
	166	}
	167
	168	static inline pte_t pte_mkwrite(pte_t pte)
	169	{
	170	return set_pte_bit(pte, __pgprot(PTE_WRITE));
	171	}
	172
44b6dfc5 SC	173	static inline pte_t pte_mkclean(pte_t pte)
44b6dfc5 SC	174	{
b6d4f280	175	return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
44b6dfc5 SC	176	}
	177
	178	static inline pte_t pte_mkdirty(pte_t pte)
	179	{
b6d4f280	180	return set_pte_bit(pte, __pgprot(PTE_DIRTY));
44b6dfc5 SC	181	}
	182
	183	static inline pte_t pte_mkold(pte_t pte)
	184	{
b6d4f280	185	return clear_pte_bit(pte, __pgprot(PTE_AF));
44b6dfc5 SC	186	}
	187
	188	static inline pte_t pte_mkyoung(pte_t pte)
	189	{
b6d4f280	190	return set_pte_bit(pte, __pgprot(PTE_AF));
44b6dfc5 SC	191	}
	192
	193	static inline pte_t pte_mkspecial(pte_t pte)
	194	{
b6d4f280	195	return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
44b6dfc5	196	}
4f04d8f0 CM	197
	198	static inline void set_pte(pte_t *ptep, pte_t pte)
	199	{
	200	*ptep = pte;
7f0b1bf0 CM	201
	202	/*
	203	* Only if the new pte is valid and kernel, otherwise TLB maintenance
	204	* or update_mmu_cache() have the necessary barriers.
	205	*/
	206	if (pte_valid_not_user(pte)) {
	207	dsb(ishst);
	208	isb();
	209	}
4f04d8f0 CM	210	}
	211
	212	extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
	213
	214	static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
	215	pte_t *ptep, pte_t pte)
	216	{
a6fadf7e	217	if (pte_valid_user(pte)) {
71fdb6bf	218	if (!pte_special(pte) && pte_exec(pte))
02522463	219	__sync_icache_dcache(pte, addr);
c2c93e5b SC	220	if (pte_dirty(pte) && pte_write(pte))
	221	pte_val(pte) &= ~PTE_RDONLY;
	222	else
	223	pte_val(pte) \|= PTE_RDONLY;
02522463 WD	224	}
02522463 WD	225
4f04d8f0 CM	226	set_pte(ptep, pte);
	227	}
	228
	229	/*
	230	* Huge pte definitions.
	231	*/
084bd298 SC	232	#define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT))
	233	#define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
	234
	235	/*
	236	* Hugetlb definitions.
	237	*/
	238	#define HUGE_MAX_HSTATE 2
	239	#define HPAGE_SHIFT PMD_SHIFT
	240	#define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
	241	#define HPAGE_MASK (~(HPAGE_SIZE - 1))
	242	#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
4f04d8f0	243
4f04d8f0 CM	244	#define __HAVE_ARCH_PTE_SPECIAL
4f04d8f0 CM	245
29e56940 SC	246	static inline pte_t pud_pte(pud_t pud)
	247	{
	248	return __pte(pud_val(pud));
	249	}
	250
	251	static inline pmd_t pud_pmd(pud_t pud)
	252	{
	253	return __pmd(pud_val(pud));
	254	}
	255
9c7e535f SC	256	static inline pte_t pmd_pte(pmd_t pmd)
	257	{
	258	return __pte(pmd_val(pmd));
	259	}
af074848	260
9c7e535f SC	261	static inline pmd_t pte_pmd(pte_t pte)
	262	{
	263	return __pmd(pte_val(pte));
	264	}
af074848	265
8ce837ce AB	266	static inline pgprot_t mk_sect_prot(pgprot_t prot)
	267	{
	268	return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
	269	}
	270
af074848 SC	271	/*
	272	* THP definitions.
	273	*/
af074848 SC	274
	275	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
	276	#define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
9c7e535f	277	#define pmd_trans_splitting(pmd) pte_special(pmd_pte(pmd))
29e56940 SC	278	#ifdef CONFIG_HAVE_RCU_TABLE_FREE
	279	#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
	280	struct vm_area_struct;
	281	void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
	282	pmd_t *pmdp);
	283	#endif /* CONFIG_HAVE_RCU_TABLE_FREE */
	284	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
af074848	285
c164e038	286	#define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
9c7e535f SC	287	#define pmd_young(pmd) pte_young(pmd_pte(pmd))
	288	#define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
	289	#define pmd_mksplitting(pmd) pte_pmd(pte_mkspecial(pmd_pte(pmd)))
	290	#define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
	291	#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
	292	#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
	293	#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
e3a920af	294	#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
af074848	295
9c7e535f SC	296	#define __HAVE_ARCH_PMD_WRITE
9c7e535f SC	297	#define pmd_write(pmd) pte_write(pmd_pte(pmd))
af074848 SC	298
	299	#define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
	300
	301	#define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
	302	#define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) \| pgprot_val(prot)))
	303	#define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot)
	304
29e56940	305	#define pud_write(pud) pte_write(pud_pte(pud))
206a2a73	306	#define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
af074848	307
ceb21835	308	#define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
af074848 SC	309
	310	static inline int has_transparent_hugepage(void)
	311	{
	312	return 1;
	313	}
	314
a501e324 CM	315	#define __pgprot_modify(prot,mask,bits) \
	316	__pgprot((pgprot_val(prot) & ~(mask)) \| (bits))
	317
4f04d8f0 CM	318	/*
	319	* Mark the prot value as uncacheable and unbufferable.
	320	*/
	321	#define pgprot_noncached(prot) \
de2db743	322	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) \| PTE_PXN \| PTE_UXN)
4f04d8f0	323	#define pgprot_writecombine(prot) \
de2db743	324	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) \| PTE_PXN \| PTE_UXN)
d1e6dc91 LD	325	#define pgprot_device(prot) \
d1e6dc91 LD	326	__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) \| PTE_PXN \| PTE_UXN)
4f04d8f0 CM	327	#define __HAVE_PHYS_MEM_ACCESS_PROT
	328	struct file;
	329	extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
	330	unsigned long size, pgprot_t vma_prot);
	331
	332	#define pmd_none(pmd) (!pmd_val(pmd))
	333	#define pmd_present(pmd) (pmd_val(pmd))
	334
	335	#define pmd_bad(pmd) (!(pmd_val(pmd) & 2))
	336
36311607 MZ	337	#define pmd_table(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
	338	PMD_TYPE_TABLE)
	339	#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
	340	PMD_TYPE_SECT)
	341
f3b766a2	342	#ifdef CONFIG_ARM64_64K_PAGES
206a2a73	343	#define pud_sect(pud) (0)
523d6e9f	344	#define pud_table(pud) (1)
206a2a73 SC	345	#else
	346	#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
	347	PUD_TYPE_SECT)
523d6e9f	348	#define pud_table(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
523d6e9f	349	PUD_TYPE_TABLE)
206a2a73	350	#endif
36311607	351
4f04d8f0 CM	352	static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
	353	{
	354	*pmdp = pmd;
98f7685e	355	dsb(ishst);
7f0b1bf0	356	isb();
4f04d8f0 CM	357	}
	358
	359	static inline void pmd_clear(pmd_t *pmdp)
	360	{
	361	set_pmd(pmdp, __pmd(0));
	362	}
	363
	364	static inline pte_t *pmd_page_vaddr(pmd_t pmd)
	365	{
	366	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
	367	}
	368
	369	#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
	370
	371	/*
	372	* Conversion functions: convert a page and protection to a page entry,
	373	* and a page entry and page directory to the page they refer to.
	374	*/
	375	#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
	376
abe669d7	377	#if CONFIG_ARM64_PGTABLE_LEVELS > 2
4f04d8f0	378
7078db46 CM	379	#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
7078db46 CM	380
4f04d8f0 CM	381	#define pud_none(pud) (!pud_val(pud))
	382	#define pud_bad(pud) (!(pud_val(pud) & 2))
	383	#define pud_present(pud) (pud_val(pud))
	384
	385	static inline void set_pud(pud_t *pudp, pud_t pud)
	386	{
	387	*pudp = pud;
98f7685e	388	dsb(ishst);
7f0b1bf0	389	isb();
4f04d8f0 CM	390	}
	391
	392	static inline void pud_clear(pud_t *pudp)
	393	{
	394	set_pud(pudp, __pud(0));
	395	}
	396
	397	static inline pmd_t *pud_page_vaddr(pud_t pud)
	398	{
	399	return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
	400	}
	401
7078db46 CM	402	/* Find an entry in the second-level page table. */
	403	#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
	404
	405	static inline pmd_t pmd_offset(pud_t pud, unsigned long addr)
	406	{
	407	return (pmd_t )pud_page_vaddr(pud) + pmd_index(addr);
	408	}
	409
5d96e0cb	410	#define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
29e56940	411
abe669d7	412	#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
4f04d8f0	413
abe669d7	414	#if CONFIG_ARM64_PGTABLE_LEVELS > 3
c79b954b	415
7078db46 CM	416	#define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
7078db46 CM	417
c79b954b JL	418	#define pgd_none(pgd) (!pgd_val(pgd))
	419	#define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
	420	#define pgd_present(pgd) (pgd_val(pgd))
	421
	422	static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
	423	{
	424	*pgdp = pgd;
	425	dsb(ishst);
	426	}
	427
	428	static inline void pgd_clear(pgd_t *pgdp)
	429	{
	430	set_pgd(pgdp, __pgd(0));
	431	}
	432
	433	static inline pud_t *pgd_page_vaddr(pgd_t pgd)
	434	{
	435	return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
	436	}
	437
7078db46 CM	438	/* Find an entry in the frst-level page table. */
	439	#define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
	440
	441	static inline pud_t pud_offset(pgd_t pgd, unsigned long addr)
	442	{
	443	return (pud_t )pgd_page_vaddr(pgd) + pud_index(addr);
	444	}
	445
5d96e0cb JL	446	#define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
5d96e0cb JL	447
abe669d7	448	#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
c79b954b	449
7078db46 CM	450	#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
7078db46 CM	451
4f04d8f0 CM	452	/* to find an entry in a page-table-directory */
	453	#define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
	454
	455	#define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))
	456
	457	/* to find an entry in a kernel page-table-directory */
	458	#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
	459
4f04d8f0 CM	460	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
4f04d8f0 CM	461	{
a6fadf7e	462	const pteval_t mask = PTE_USER \| PTE_PXN \| PTE_UXN \| PTE_RDONLY \|
c2c93e5b	463	PTE_PROT_NONE \| PTE_VALID \| PTE_WRITE;
4f04d8f0 CM	464	pte_val(pte) = (pte_val(pte) & ~mask) \| (pgprot_val(newprot) & mask);
	465	return pte;
	466	}
	467
9c7e535f SC	468	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
	469	{
	470	return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
	471	}
	472
4f04d8f0 CM	473	extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
	474	extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
	475
4f04d8f0 CM	476	/*
4f04d8f0 CM	477	* Encode and decode a swap entry:
3676f9ef	478	* bits 0-1: present (must be zero)
9b3e661e KS	479	* bits 2-7: swap type
9b3e661e KS	480	* bits 8-57: swap offset
4f04d8f0	481	*/
9b3e661e	482	#define __SWP_TYPE_SHIFT 2
4f04d8f0	483	#define __SWP_TYPE_BITS 6
9b3e661e	484	#define __SWP_OFFSET_BITS 50
4f04d8f0 CM	485	#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
4f04d8f0 CM	486	#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
3676f9ef	487	#define __SWP_OFFSET_MASK ((1UL << __SWP_OFFSET_BITS) - 1)
4f04d8f0 CM	488
4f04d8f0 CM	489	#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
3676f9ef	490	#define __swp_offset(x) (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
4f04d8f0 CM	491	#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) \| ((offset) << __SWP_OFFSET_SHIFT) })
	492
	493	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
	494	#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
	495
	496	/*
	497	* Ensure that there are not more swap files than can be encoded in the kernel
aad9061b	498	* PTEs.
4f04d8f0 CM	499	*/
	500	#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
	501
4f04d8f0 CM	502	extern int kern_addr_valid(unsigned long addr);
	503
	504	#include <asm-generic/pgtable.h>
	505
4f04d8f0 CM	506	#define pgtable_cache_init() do { } while (0)
	507
	508	#endif /* !__ASSEMBLY__ */
	509
	510	#endif /* __ASM_PGTABLE_H */