Commit | Line | Data |
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e039ee4e AP |
1 | /* |
2 | * alternative runtime patching | |
3 | * inspired by the x86 version | |
4 | * | |
5 | * Copyright (C) 2014 ARM Ltd. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #define pr_fmt(fmt) "alternatives: " fmt | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/cpu.h> | |
24 | #include <asm/cacheflush.h> | |
25 | #include <asm/alternative.h> | |
26 | #include <asm/cpufeature.h> | |
7616fc8b | 27 | #include <asm/insn.h> |
ee78fdc7 | 28 | #include <asm/sections.h> |
e039ee4e AP |
29 | #include <linux/stop_machine.h> |
30 | ||
7616fc8b MZ |
31 | #define __ALT_PTR(a,f) (u32 *)((void *)&(a)->f + (a)->f) |
32 | #define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset) | |
33 | #define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset) | |
34 | ||
932ded4b AP |
35 | struct alt_region { |
36 | struct alt_instr *begin; | |
37 | struct alt_instr *end; | |
38 | }; | |
39 | ||
7616fc8b MZ |
40 | /* |
41 | * Check if the target PC is within an alternative block. | |
42 | */ | |
43 | static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc) | |
44 | { | |
45 | unsigned long replptr; | |
46 | ||
47 | if (kernel_text_address(pc)) | |
48 | return 1; | |
49 | ||
50 | replptr = (unsigned long)ALT_REPL_PTR(alt); | |
51 | if (pc >= replptr && pc <= (replptr + alt->alt_len)) | |
52 | return 0; | |
53 | ||
54 | /* | |
55 | * Branching into *another* alternate sequence is doomed, and | |
56 | * we're not even trying to fix it up. | |
57 | */ | |
58 | BUG(); | |
59 | } | |
60 | ||
61 | static u32 get_alt_insn(struct alt_instr *alt, u32 *insnptr, u32 *altinsnptr) | |
62 | { | |
63 | u32 insn; | |
64 | ||
65 | insn = le32_to_cpu(*altinsnptr); | |
66 | ||
67 | if (aarch64_insn_is_branch_imm(insn)) { | |
68 | s32 offset = aarch64_get_branch_offset(insn); | |
69 | unsigned long target; | |
70 | ||
71 | target = (unsigned long)altinsnptr + offset; | |
72 | ||
73 | /* | |
74 | * If we're branching inside the alternate sequence, | |
75 | * do not rewrite the instruction, as it is already | |
76 | * correct. Otherwise, generate the new instruction. | |
77 | */ | |
78 | if (branch_insn_requires_update(alt, target)) { | |
79 | offset = target - (unsigned long)insnptr; | |
80 | insn = aarch64_set_branch_offset(insn, offset); | |
81 | } | |
82 | } | |
83 | ||
84 | return insn; | |
85 | } | |
86 | ||
ef5e724b | 87 | static void __apply_alternatives(void *alt_region) |
e039ee4e AP |
88 | { |
89 | struct alt_instr *alt; | |
932ded4b | 90 | struct alt_region *region = alt_region; |
7616fc8b | 91 | u32 *origptr, *replptr; |
e039ee4e | 92 | |
932ded4b | 93 | for (alt = region->begin; alt < region->end; alt++) { |
7616fc8b MZ |
94 | u32 insn; |
95 | int i, nr_inst; | |
96 | ||
e039ee4e AP |
97 | if (!cpus_have_cap(alt->cpufeature)) |
98 | continue; | |
99 | ||
fef7f2b2 | 100 | BUG_ON(alt->alt_len != alt->orig_len); |
e039ee4e AP |
101 | |
102 | pr_info_once("patching kernel code\n"); | |
103 | ||
7616fc8b MZ |
104 | origptr = ALT_ORIG_PTR(alt); |
105 | replptr = ALT_REPL_PTR(alt); | |
106 | nr_inst = alt->alt_len / sizeof(insn); | |
107 | ||
108 | for (i = 0; i < nr_inst; i++) { | |
109 | insn = get_alt_insn(alt, origptr + i, replptr + i); | |
110 | *(origptr + i) = cpu_to_le32(insn); | |
111 | } | |
112 | ||
e039ee4e | 113 | flush_icache_range((uintptr_t)origptr, |
7616fc8b | 114 | (uintptr_t)(origptr + nr_inst)); |
e039ee4e | 115 | } |
e039ee4e AP |
116 | } |
117 | ||
ef5e724b WD |
118 | /* |
119 | * We might be patching the stop_machine state machine, so implement a | |
120 | * really simple polling protocol here. | |
121 | */ | |
122 | static int __apply_alternatives_multi_stop(void *unused) | |
e039ee4e | 123 | { |
ef5e724b | 124 | static int patched = 0; |
932ded4b | 125 | struct alt_region region = { |
ee78fdc7 JM |
126 | .begin = (struct alt_instr *)__alt_instructions, |
127 | .end = (struct alt_instr *)__alt_instructions_end, | |
932ded4b AP |
128 | }; |
129 | ||
ef5e724b WD |
130 | /* We always have a CPU 0 at this point (__init) */ |
131 | if (smp_processor_id()) { | |
132 | while (!READ_ONCE(patched)) | |
133 | cpu_relax(); | |
04b8637b | 134 | isb(); |
ef5e724b WD |
135 | } else { |
136 | BUG_ON(patched); | |
137 | __apply_alternatives(®ion); | |
138 | /* Barriers provided by the cache flushing */ | |
139 | WRITE_ONCE(patched, 1); | |
140 | } | |
141 | ||
142 | return 0; | |
143 | } | |
144 | ||
145 | void __init apply_alternatives_all(void) | |
146 | { | |
e039ee4e | 147 | /* better not try code patching on a live SMP system */ |
ef5e724b | 148 | stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask); |
932ded4b AP |
149 | } |
150 | ||
151 | void apply_alternatives(void *start, size_t length) | |
152 | { | |
153 | struct alt_region region = { | |
154 | .begin = start, | |
155 | .end = start + length, | |
156 | }; | |
157 | ||
158 | __apply_alternatives(®ion); | |
e039ee4e | 159 | } |