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d1e6dc91 LD |
1 | /* |
2 | * Code borrowed from powerpc/kernel/pci-common.c | |
3 | * | |
4 | * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM | |
5 | * Copyright (C) 2014 ARM Ltd. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * version 2 as published by the Free Software Foundation. | |
10 | * | |
11 | */ | |
12 | ||
a9cb97fe | 13 | #include <linux/acpi.h> |
d1e6dc91 LD |
14 | #include <linux/init.h> |
15 | #include <linux/io.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/mm.h> | |
18 | #include <linux/of_pci.h> | |
19 | #include <linux/of_platform.h> | |
20 | #include <linux/slab.h> | |
21 | ||
22 | #include <asm/pci-bridge.h> | |
23 | ||
24 | /* | |
25 | * Called after each bus is probed, but before its children are examined | |
26 | */ | |
27 | void pcibios_fixup_bus(struct pci_bus *bus) | |
28 | { | |
29 | /* nothing to do, expected to be removed in the future */ | |
30 | } | |
31 | ||
32 | /* | |
33 | * We don't have to worry about legacy ISA devices, so nothing to do here | |
34 | */ | |
35 | resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |
36 | resource_size_t size, resource_size_t align) | |
37 | { | |
38 | return res->start; | |
39 | } | |
40 | ||
72407514 LP |
41 | /** |
42 | * pcibios_enable_device - Enable I/O and memory. | |
43 | * @dev: PCI device to be enabled | |
44 | * @mask: bitmask of BARs to enable | |
45 | */ | |
46 | int pcibios_enable_device(struct pci_dev *dev, int mask) | |
47 | { | |
48 | if (pci_has_flag(PCI_PROBE_ONLY)) | |
49 | return 0; | |
50 | ||
51 | return pci_enable_resources(dev, mask); | |
52 | } | |
53 | ||
d1e6dc91 LD |
54 | /* |
55 | * Try to assign the IRQ number from DT when adding a new device | |
56 | */ | |
57 | int pcibios_add_device(struct pci_dev *dev) | |
58 | { | |
59 | dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); | |
60 | ||
61 | return 0; | |
62 | } | |
a9cb97fe HG |
63 | |
64 | /* | |
65 | * raw_pci_read/write - Platform-specific PCI config space access. | |
66 | */ | |
67 | int raw_pci_read(unsigned int domain, unsigned int bus, | |
68 | unsigned int devfn, int reg, int len, u32 *val) | |
69 | { | |
70 | return -ENXIO; | |
71 | } | |
72 | ||
73 | int raw_pci_write(unsigned int domain, unsigned int bus, | |
74 | unsigned int devfn, int reg, int len, u32 val) | |
75 | { | |
76 | return -ENXIO; | |
77 | } | |
78 | ||
79 | #ifdef CONFIG_ACPI | |
80 | /* Root bridge scanning */ | |
81 | struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) | |
82 | { | |
83 | /* TODO: Should be revisited when implementing PCI on ACPI */ | |
84 | return NULL; | |
85 | } | |
86 | #endif |